Re: [PATCH v4 0/4] arm64: rockchip: Pine64 PineTab2 support
Hi Dang, On Sat, Jan 27, 2024 at 06:35:50PM +0700, Dang Huynh wrote: > Hi Manuel, > > Since the BOE patches have been accepted to next, you do not need to include > it in this patch series. sorry, I thought patches to LKML shall be against Linux master since the patches are still only in drm-next I considered to keep them in the queue. Regards Manuel > On Saturday, January 27, 2024 4:48:41 PM +07 Manuel Traut wrote: > > - BOE TH101MB31IG002 LCD Panel: > > * Picked patches from https://anongit.freedesktop.org/git/drm/drm-misc.git > > (drm-misc-next) > >
[PATCH v4 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
This includes support for both the v0.1 units that were sent to developers and
the v2.0 units from production.
v1.0 is not included as no units are known to exist.
Working/Tested:
- SDMMC
- UART
- Buttons
- Charging/Battery/PMIC
- Audio
- USB
- Display
- SPI NOR Flash
Signed-off-by: Alexander Warnecke
Signed-off-by: Manuel Traut
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +
.../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 28 +
.../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 48 ++
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 943 +
4 files changed, 1021 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index a7b30e11beaf..ac0c72667bb7 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -78,6 +78,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v0.1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v2.0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rk2023.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-x55.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
new file mode 100644
index ..5fe6ca5da9d3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v0.1";
+ compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
+};
+
+&pinctrl {
+ lcd0 {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&vcc3v3_sys>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
new file mode 100644
index ..9349541cbbd0
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v2.0";
+ compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&gpio_keys {
+ pinctrl-0 = <&kb_id_det>, <&hall_int_l>;
+
+ event-hall-sensor {
+ debounce-interval = <20>;
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "Hall Sensor";
+ linux,code = ;
+ linux,input-type = ;
+ wakeup-event-action = ;
+ wakeup-source;
+ };
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
+};
+
+&pinctrl {
+ lcd0 {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hall {
+ hall_int_l: hall-int-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&vcc_sys>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
new file mode 100644
index ..db40281eafbe
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
@@ -0,0 +1,943 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "rk3566.dtsi"
+
+/ {
+ chassis-type = "tablet";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc0;
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <180>;
+ poll-interval = <25>;
+
+
[PATCH v4 0/4] arm64: rockchip: Pine64 PineTab2 support
This adds support for the BOE TH101MB31IG002 LCD Panel used in PineTab2 [1] and PineTab-V [2] as well as the devictrees for the PineTab2 v0.1 and v2.0. The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has been adapted and the LCD init section was simplified. The PineTab2 devicetree patch was retrieved from [4]. Some renaming was needed to pass the dtb-checks, the brightness-levels are specified as range and steps instead of a list of values. [5] and [6] was also used as source for this queue. [1] https://wiki.pine64.org/wiki/PineTab2 [2] https://wiki.pine64.org/wiki/PineTab-V [3] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/display/0018-drm-panel-add-BOE-TH101MB31IG002-28A-driver.patch?ref_type=heads [4] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/device-tree/0134-arch-arm64-add-Pine64-PineTab2-device-trees.patch?ref_type=heads [5] https://github.com/dreemurrs-embedded/linux-pinetab2/tree/v6.6.7-danctnix1 [6] https://xff.cz/git/linux?h=pt2-6.7 Signed-off-by: Manuel Traut --- Changes in v4: - Rebased on v6.8-rc1 - BOE TH101MB31IG002 LCD Panel: * Picked patches from https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) - PineTab2 dts: * Make flash-led a regulator-led and control the regulator by GPIO and set V5_MIDU as vin-supply to ensure that LED is working even if all other drivers using V5 MIDU are unloaded. * Add -regulator suffix to nodes, replace -con suffix by -connector * Set lcd pinctrl in .dts instead of .dtsi so it is more clear that this is different between pinetab v0.1 and v2.0 * Remove unused bluetooth uart configuration and pinctrl * Increase spi-nor max-speed from 24 to 100 MHz - Link to v3: https://lore.kernel.org/r/20240102-pinetab2-v3-0-cb1aa69f8...@mecka.net Changes in v3: - PineTab2 dts: * Remove useless regulator-state-mem nodes for fixed regulators * Swap mmc0 and mmc1, so mmc0 is now the internal eMMC - BOE TH101MB31IG002 LCD Panel: * Remove enabled/prepared checks since they are done in core. - Use consistent naming (PineTab2 and PineTab-V) in commit messages. - Link to v2: https://lore.kernel.org/r/20231223-pinetab2-v2-0-ec1856d00...@mecka.net Changes in v2: - Removed dtb-checker fixups, cause I am not sure if they are correct - Applied review comments for dt bindings - pinetab2 dts: * Remove unverified WLAN entries, as in [5] * Simplify flash LED definition, as in [5] * Fix headphone detection and sound routing, as in [5] * Fix CRU clock configuration - BOE TH101MB31IG002 LCD Panel: * Reworked prepare/enable unprepare/disable, as in [5] - Replaced nicknames by realnames in author and signed-offs - Link to v1: https://lore.kernel.org/r/20231222-pinetab2-v1-0-e148a7f61...@mecka.net --- Alexander Warnecke (1): drm/panel: Add driver for BOE TH101MB31IG002-28A panel Manuel Traut (3): dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel dt-bindings: arm64: rockchip: Add Pine64 PineTab2 arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 .../devicetree/bindings/arm/rockchip.yaml | 8 + .../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++ arch/arm64/boot/dts/rockchip/Makefile | 2 + .../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 28 + .../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 48 ++ arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 943 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +++ 9 files changed, 1421 insertions(+) --- base-commit: 3a5879d495b226d0404098e3564462d5f1daa33b change-id: 20231222-pinetab2-faa77e01db6f Best regards, -- Manuel Traut
[PATCH v4 3/4] dt-bindings: arm64: rockchip: Add Pine64 PineTab2
Add devicvetree binding documentation for Pine64 PineTab2 which uses the Rockchip RK3566 SoC. Signed-off-by: Manuel Traut Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/rockchip.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5cf5cbef2cf5..1b9740e2f3a1 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -650,6 +650,14 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 + - description: Pine64 PineTab2 +items: + - enum: + - pine64,pinetab2-v0.1 + - pine64,pinetab2-v2.0 + - const: pine64,pinetab2 + - const: rockchip,rk3566 + - description: Pine64 PinePhonePro items: - const: pine64,pinephone-pro -- 2.43.0
[PATCH v4 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel
Add bindings for the BOE TH101MB31IG002-28A LCD panel. It is
used e.g. in the Pine64 PineTab2 and PineTab-V.
Signed-off-by: Manuel Traut
Reviewed-by: Krzysztof Kozlowski
Link: https://lore.kernel.org/r/20240102-pinetab2-v3-1-cb1aa69f8...@mecka.net
Signed-off-by: Neil Armstrong
Link:
https://patchwork.freedesktop.org/patch/msgid/20240102-pinetab2-v3-1-cb1aa69f8...@mecka.net
(cherry picked from commit baae3a0b10c499d4228514a701602f6fd2a8d6b4)
---
.../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++
1 file changed, 58 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
new file mode 100644
index ..32df26cbfeed
--- /dev/null
+++
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/boe,th101mb31ig002-28a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: BOE TH101MB31IG002-28A WXGA DSI Display Panel
+
+maintainers:
+ - Manuel Traut
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+enum:
+# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
+ - boe,th101mb31ig002-28a
+
+ reg: true
+ backlight: true
+ enable-gpios: true
+ power-supply: true
+ port: true
+ rotation: true
+
+required:
+ - compatible
+ - reg
+ - enable-gpios
+ - power-supply
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "boe,th101mb31ig002-28a";
+reg = <0>;
+backlight = <&backlight_lcd0>;
+enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
+rotation = <90>;
+power-supply = <&vcc_3v3>;
+port {
+panel_in_dsi: endpoint {
+remote-endpoint = <&dsi_out_con>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v4 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel
From: Alexander Warnecke
The BOE TH101MB31IG002-28A panel is a WXGA panel.
It is used in Pine64 PineTab2 and PineTab-V.
Signed-off-by: Alexander Warnecke
Signed-off-by: Manuel Traut
Reviewed-by: Jessica Zhang
Link: https://lore.kernel.org/r/20240102-pinetab2-v3-2-cb1aa69f8...@mecka.net
Signed-off-by: Neil Armstrong
Link:
https://patchwork.freedesktop.org/patch/msgid/20240102-pinetab2-v3-2-cb1aa69f8...@mecka.net
(cherry picked from commit 420186db1483da4e16cd5d5a472f511a35dbc1b7)
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +
3 files changed, 334 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 8f3783742208..00a947941c19 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
24 bit RGB per pixel. It provides a MIPI DSI interface to
the host and has a built-in LED backlight.
+config DRM_PANEL_BOE_TH101MB31UIG002_28A
+ tristate "Boe TH101MB31UIG002-28A panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for Boe
+ TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
+ resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
+ interface to the host and has a built-in LED backlight.
+
config DRM_PANEL_BOE_TV101WUM_NL6
tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d94a644d0a6c..015bb8d70fbd 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) +=
panel-asus-z00t-tm5p5-n35596.
obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
+obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) +=
panel-boe-th101mb31ig002-28a.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
new file mode 100644
index ..763e9f8342d3
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Alexander Warnecke
+ * Copyright (c) 2023 Manuel Traut
+ * Copyright (c) 2023 Dang Huynh
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+struct boe_th101mb31ig002 {
+ struct drm_panel panel;
+
+ struct mipi_dsi_device *dsi;
+
+ struct regulator *power;
+ struct gpio_desc *enable;
+ struct gpio_desc *reset;
+
+ enum drm_panel_orientation orientation;
+};
+
+static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
+{
+ gpiod_direction_output(ctx->reset, 0);
+ usleep_range(10, 100);
+ gpiod_direction_output(ctx->reset, 1);
+ usleep_range(10, 100);
+ gpiod_direction_output(ctx->reset, 0);
+ usleep_range(5000, 6000);
+}
+
+static int boe_th101mb31ig002_enable(struct drm_panel *panel)
+{
+ struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36,
+ 0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C,
+ 0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C,
+ 0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24,
+ 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47,
+
Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
Hi Jonas,
On Wed, Jan 03, 2024 at 03:19:25PM +0100, Jonas Karlman wrote:
> Hi Manuel,
>
> On 2024-01-03 14:40, Manuel Traut wrote:
> > Hi Jonas and Ondřej,
> >
> >>>> +&sfc {
> >>>> +pinctrl-names = "default";
> >>>> +pinctrl-0 = <&fspi_dual_io_pins>;
> >>>> +status = "okay";
> >>>> +#address-cells = <1>;
> >>>> +#size-cells = <0>;
> >>>> +
> >>>> +flash@0 {
> >>>> +compatible = "jedec,spi-nor";
> >>>> +reg = <0>;
> >>>> +spi-max-frequency = <2400>;
> >>>
> >>> That's a bit on the low side. The flash chip should work for all commands
> >>> up to
> >>> 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch
> >>> for the FSPI-CLK should have high enough bandwidth, too.
> >>
> >> I agree that this is a little bit on the low side, it was a safe rate
> >> that I used for U-Boot. U-Boot required an exact rate of the supported
> >> sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz.
> >>
> >> Please also note that the SPI NOR flash chip used in PineTab2 is not a
> >> GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as
> >> found in the Pine64 PinePhone Pro.
> >
> > The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the
> > jedec
> > id. How did you retrieve this information, or is it maybe a difference in
> > v0.1
> > and 2.0?
>
> This was when working on mainline U-Boot for the PineTab2 (and other
> rk356x devices). See [1] for a pending U-Boot patch that is waiting on a
> proper mainline linux devicetree for the PT2.
>
> The JEDEC ID is reported as 0x257018 on my v2.0 production unit, and
> does not match the JEDEC ID for GD25LQ128E (0xc86018) referenced in
> the schematics.
>
> I found that the JEDEC ID 0x257018 was referenced in prior patches
> related to the SK25LP128 SPI NOR flash chip used in Pine64 PinePhone Pro.
>
> I have only ever tested the 24 MHz rate, but I am expecting that e.g.
> 100 MHz also should work. Will not be able to test on my PT2 until at
> earliest next week.
>
> [1]
> https://github.com/Kwiboo/u-boot-rockchip/commit/66562d6eaf2c11a9f97fcdba379d3ceda8aa70ef
I found the time to verify that 100 MHz is also working.
Will include this in v4
Thanks for your help
Manuel
Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
Hello Ondřej,
On Fri, Jan 05, 2024 at 05:48:46PM +0100, Ondřej Jirman wrote:
> On Fri, Jan 05, 2024 at 05:11:03PM +0100, Manuel Traut wrote:
> > On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote:
> > > Hello Manuel,
> > >
> > > a few more things I noticed:
> > >
> > > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote:
> > > > From: Alexander Warnecke
> > > >
> > > > + leds {
> > > > + compatible = "gpio-leds";
> > > > +
> > > > + pinctrl-names = "default";
> > > > + pinctrl-0 = <&flash_led_en_h>;
> > > > +
> > > > + led-0 {
> > > > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
> > > > + color = ;
> > > > + function = LED_FUNCTION_FLASH;
> > > > + };
> > >
> > > This LED is supplied by VCC5V_MIDU, so maybe this should be a
> > > regulator-led
> > > supplied by gpio (FLASH_LED_EN_H) controlled regulator-fixed named f_led
> > > which
> > > is in turn supplied by VCC5V_MIDU.
> > >
> > > https://megous.com/dl/tmp/9bf0d85d78946b5e.png
> >
> > regulator-leds are controlled by turning on or off the regulator. However
> > VCC5V_MIDU is also used by other devices (USB, HDMI, ..) so I guess this is
> > not what we want. I would keep it as is.
>
> It's used by the LED. gpio-leds will not ensure it's on when you enable the
> LED.
>
> In practice this may only come up if someone tries to save power by unloading
> dwc3 USB driver, when using PT2 outside of the keyboard case. Otherwise
> VCC5V_MIDU will be enabled by DWC3 driver's use of PHY API.
>
> In any case, I'm not saying you should use VCC5V_MIDU directly in
> regulator-led,
> but as a vin-supply to a new regulator-fixed node (which would be describing
> this "fixed voltage regulator" https://megous.com/dl/tmp/cc65ec81ab9af163.png
> ).
Sorry for the late response, I was busy with other things in the last weeks.
I changed it to be a regulator led and will post a v4 soon.
Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
Hi Jonas,
On Wed, Jan 03, 2024 at 03:19:25PM +0100, Jonas Karlman wrote:
> Hi Manuel,
>
> On 2024-01-03 14:40, Manuel Traut wrote:
> > Hi Jonas and Ondřej,
> >
> >>>> +&sfc {
> >>>> +pinctrl-names = "default";
> >>>> +pinctrl-0 = <&fspi_dual_io_pins>;
> >>>> +status = "okay";
> >>>> +#address-cells = <1>;
> >>>> +#size-cells = <0>;
> >>>> +
> >>>> +flash@0 {
> >>>> +compatible = "jedec,spi-nor";
> >>>> +reg = <0>;
> >>>> +spi-max-frequency = <2400>;
> >>>
> >>> That's a bit on the low side. The flash chip should work for all commands
> >>> up to
> >>> 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch
> >>> for the FSPI-CLK should have high enough bandwidth, too.
> >>
> >> I agree that this is a little bit on the low side, it was a safe rate
> >> that I used for U-Boot. U-Boot required an exact rate of the supported
> >> sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz.
> >>
> >> Please also note that the SPI NOR flash chip used in PineTab2 is not a
> >> GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as
> >> found in the Pine64 PinePhone Pro.
> >
> > The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the
> > jedec
> > id. How did you retrieve this information, or is it maybe a difference in
> > v0.1
> > and 2.0?
>
> This was when working on mainline U-Boot for the PineTab2 (and other
> rk356x devices). See [1] for a pending U-Boot patch that is waiting on a
> proper mainline linux devicetree for the PT2.
>
> The JEDEC ID is reported as 0x257018 on my v2.0 production unit, and
> does not match the JEDEC ID for GD25LQ128E (0xc86018) referenced in
> the schematics.
>
> I found that the JEDEC ID 0x257018 was referenced in prior patches
> related to the SK25LP128 SPI NOR flash chip used in Pine64 PinePhone Pro.
>
> I have only ever tested the 24 MHz rate, but I am expecting that e.g.
> 100 MHz also should work. Will not be able to test on my PT2 until at
> earliest next week.
>
> [1]
> https://github.com/Kwiboo/u-boot-rockchip/commit/66562d6eaf2c11a9f97fcdba379d3ceda8aa70ef
Thanks for the information.
My v2.0 device also reports JEDEC ID 0x257018. I increased the clock-rate
to 100 MHz and it is at least still detected.
I will find out how to test more, currently hexdump /dev/mtd0 just reports
0xff on the hole flash, I expected to see u-boot there..
Regards
Manuel
> >>>> +spi-rx-bus-width = <2>;
> >>>
> >>> GD25LQ128E supports quad I/O. Maybe try 4 if it will work.
> >>
> >> The schematic only shows fspi D0 and D1 connected, and use the D2 line
> >> for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct.
> >
> > ack
> >
> > Since it is only needed for bootloader updates and environment its maybe
> > better
> > to stay on the safe side?
> >
> > But I can test faster frequency if you want me to do..
> >
> > Regards
> > Manuel
>
Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote:
> Hello Manuel,
>
> a few more things I noticed:
>
> On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote:
> > From: Alexander Warnecke
> >
> > + leds {
> > + compatible = "gpio-leds";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&flash_led_en_h>;
> > +
> > + led-0 {
> > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
> > + color = ;
> > + function = LED_FUNCTION_FLASH;
> > + };
>
> This LED is supplied by VCC5V_MIDU, so maybe this should be a regulator-led
> supplied by gpio (FLASH_LED_EN_H) controlled regulator-fixed named f_led which
> is in turn supplied by VCC5V_MIDU.
>
> https://megous.com/dl/tmp/9bf0d85d78946b5e.png
regulator-leds are controlled by turning on or off the regulator. However
VCC5V_MIDU is also used by other devices (USB, HDMI, ..) so I guess this is
not what we want. I would keep it as is.
> > + };
> > +
> > [...]
> >
> > +
> > + speaker_amp: speaker-amplifier {
> > + compatible = "simple-audio-amplifier";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spk_ctl>;
> > + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
> > + sound-name-prefix = "Speaker Amplifier";
> > + VCC-supply = <&vcc_bat>;
> > + };
> > +
> > + vcc_3v3: vcc-3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc_3v3";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + vin-supply = <&vcc3v3_sys>;
> > + };
> > +
> > + vcc3v3_minipcie: vcc3v3-minipcie {
> > + compatible = "regulator-fixed";
> > + enable-active-high;
> > + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pcie_pwren_h>;
> > + regulator-name = "vcc3v3_minipcie";
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + vin-supply = <&vcc_sys>;
>
> This regulator is supplied by vcc_bat:
> https://megous.com/dl/tmp/4ec71a4a2aea9498.png
correct, I will update this in v4.
> > + };
> > +
> > + vcc3v3_sd: vcc3v3-sd {
> > + compatible = "regulator-fixed";
> > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&sdmmc_pwren_l>;
> > + regulator-name = "vcc3v3_sd";
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + vin-supply = <&vcc3v3_sys>;
> > + };
> > +
> > + vcc5v0_usb_host0: vcc5v0-usb-host0 {
> > + compatible = "regulator-fixed";
> > + enable-active-high;
> > + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&usb_host_pwren1_h>;
> > + regulator-name = "vcc5v0_usb_host0";
> > + regulator-min-microvolt = <500>;
> > + regulator-max-microvolt = <500>;
> > + vin-supply = <&vcc5v_midu>;
> > + };
> > +
> > + vcc5v0_usb_host2: vcc5v0-usb-host2 {
> > + compatible = "regulator-fixed";
> > + enable-active-high;
> > + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&usb_host_pwren2_h>;
> > + regulator-name = "vcc5v0_usb_host2";
> > + regulator-min-microvolt = <500>;
> > + regulator-max-microvolt = <500>;
> > + vin-supply = <&vcc5v_midu>;
> > + };
> > +
> > + vcc_bat: vcc-bat {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc_bat";
> > + regulator-alwa
Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
Hi Jonas and Ondřej,
> >> +&sfc {
> >> + pinctrl-names = "default";
> >> + pinctrl-0 = <&fspi_dual_io_pins>;
> >> + status = "okay";
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> +
> >> + flash@0 {
> >> + compatible = "jedec,spi-nor";
> >> + reg = <0>;
> >> + spi-max-frequency = <2400>;
> >
> > That's a bit on the low side. The flash chip should work for all commands
> > up to
> > 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch
> > for the FSPI-CLK should have high enough bandwidth, too.
>
> I agree that this is a little bit on the low side, it was a safe rate
> that I used for U-Boot. U-Boot required an exact rate of the supported
> sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz.
>
> Please also note that the SPI NOR flash chip used in PineTab2 is not a
> GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as
> found in the Pine64 PinePhone Pro.
The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the jedec
id. How did you retrieve this information, or is it maybe a difference in v0.1
and 2.0?
> >> + spi-rx-bus-width = <2>;
> >
> > GD25LQ128E supports quad I/O. Maybe try 4 if it will work.
>
> The schematic only shows fspi D0 and D1 connected, and use the D2 line
> for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct.
ack
Since it is only needed for bootloader updates and environment its maybe better
to stay on the safe side?
But I can test faster frequency if you want me to do..
Regards
Manuel
Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
On Tue, Jan 02, 2024 at 07:07:56PM +0100, Ondřej Jirman wrote:
> Hello Manuel,
Hello Ondřej,
> On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote:
> > From: Alexander Warnecke
> >
> > [...]
> >
> > +
> > + backlight: backlight {
> > + compatible = "pwm-backlight";
> > + pwms = <&pwm4 0 25000 0>;
> > + brightness-levels = <20 220>;
> > + num-interpolated-steps = <200>;
>
> Does this linear brightness -> PWM duty cycle mapping lead to linear
> relationship between brighntess level and subjective brightness on this HW?
>
> I doubt it a bit...
I tested it with the brightness slider in phosh, for me it looks good.
> > +
> > + hdmi-con {
>
> hdmi-connector
ack, changed for v4
> > + compatible = "hdmi-connector";
> > + type = "d";
> > +
> > + port {
> > + hdmi_con_in: endpoint {
> > + remote-endpoint = <&hdmi_out_con>;
> > + };
> > + };
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > +
>
> Spurious newline ^
ack, changed for v4
> > + vcc_3v3: vcc-3v3 {
>
> Regulator node names shoule end with -regulator suffix. The same applies for
> all of the below nodes.
ack, changed for v4
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc_3v3";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + vin-supply = <&vcc3v3_sys>;
> > + };
> > +
> > + vdd1v2_dvp: vdd1v2-dvp {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vdd1v2_dvp";
> > + regulator-min-microvolt = <120>;
> > + regulator-max-microvolt = <120>;
> > + vin-supply = <&vcc_3v3>;
> > + /*enable-supply = <&vcc2v8_dvp>;*/
>
> There's no such property. Delete this commented out line.
ack, changed for v4
> > + lcd: panel@0 {
> > + compatible = "boe,th101mb31ig002-28a";
> > + reg = <0>;
> > + backlight = <&backlight>;
> > + enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
>
> Re lcd0_rst_l:
>
> It's a bit weird conceptually to reference from dtsi something that's only
> declared in dts that includes the dtsi. Maybe move pinctrl-* properties
> to dts &lcd, too...
Will be better I guess, changed for v4.
> > + vcc5v_midu: BOOST {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <500>;
> > + regulator-max-microvolt = <500>;
> > + regulator-name = "boost";
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
>
> I guess this prevents remote USB wakeup by USB devices. Like wakeup via USB
> keyboard. Probably not a bad thing, though.
That is true. After 'echo mem > /sys/power/state' It is not possible to wakeup
the device with a USB Keyboard or mouse. However if the surface like keyboard
is used that is shipped with the device, wakeup works if the keyboard/tablet
gets unfold. For me this behaviour is fine. Other opinions?
> > +&pcie2x1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pcie_reset_h>;
> > + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
> > + vpcie3v3-supply = <&vcc3v3_minipcie>;
> > + status = "okay";
> > +};
>
> Does it make sense to enable this HW block by default, when it isn't used on
> actual HW?
There is a flat ribbon connector, if someone wants to build sth. it might be
helpful. However I am also fine with removing it for now.
> > +&pinctrl {
> > + bt {
> > + bt_wake_host_h: bt-wake-host-h {
> > + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
> > + };
>
[PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
From: Alexander Warnecke
This includes support for both the v0.1 units that were sent to developers and
the v2.0 units from production.
v1.0 is not included as no units are known to exist.
Working/Tested:
- SDMMC
- UART
- Buttons
- Charging/Battery/PMIC
- Audio
- USB
- Display
Signed-off-by: Alexander Warnecke
Signed-off-by: Manuel Traut
Tested-By: Diederik de Haas
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +
.../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 +
.../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 +
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 959 +
4 files changed, 1033 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index a18f33bf0c0e..ef66c0937a9b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -77,6 +77,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v0.1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v2.0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
new file mode 100644
index ..8b110186a3eb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v0.1";
+ compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ lcd0 {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&vcc3v3_sys>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
new file mode 100644
index ..6f80446b5802
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v2.0";
+ compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&gpio_keys {
+ pinctrl-0 = <&kb_id_det>, <&hall_int_l>;
+
+ event-hall-sensor {
+ debounce-interval = <20>;
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "Hall Sensor";
+ linux,code = ;
+ linux,input-type = ;
+ wakeup-event-action = ;
+ wakeup-source;
+ };
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ lcd0 {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hall {
+ hall_int_l: hall-int-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&vcc_sys>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
new file mode 100644
index ..5d895628406b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
@@ -0,0 +1,959 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "rk3566.dtsi"
+
+/ {
+ chassis-type = "tablet";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc0;
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <180>;
+ poll-interval = <25>;
+
+ button-vol-up {
+ label = "Volume Up";
+ linux,code = ;
+ press-threshold-microvolt = <297500>;
+
[PATCH v3 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel
From: Alexander Warnecke
The BOE TH101MB31IG002-28A panel is a WXGA panel.
It is used in Pine64 PineTab2 and PineTab-V.
Signed-off-by: Alexander Warnecke
Signed-off-by: Manuel Traut
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +
3 files changed, 334 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..927ddd10e688 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
24 bit RGB per pixel. It provides a MIPI DSI interface to
the host and has a built-in LED backlight.
+config DRM_PANEL_BOE_TH101MB31UIG002_28A
+ tristate "Boe TH101MB31UIG002-28A panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for Boe
+ TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
+ resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
+ interface to the host and has a built-in LED backlight.
+
config DRM_PANEL_BOE_TV101WUM_NL6
tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..dd6e1ac9d0a2 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) +=
panel-asus-z00t-tm5p5-n35596.
obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
+obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) +=
panel-boe-th101mb31ig002-28a.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
new file mode 100644
index ..763e9f8342d3
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Alexander Warnecke
+ * Copyright (c) 2023 Manuel Traut
+ * Copyright (c) 2023 Dang Huynh
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+struct boe_th101mb31ig002 {
+ struct drm_panel panel;
+
+ struct mipi_dsi_device *dsi;
+
+ struct regulator *power;
+ struct gpio_desc *enable;
+ struct gpio_desc *reset;
+
+ enum drm_panel_orientation orientation;
+};
+
+static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
+{
+ gpiod_direction_output(ctx->reset, 0);
+ usleep_range(10, 100);
+ gpiod_direction_output(ctx->reset, 1);
+ usleep_range(10, 100);
+ gpiod_direction_output(ctx->reset, 0);
+ usleep_range(5000, 6000);
+}
+
+static int boe_th101mb31ig002_enable(struct drm_panel *panel)
+{
+ struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36,
+ 0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C,
+ 0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C,
+ 0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24,
+ 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47,
+ 0x46, 0x39, 0x26, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0xFF, 0x87, 0x12, 0x34, 0x44, 0x44,
+ 0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0F,
+ 0x00, 0x00, 0xC1);
+ mipi_dsi_dcs_write_seq(dsi, 0
[PATCH v3 3/4] dt-bindings: arm64: rockchip: Add Pine64 PineTab2
Add devicvetree binding documentation for Pine64 PineTab2 which uses the Rockchip RK3566 SoC. Signed-off-by: Manuel Traut Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/rockchip.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..96d54b0587ab 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -635,6 +635,14 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 + - description: Pine64 PineTab2 +items: + - enum: + - pine64,pinetab2-v0.1 + - pine64,pinetab2-v2.0 + - const: pine64,pinetab2 + - const: rockchip,rk3566 + - description: Pine64 PinePhonePro items: - const: pine64,pinephone-pro -- 2.43.0
[PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support
This adds support for the BOE TH101MB31IG002 LCD Panel used in PineTab2 [1] and PineTab-V [2] as well as the devictrees for the PineTab2 v0.1 and v2.0. The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has been adapted and the LCD init section was simplified. The PineTab2 devicetree patch was retrieved from [4]. Some renaming was needed to pass the dtb-checks, the brightness-levels are specified as range and steps instead of a list of values. [5] and [6] was also used as source for this queue. [1] https://wiki.pine64.org/wiki/PineTab2 [2] https://wiki.pine64.org/wiki/PineTab-V [3] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/display/0018-drm-panel-add-BOE-TH101MB31IG002-28A-driver.patch?ref_type=heads [4] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/device-tree/0134-arch-arm64-add-Pine64-PineTab2-device-trees.patch?ref_type=heads [5] https://github.com/dreemurrs-embedded/linux-pinetab2/tree/v6.6.7-danctnix1 [6] https://xff.cz/git/linux?h=pt2-6.7 Signed-off-by: Manuel Traut --- Changes in v3: - PineTab2 dts: * Remove useless regulator-state-mem nodes for fixed regulators * Swap mmc0 and mmc1, so mmc0 is now the internal eMMC - BOE TH101MB31IG002 LCD Panel: * Remove enabled/prepared checks since they are done in core. - Use consistent naming (PineTab2 and PineTab-V) in commit messages. - Link to v2: https://lore.kernel.org/r/20231223-pinetab2-v2-0-ec1856d00...@mecka.net Changes in v2: - Removed dtb-checker fixups, cause I am not sure if they are correct - Applied review comments for dt bindings - pinetab2 dts: * Remove unverified WLAN entries, as in [5] * Simplify flash LED definition, as in [5] * Fix headphone detection and sound routing, as in [5] * Fix CRU clock configuration - BOE TH101MB31IG002 LCD Panel: * Reworked prepare/enable unprepare/disable, as in [5] - Replaced nicknames by realnames in author and signed-offs - Link to v1: https://lore.kernel.org/r/20231222-pinetab2-v1-0-e148a7f61...@mecka.net --- Alexander Warnecke (2): drm/panel: Add driver for BOE TH101MB31IG002-28A panel arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 Manuel Traut (2): dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel dt-bindings: arm64: rockchip: Add Pine64 PineTab2 .../devicetree/bindings/arm/rockchip.yaml | 8 + .../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++ arch/arm64/boot/dts/rockchip/Makefile | 2 + .../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 + .../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 + arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 959 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +++ 9 files changed, 1433 insertions(+) --- base-commit: 610a9b8f49fbcf1100716370d3b5f6f884a2835a change-id: 20231222-pinetab2-faa77e01db6f Best regards, -- Manuel Traut
[PATCH v3 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel
Add bindings for the BOE TH101MB31IG002-28A LCD panel. It is
used e.g. in the Pine64 PineTab2 and PineTab-V.
Signed-off-by: Manuel Traut
Reviewed-by: Krzysztof Kozlowski
---
.../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++
1 file changed, 58 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
new file mode 100644
index ..32df26cbfeed
--- /dev/null
+++
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/boe,th101mb31ig002-28a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: BOE TH101MB31IG002-28A WXGA DSI Display Panel
+
+maintainers:
+ - Manuel Traut
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+enum:
+# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
+ - boe,th101mb31ig002-28a
+
+ reg: true
+ backlight: true
+ enable-gpios: true
+ power-supply: true
+ port: true
+ rotation: true
+
+required:
+ - compatible
+ - reg
+ - enable-gpios
+ - power-supply
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "boe,th101mb31ig002-28a";
+reg = <0>;
+backlight = <&backlight_lcd0>;
+enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
+rotation = <90>;
+power-supply = <&vcc_3v3>;
+port {
+panel_in_dsi: endpoint {
+remote-endpoint = <&dsi_out_con>;
+};
+};
+};
+};
+
+...
--
2.43.0
Re: [PATCH v2 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel
On Tue, Dec 26, 2023 at 02:56:58PM -0800, Jessica Zhang wrote: > > > On 12/23/2023 7:20 AM, Manuel Traut wrote: > > From: Alexander Warnecke > > > > The BOE TH101MB31IG002-28A panel is a WXGA panel. > > It is used in Pine64 Pinetab2 and PinetabV. > > > Hi Manuel, Hi Jessica, > Sorry, I responded to the v1 instead of the latest version. Carrying my > comment over to here: > > If I remember correctly, commit d2aacaf07395bd798373cbec6af05fff4147aff3 > should have introduced prepared/enabled do the drm_panel struct. thanks for the hint, I will update this in v3. Regards Manuel
[PATCH v2 3/4] dt-bindings: arm64: rockchip: Add Pine64 Pinetab2
Add devicvetree binding documentation for Pine64 Pinetab2 which uses the Rockchip RK3566 SoC. Signed-off-by: Manuel Traut Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/rockchip.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..96d54b0587ab 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -635,6 +635,14 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 + - description: Pine64 PineTab2 +items: + - enum: + - pine64,pinetab2-v0.1 + - pine64,pinetab2-v2.0 + - const: pine64,pinetab2 + - const: rockchip,rk3566 + - description: Pine64 PinePhonePro items: - const: pine64,pinephone-pro -- 2.43.0
[PATCH v2 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel
From: Alexander Warnecke
The BOE TH101MB31IG002-28A panel is a WXGA panel.
It is used in Pine64 Pinetab2 and PinetabV.
Signed-off-by: Alexander Warnecke
Signed-off-by: Manuel Traut
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 348 +
3 files changed, 360 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..927ddd10e688 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
24 bit RGB per pixel. It provides a MIPI DSI interface to
the host and has a built-in LED backlight.
+config DRM_PANEL_BOE_TH101MB31UIG002_28A
+ tristate "Boe TH101MB31UIG002-28A panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for Boe
+ TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
+ resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
+ interface to the host and has a built-in LED backlight.
+
config DRM_PANEL_BOE_TV101WUM_NL6
tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..dd6e1ac9d0a2 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) +=
panel-asus-z00t-tm5p5-n35596.
obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
+obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) +=
panel-boe-th101mb31ig002-28a.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
new file mode 100644
index ..ffe4047b7434
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Alexander Warnecke
+ * Copyright (c) 2023 Manuel Traut
+ * Copyright (c) 2023 Dang Huynh
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+struct boe_th101mb31ig002 {
+ struct drm_panel panel;
+ bool enabled;
+ bool prepared;
+
+ struct mipi_dsi_device *dsi;
+
+ struct regulator *power;
+ struct gpio_desc *enable;
+ struct gpio_desc *reset;
+
+ enum drm_panel_orientation orientation;
+};
+
+static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
+{
+ gpiod_direction_output(ctx->reset, 0);
+ usleep_range(10, 100);
+ gpiod_direction_output(ctx->reset, 1);
+ usleep_range(10, 100);
+ gpiod_direction_output(ctx->reset, 0);
+ usleep_range(5000, 6000);
+}
+
+static int boe_th101mb31ig002_enable(struct drm_panel *panel)
+{
+ struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ if (ctx->enabled)
+ return 0;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36,
+ 0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C,
+ 0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C,
+ 0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24,
+ 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47,
+ 0x46, 0x39, 0x26, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0xFF, 0x87, 0x12, 0x34, 0x44, 0x44,
+ 0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0F
[PATCH v2 4/4] arm64: dts: rockchip: Add devicetree for Pine64 Pinetab2
From: Alexander Warnecke
This includes support for both the v0.1 units that were sent to developers and
the v2.0 units from production.
v1.0 is not included as no units are known to exist.
Working/Tested:
- SDMMC
- UART
- Buttons
- Charging/Battery/PMIC
- Audio
- USB
- Display
WiFi is not added, since the driver is not ready for mainline.
Signed-off-by: Alexander Warnecke
Signed-off-by: Manuel Traut
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +
.../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 +
.../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 +
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 979 +
4 files changed, 1053 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index a18f33bf0c0e..ef66c0937a9b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -77,6 +77,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v0.1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v2.0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
new file mode 100644
index ..8b110186a3eb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v0.1";
+ compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ lcd0 {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&vcc3v3_sys>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
new file mode 100644
index ..6f80446b5802
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v2.0";
+ compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&gpio_keys {
+ pinctrl-0 = <&kb_id_det>, <&hall_int_l>;
+
+ event-hall-sensor {
+ debounce-interval = <20>;
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "Hall Sensor";
+ linux,code = ;
+ linux,input-type = ;
+ wakeup-event-action = ;
+ wakeup-source;
+ };
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ lcd0 {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hall {
+ hall_int_l: hall-int-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&vcc_sys>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
new file mode 100644
index ..3ab7d8dbe1ec
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
@@ -0,0 +1,979 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "rk3566.dtsi"
+
+/ {
+ chassis-type = "tablet";
+
+ aliases {
+ mmc0 = &sdmmc0;
+ mmc1 = &sdhci;
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <180>;
+ poll-interval = <25>;
+
+ button-vol-up {
+ label = "Volume Up";
+ linux,code = ;
+ press-thres
[PATCH v2 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel
Add bindings for the BOE TH101MB31IG002-28A LCD panel. It is
used e.g. in the Pine64 Pinetab2 and PinetabV.
Signed-off-by: Manuel Traut
---
.../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++
1 file changed, 58 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
new file mode 100644
index ..32df26cbfeed
--- /dev/null
+++
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/boe,th101mb31ig002-28a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: BOE TH101MB31IG002-28A WXGA DSI Display Panel
+
+maintainers:
+ - Manuel Traut
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+enum:
+# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
+ - boe,th101mb31ig002-28a
+
+ reg: true
+ backlight: true
+ enable-gpios: true
+ power-supply: true
+ port: true
+ rotation: true
+
+required:
+ - compatible
+ - reg
+ - enable-gpios
+ - power-supply
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "boe,th101mb31ig002-28a";
+reg = <0>;
+backlight = <&backlight_lcd0>;
+enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
+rotation = <90>;
+power-supply = <&vcc_3v3>;
+port {
+panel_in_dsi: endpoint {
+remote-endpoint = <&dsi_out_con>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v2 0/4] arm64: rockchip: Pine64 pinetab2 support
This adds support for the BOE TH101MB31IG002 LCD Panel used in Pinetab2 [1] and Pinetab-V [2] as well as the devictrees for the Pinetab2 v0.1 and v2.0. The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has been adapted and the LCD init section was simplified. The Pinetab2 devicetree patch was retrieved from [4]. Some renaming was needed to pass the dtb-checks, the brightness-levels are specified as range and steps instead of a list of values. [5] was also used as source for this queue. The last to patches fix some dtb-checker warnings that showed up with the new device-trees. [1] https://wiki.pine64.org/wiki/PineTab2 [2] https://wiki.pine64.org/wiki/PineTab-V [3] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/display/0018-drm-panel-add-BOE-TH101MB31IG002-28A-driver.patch?ref_type=heads [4] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/device-tree/0134-arch-arm64-add-Pine64-PineTab2-device-trees.patch?ref_type=heads [5] https://github.com/dreemurrs-embedded/linux-pinetab2/tree/v6.6.7-danctnix1 Signed-off-by: Manuel Traut --- Changes in v2: - Removed dtb-checker fixups, cause I am not sure if they are correct - Applied review comments for dt bindings - pinetab2 dts: * Remove unverified WLAN entries, as in [5] * Simplify flash LED definition, as in [5] * Fix headphone detection and sound routing, as in [5] * Fix CRU clock configuration - BOE TH101MB31IG002 LCD Panel: * Reworked prepare/enable unprepare/disable, as in [5] - Replaced nicknames by realnames in author and signed-offs - Link to v1: https://lore.kernel.org/r/20231222-pinetab2-v1-0-e148a7f61...@mecka.net --- Alexander Warnecke (2): drm/panel: Add driver for BOE TH101MB31IG002-28A panel arm64: dts: rockchip: Add devicetree for Pine64 Pinetab2 Manuel Traut (2): dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel dt-bindings: arm64: rockchip: Add Pine64 Pinetab2 .../devicetree/bindings/arm/rockchip.yaml | 8 + .../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++ arch/arm64/boot/dts/rockchip/Makefile | 2 + .../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 + .../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 + arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 979 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 348 9 files changed, 1479 insertions(+) --- base-commit: 5254c0cbc92d2a08e75443bdb914f1c4839cdf5a change-id: 20231222-pinetab2-faa77e01db6f Best regards, -- Manuel Traut
Re: [PATCH 4/6] arm64: dts: rockchip: Add devicetree for Pine64 Pinetab2
On Fri, Dec 22, 2023 at 05:49:35PM +0100, Diederik de Haas wrote:
> On Friday, 22 December 2023 12:05:44 CET Manuel Traut wrote:
> > + rk817-sound {
> > + compatible = "simple-audio-card";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&hp_det_l>;
> > + simple-audio-card,format = "i2s";
> > + simple-audio-card,name = "PineTab2";
> > + simple-audio-card,mclk-fs = <256>;
> > +
> > + simple-audio-card,widgets =
> > + "Microphone", "Mic Jack",
> > + "Headphone", "Headphones",
> > + "Microphone", "Microphone",
> > + "Speaker", "Speakers";
> > +
> > + simple-audio-card,routing =
> > + "MICL", "Microphone",
> > + "MICR", "Mic Jack",
> > + "Headphones", "HPOL",
> > + "Headphones", "HPOR",
> > + "Speaker Amplifier INL", "HPOL",
> > + "Speaker Amplifier INR", "HPOR",
> > + "Speakers", "Speaker Amplifier OUTL",
> > + "Speakers", "Speaker Amplifier OUTR";
> > +
> > + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6
> > GPIO_ACTIVE_HIGH>; + simple-audio-card,aux-devs =
> > <&speaker_amp>;
> > + simple-audio-card,pin-switches = "Speakers", "Microphone";
> > +
> > + simple-audio-card,cpu {
> > + sound-dai = <&i2s1_8ch>;
> > + };
> > +
> > + simple-audio-card,codec {
> > + sound-dai = <&rk817>;
> > + };
> > + };
>
> Not sure if it's right (or allowed) to post a different patch as attachment,
> but I have been using a different audio configuration (see attachment).
> I haven't yet tried if/how it works via HDMI yet, but the speakers and
> headphones work fine.
> This patch is based on the following commit:
> https://github.com/TuxThePenguin0/linux/commit/
> 872b829a3511cfa853bd3af3bd4f30be1cb3d1ab
Yes, this fixes the headphone detection. I cannot test HDMI because of a missing
cable.
I will pick the change in v2.
> I've added 'Danct12' to the To list as they are the maintainer of the primary
> PT2 image and we worked together to get to this audio config.
> I don't if they still use it.
> (I've been using my own kernel/image for a while now).
Thanks. I just crossed this repo:
https://github.com/dreemurrs-embedded/linux-pinetab2/tree/v6.6.7-danctnix1
It includes some more improvements I will pick for v2.
Regards
Manuel
> From 17efeb0ae766886345ff0574c534079742539b56 Mon Sep 17 00:00:00 2001
> From: Scott Santucci
> Date: Mon, 17 Jul 2023 13:06:20 +0200
> Subject: [PATCH 3/8] arm64: dts: rk3566-pinetab2: Fix audio configuration
>
> The audio configuration of the PineTab2 matches the `rk817_ext` alsa
> ucm2 profile, so switch the configuration to that. Use `rk817_ext` and
> not `rk817_int` as the PineTab2 uses an external amplifier.
>
> Also the headphones plugged/unplugged detection is backwards, so apply
> the fix provided by Danct12 .
>
> Signed-off-by: Diederik de Haas
> Link: https://github.com/dreemurrs-embedded/Pine64-Arch/pull/555
> ---
> arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> index a766f21bd6f8..59e4bf2f77c7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> @@ -116,14 +116,14 @@ rk817-sound {
> pinctrl-names = "default";
> pinctrl-0 = <&hp_det_l>;
> simple-audio-card,format = "i2s";
> - simple-audio-card,name = "PineTab2";
> + simple-audio-card,name = "rk817_ext";
> simple-audio-card,mclk-fs = <256>;
>
> simple-audio-card,widgets =
> "Microphone", "Mic Jack",
>
Re: [PATCH 4/6] arm64: dts: rockchip: Add devicetree for Pine64 Pinetab2
Hi Diederik,
On Fri, Dec 22, 2023 at 06:01:54PM +0100, Diederik de Haas wrote:
> On Friday, 22 December 2023 12:05:44 CET Manuel Traut wrote:
> > +
> > +&cru {
> > + assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru
> > PLL_VPLL>; + assigned-clock-rates = <12>, <2>,
> > <5>; +};
>
> Attachment seem to work and for this I also have the attached patch in my
> patch set.
> IIRC without it you get an error in dmesg immediately at boot up which is
> visible on the PT2 *if* you have immediate visual output (which is not (yet?)
> the case in my image/kernel).
you can see the message also by calling "dmesg --level err".
I could verify that your patch removes the error message.
I will pick the change for v2.
> Cheers,
> Diederik
> From d782a64f3b51ffb2f33d3ba3e11e2ebc416542e3 Mon Sep 17 00:00:00 2001
> From: Jonas Karlman
> Date: Thu, 17 Aug 2023 17:52:47 +0200
> Subject: [PATCH 6/8] arm64: dts: rk3566-pinetab2: Fix cru assigned clocks
>
> Jonas Karlman provided/linked to the patch on IRC.
> Seems related to upstream commit 64b69474edf3b885c19a89bb165f978ba1b4be00.
>
> Signed-off-by: Diederik de Haas
> Link:
> https://github.com/Kwiboo/u-boot-rockchip/blob/rk3568-2023.10/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi#L11-L15
> Link: https://lore.kernel.org/all/20230110225547.1563119-2-jo...@kwiboo.se/
> ---
> arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> index bbd7ed53602a..4a5bee5a28a7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> @@ -288,8 +288,9 @@ &cpu3 {
> };
>
> &cru {
> - assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
> - assigned-clock-rates = <12>, <2>, <5>;
> + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru
> PLL_PPLL>, <&cru PLL_VPLL>;
> + assigned-clock-rates = <32768>, <12>, <2>, <5>;
> + assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>;
> };
>
> &csi_dphy {
> --
> 2.42.0
>
Re: [PATCH 0/6] arm64: rockchip: Pine64 pinetab2 support
On Fri, Dec 22, 2023 at 05:51:41PM +0100, Diederik de Haas wrote: > On Friday, 22 December 2023 12:05:40 CET Manuel Traut wrote: > > [3] > > https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/ > > mobian-6.6/debian/patches/display/0018-drm-panel-add-BOE-TH101MB31IG002-28A- > > driver.patch?ref_type=heads > > [4] > > https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/ > > mobian-6.6/debian/patches/device-tree/0134-arch-arm64-add-Pine64-PineTab2-de > > vice-trees.patch?ref_type=heads > > FWIW I believe the actual sources are from > https://github.com/TuxThePenguin0/linux/commits/device/pine64-pinetab2_stable Thanks for pointing this out, there are also some other relevant changes. I will take care on this and Krzysztofs review and post a v2 later. Thanks Manuel
[PATCH 6/6] dt-bindings: display: rockchip: dw-hdmi: Add missing sound-dai-cells property
The sound-dai-cells property is used, e.g. in rk356x.dtsi
Signed-off-by: Manuel Traut
---
.../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml| 4
1 file changed, 4 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
index 7e59dee15a5f..43250255fb6f 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
@@ -94,6 +94,9 @@ properties:
- const: default
- const: unwedge
+ '#sound-dai-cells':
+const: 0
+
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -145,6 +148,7 @@ examples:
interrupts = ;
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
clock-names = "iahb", "isfr";
+#sound-dai-cells = <0>;
ports {
port {
--
2.43.0
[PATCH 5/6] arm64: dts: rockchip: Fix some dtb-check warnings
devicetree checks show some warnings:
video-codec@fdea0400: 'interrupt-names' is a required property
from schema $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
hdmi@fe0a: Unevaluated properties are not allowed ('power-domains' were
unexpected)
from schema $id:
http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
i2s@fe42: reset-names:0: 'm' is not one of ['tx-m', 'rx-m']
from schema $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
phy@fe87: 'power-domains' is a required property
from schema $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
Fix them by
- setting a interrupt-name for the video-codec
- remove the unevaluated power-domain property from hdmi
- set reset-names according to the spec for i2s
- add a power-domain property for the CSI phy
Signed-off-by: Manuel Traut
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index c19c0f1b3778..651156759582 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -597,6 +597,7 @@ vpu: video-codec@fdea0400 {
compatible = "rockchip,rk3568-vpu";
reg = <0x0 0xfdea 0x0 0x800>;
interrupts = ;
+ interrupt-names = "vdpu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
iommus = <&vdpu_mmu>;
@@ -819,7 +820,6 @@ hdmi: hdmi@fe0a {
clock-names = "iahb", "isfr", "cec", "ref";
pinctrl-names = "default";
pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
- power-domains = <&power RK3568_PD_VO>;
reg-io-width = <4>;
rockchip,grf = <&grf>;
#sound-dai-cells = <0>;
@@ -1123,7 +1123,7 @@ i2s2_2ch: i2s@fe42 {
dmas = <&dmac1 4>, <&dmac1 5>;
dma-names = "tx", "rx";
resets = <&cru SRST_M_I2S2_2CH>;
- reset-names = "m";
+ reset-names = "tx-m", "rx-m";
rockchip,grf = <&grf>;
pinctrl-names = "default";
pinctrl-0 = <&i2s2m0_sclktx
@@ -1739,6 +1739,7 @@ csi_dphy: phy@fe87 {
clocks = <&cru PCLK_MIPICSIPHY>;
clock-names = "pclk";
#phy-cells = <0>;
+ power-domains = <&power RK3568_PD_VO>;
resets = <&cru SRST_P_MIPICSIPHY>;
reset-names = "apb";
rockchip,grf = <&grf>;
--
2.43.0
[PATCH 0/6] arm64: rockchip: Pine64 pinetab2 support
This adds support for the BOE TH101MB31IG002 LCD Panel used in Pinetab2 [1] and Pinetab-V [2] as well as the devictrees for the Pinetab2 v0.1 and v2.0. The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has been adapted and the LCD init section was simplified. The Pinetab2 devicetree patch was retrieved from [4]. Some renaming was needed to pass the dtb-checks, the brightness-levels are specified as range and steps instead of a list of values. The last to patches fix some dtb-checker warnings that showed up with the new device-trees. [1] https://wiki.pine64.org/wiki/PineTab2 [2] https://wiki.pine64.org/wiki/PineTab-V [3] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/display/0018-drm-panel-add-BOE-TH101MB31IG002-28A-driver.patch?ref_type=heads [4] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/device-tree/0134-arch-arm64-add-Pine64-PineTab2-device-trees.patch?ref_type=heads Signed-off-by: Manuel Traut --- Manuel Traut (4): dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel dt-bindings: arm64: rockchip: Add Pine64 Pinetab2 arm64: dts: rockchip: Fix some dtb-check warnings dt-bindings: display: rockchip: dw-hdmi: Add missing sound-dai-cells property Segfault (2): drm/panel: Add driver for BOE TH101MB31IG002-28A panel arm64: dts: rockchip: Add devicetree for Pine64 Pinetab2 .../devicetree/bindings/arm/rockchip.yaml |8 + .../display/panel/boe,th101mb31ig002-28a.yaml | 73 ++ .../display/rockchip/rockchip,dw-hdmi.yaml |4 + arch/arm64/boot/dts/rockchip/Makefile |2 + .../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 + .../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 + arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 1032 arch/arm64/boot/dts/rockchip/rk356x.dtsi |5 +- drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile |1 + .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 307 ++ 11 files changed, 1513 insertions(+), 2 deletions(-) --- base-commit: 24e0d2e527a39f64caeb2e6be39ad5396fb2da5e change-id: 20231222-pinetab2-faa77e01db6f Best regards, -- Manuel Traut
[PATCH 4/6] arm64: dts: rockchip: Add devicetree for Pine64 Pinetab2
From: Segfault
This includes support for both the v0.1 units that were sent to developers and
the v2.0 units from production.
v1.0 is not included as no units are known to exist.
Working/Tested:
- SDMMC
- UART
- Buttons
- Charging/Battery/PMIC
- Audio
- USB
- Display
WiFi is not added, since the driver is not ready for mainline.
Signed-off-by: Segfault
Signed-off-by: Manuel Traut
---
arch/arm64/boot/dts/rockchip/Makefile |2 +
.../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 +
.../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 +
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 1032
4 files changed, 1106 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index a18f33bf0c0e..ef66c0937a9b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -77,6 +77,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v0.1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v2.0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
new file mode 100644
index ..ba244545ba26
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v0.1";
+ compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ display {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&vcc_wl {
+ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
new file mode 100644
index ..f401ff802175
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-pinetab2.dtsi"
+
+/ {
+ model = "Pine64 PineTab2 v2.0";
+ compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2",
"rockchip,rk3566";
+};
+
+&gpio_keys {
+ pinctrl-0 = <&kb_id_det>, <&hall_int_l>;
+
+ event-hall-sensor {
+ debounce-interval = <20>;
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "Hall Sensor";
+ linux,code = ;
+ linux,input-type = ;
+ wakeup-event-action = ;
+ wakeup-source;
+ };
+};
+
+&lcd {
+ reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+ display {
+ lcd0_rst_l: lcd0-rst-l {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hall {
+ hall_int_l: hall-int-l {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&vcc_wl {
+ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
new file mode 100644
index ..6d320cfee338
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
@@ -0,0 +1,1032 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "rk3566.dtsi"
+
+/ {
+ chassis-type = "tablet";
+
+ aliases {
+ mmc0 = &sdmmc0;
+ mmc1 = &sdhci;
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <180>;
+ poll-interval = <25>;
+
+ button-vol-up {
+ label = "Volume Up";
+ linux,code = ;
+ p
[PATCH 3/6] dt-bindings: arm64: rockchip: Add Pine64 Pinetab2
Add devicvetree binding documentation for Pine64 Pinetab2 which uses the Rockchip RK3566 SoC. Signed-off-by: Manuel Traut --- Documentation/devicetree/bindings/arm/rockchip.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..96d54b0587ab 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -635,6 +635,14 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 + - description: Pine64 PineTab2 +items: + - enum: + - pine64,pinetab2-v0.1 + - pine64,pinetab2-v2.0 + - const: pine64,pinetab2 + - const: rockchip,rk3566 + - description: Pine64 PinePhonePro items: - const: pine64,pinephone-pro -- 2.43.0
[PATCH 1/6] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel
Add bindings for the BOE TH101MB31IG002-28A LCD panel. It is
used e.g. in the Pine64 Pinetab2 and PinetabV.
Signed-off-by: Manuel Traut
---
.../display/panel/boe,th101mb31ig002-28a.yaml | 73 ++
1 file changed, 73 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
new file mode 100644
index ..a8a5e1b4439b
--- /dev/null
+++
b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/boe,th101mb31ig002-28a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: BOE TH101MB31IG002-28A Pine64 Pinetab2 DSI Display Panel
+
+maintainers:
+ - Manuel Traut
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+enum:
+# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
+ - boe,th101mb31ig002-28a
+
+ reg:
+description: the virtual channel number of a DSI peripheral
+
+ backlight:
+description: phandle of the backlight device attached to the panel
+
+ enable-gpios:
+description: a GPIO spec for the enable pin
+
+ power-supply:
+description: core voltage supply
+
+
+ ports: true
+ rotation: true
+
+required:
+ - compatible
+ - reg
+ - enable-gpios
+ - power-supply
+
+additionalProperties: false
+
+examples:
+ - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "boe,th101mb31ig002-28a";
+reg = <0>;
+backlight = <&backlight_lcd0>;
+enable-gpios = <&pio 45 0>;
+rotation = <90>;
+power-supply = <&vcc_3v3>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+port@0 {
+reg = <0>;
+#address-cells = <1>;
+#size-cells = <0>;
+panel_in_dsi: endpoint@0 {
+reg = <0>;
+remote-endpoint = <&dsi0_out_con>;
+};
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH 2/6] drm/panel: Add driver for BOE TH101MB31IG002-28A panel
From: Segfault
The BOE TH101MB31IG002-28A panel is a WXGA panel.
It is used in Pine64 Pinetab2 and PinetabV.
Signed-off-by: Segfault
Signed-off-by: Manuel Traut
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 307 +
3 files changed, 319 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..927ddd10e688 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
24 bit RGB per pixel. It provides a MIPI DSI interface to
the host and has a built-in LED backlight.
+config DRM_PANEL_BOE_TH101MB31UIG002_28A
+ tristate "Boe TH101MB31UIG002-28A panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for Boe
+ TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
+ resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
+ interface to the host and has a built-in LED backlight.
+
config DRM_PANEL_BOE_TV101WUM_NL6
tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..dd6e1ac9d0a2 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) +=
panel-asus-z00t-tm5p5-n35596.
obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
+obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) +=
panel-boe-th101mb31ig002-28a.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
new file mode 100644
index ..ac1dc99a0300
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
@@ -0,0 +1,307 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Alexander Warnecke
+ * Copyright (c) 2023 Manuel Traut
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+struct boe_th101mb31ig002 {
+ struct drm_panel panel;
+ bool enabled;
+ bool prepared;
+
+ struct mipi_dsi_device *dsi;
+
+ struct regulator *power;
+ struct gpio_desc *enable;
+ struct gpio_desc *reset;
+
+ enum drm_panel_orientation orientation;
+};
+
+static int boe_th101mb31ig002_disable(struct drm_panel *panel)
+{
+ struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+
+ if (!ctx->enabled)
+ return 0;
+
+ mipi_dsi_dcs_set_display_off(ctx->dsi);
+ msleep(120);
+ ctx->enabled = false;
+
+ return 0;
+}
+
+static int boe_th101mb31ig002_unprepare(struct drm_panel *panel)
+{
+ struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+
+ if (!ctx->prepared)
+ return 0;
+
+ mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
+ msleep(220);
+ gpiod_set_value_cansleep(ctx->reset, 1);
+ gpiod_set_value_cansleep(ctx->enable, 0);
+ regulator_disable(ctx->power);
+ ctx->prepared = false;
+
+ return 0;
+}
+
+static int boe_th101mb31ig002_prepare(struct drm_panel *panel)
+{
+ struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ int ret;
+
+ if (ctx->prepared)
+ return 0;
+
+ ret = regulator_enable(ctx->power);
+ if (ret) {
+ dev_err(&dsi->dev, "Failed to enable power supply: %d\n", ret);
+ return ret;
+ }
+
+ gpiod_set_value_cansleep(ctx->enable, 1);
+ msleep(120);
+ gpiod_direction_output(ctx->reset, 1);
+ msleep(120);
+ gpiod_direction_output(ctx->reset, 0);
+ msleep(120);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0
