Spread spectrum AMD RX 470
Hello, does any one know how to disable spread spectrum on the DP outputs of a AMD RX 470? I tried to call the funktion amdgpu_atombios_crtc_program_ss(), but this seems to do not work any more. Are there any other solutions? -- Mit freundlichen Grüßen / kind regards - LXCO Technologies AG Peter Blum peter.b...@lxco.com Tel. +49 (0)30 - 700 767 44 Fax +49 (0)30 - 700 767 14 Colditzstrasse 34-36D-12099 Berlin Haus 12 - EGGermany Berlin Charlottenburg HRB 69723 USt.IdNr.: DE 812 689 951 Aufsichtsratsvors.: Manfred Freisberg Vorstand: Jürgen Bullacher - ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
drm/radeon: MST support HD7990 with Asus PQ321
adeon_atom_encoder_dpms] encoder dpms 33 to mode 3, devices 0008, active_devices [ 106.129166] [drm:radeon_atom_encoder_dpms] encoder dpms 33 to mode 3, devices 0080, active_devices 0080 [ 106.129170] [drm:radeon_atom_encoder_dpms] encoder dpms 32 to mode 3, devices 0200, active_devices [ 106.129177] [drm:radeon_atom_encoder_dpms] encoder dpms 30 to mode 3, devices 0400, active_devices [ 106.129180] [drm:radeon_atom_encoder_dpms] encoder dpms 21 to mode 3, devices 0001, active_devices [ 106.129194] [drm:radeon_mst_find_connector] checking f4ef5400 vs f4ef4000 [ 106.129195] [drm:radeon_mst_find_connector] checking f4ef4600 vs f4ef4000 [ 106.129197] [drm:radeon_mst_find_connector] checking f4ef5400 vs f4ef5800 [ 106.129198] [drm:radeon_mst_find_connector] checking f4ef4600 vs f4ef5800 [ 106.129242] [drm:drm_mode_getconnector] [CONNECTOR:55:?] [ 106.129244] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-5] [ 106.129247] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-5] disconnected [ 106.129251] [drm:drm_mode_getconnector] [CONNECTOR:55:?] [ 106.129252] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-5] [ 106.129253] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-5] disconnected [ 106.129256] [drm:drm_mode_getconnector] [CONNECTOR:62:?] [ 106.129258] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:62:DP-6] [ 106.129259] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:62:DP-6] disconnected [ 106.129261] [drm:drm_mode_getconnector] [CONNECTOR:62:?] [ 106.129262] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:62:DP-6] [ 106.129263] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:62:DP-6] disconnected [ 106.129563] [drm:radeon_dp_mst_check_status] got esi2 02 00 00 [ 106.129565] [drm:radeon_dp_mst_check_status] got esi 02 00 00 -- Mit freundlichen GrüÃen / kind regards - Peter Blum LXCO Technologies AG ColditzstraÃe 34-36 D-12099 Berlin Tel: +49 (0)30 700 767 44 Fax: +49 (0)30 700 767 14 Aufsichtsratsvors.: Manfred Freisberg Vorstand: Jürgen Bullacher Amtsgericht Berlin Charlottenburg, HRB 69723
Wrong vsync offset calculation in drm_edid.c
This patch is a bug fix for the file drm_edid.c of the kernel 3.8. The vsync offset is calculated wrong from the EDID set because of the wrong shift direction. We could measure the bad old setting and also the good new setting after the bug fix. Signed-off-by: Peter Blum diff -Naur a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c --- a/drivers/gpu/drm/drm_edid.c2013-02-19 00:58:34.0 +0100 +++ b/drivers/gpu/drm/drm_edid.c2013-03-07 12:04:24.527609783 +0100 @@ -893,7 +893,7 @@ unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; - unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; + unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); /* ignore tiny modes */
Wrong vsync offset calculation in drm_edid.c
This patch is a bug fix for the file drm_edid.c of the kernel 3.8. The vsync offset is calculated wrong from the EDID set because of the wrong shift direction. We could measure the bad old setting and also the good new setting after the bug fix. Signed-off-by: Peter Blum peter.b...@lxco.com diff -Naur a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c --- a/drivers/gpu/drm/drm_edid.c2013-02-19 00:58:34.0 +0100 +++ b/drivers/gpu/drm/drm_edid.c2013-03-07 12:04:24.527609783 +0100 @@ -893,7 +893,7 @@ unsigned vblank = (pt-vactive_vblank_hi 0xf) 8 | pt-vblank_lo; unsigned hsync_offset = (pt-hsync_vsync_offset_pulse_width_hi 0xc0) 2 | pt-hsync_offset_lo; unsigned hsync_pulse_width = (pt-hsync_vsync_offset_pulse_width_hi 0x30) 4 | pt-hsync_pulse_width_lo; - unsigned vsync_offset = (pt-hsync_vsync_offset_pulse_width_hi 0xc) 2 | pt-vsync_offset_pulse_width_lo 4; + unsigned vsync_offset = (pt-hsync_vsync_offset_pulse_width_hi 0xc) 2 | pt-vsync_offset_pulse_width_lo 4; unsigned vsync_pulse_width = (pt-hsync_vsync_offset_pulse_width_hi 0x3) 4 | (pt-vsync_offset_pulse_width_lo 0xf); /* ignore tiny modes */ ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
