[PATCH] drm/hisilicon/hibmc: add gamma_set function
add gamma_set function, and we can also use it to adjust the brightness of the
display.
Signed-off-by: Zhihui Chen
---
.../gpu/drm/hisilicon/hibmc/hibmc_drm_de.c| 37 +++
.../gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h | 5 +++
2 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 24de937c1cb1..f1ce6cb099d0 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -456,6 +456,42 @@ static void hibmc_crtc_disable_vblank(struct drm_crtc
*crtc)
priv->mmio + HIBMC_RAW_INTERRUPT_EN);
}
+static void hibmc_crtc_load_lut(struct drm_crtc *crtc)
+{
+ struct hibmc_drm_private *priv = crtc->dev->dev_private;
+ void __iomem *mmio = priv->mmio;
+ u16 *r, *g, *b;
+ unsigned int reg;
+ int i;
+
+ r = crtc->gamma_store;
+ g = r + crtc->gamma_size;
+ b = g + crtc->gamma_size;
+
+ for (i = 0; i < crtc->gamma_size; i++) {
+ unsigned int offset = i << 2;
+ u8 red = *r++ >> 8;
+ u8 green = *g++ >> 8;
+ u8 blue = *b++ >> 8;
+ u32 rgb = (red << 16) | (green << 8) | blue;
+
+ writel(rgb, mmio + HIBMC_CRT_PALETTE + offset);
+ }
+
+ reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
+ reg |= HIBMC_FIELD(HIBMC_CTL_DISP_CTL_GAMMA, 1);
+ writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL);
+}
+
+static int hibmc_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
+ u16 *blue, uint32_t size,
+ struct drm_modeset_acquire_ctx *ctx)
+{
+ hibmc_crtc_load_lut(crtc);
+
+ return 0;
+}
+
static const struct drm_crtc_funcs hibmc_crtc_funcs = {
.page_flip = drm_atomic_helper_page_flip,
.set_config = drm_atomic_helper_set_config,
@@ -465,6 +501,7 @@ static const struct drm_crtc_funcs hibmc_crtc_funcs = {
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.enable_vblank = hibmc_crtc_enable_vblank,
.disable_vblank = hibmc_crtc_disable_vblank,
+ .gamma_set = hibmc_crtc_gamma_set,
};
static const struct drm_crtc_helper_funcs hibmc_crtc_helper_funcs = {
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
index b9e20cfcfb5a..9b7e85947113 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
@@ -91,6 +91,9 @@
#define HIBMC_CRT_DISP_CTL_TIMING(x) ((x) << 8)
#define HIBMC_CRT_DISP_CTL_TIMING_MASK 0x100
+#define HIBMC_CTL_DISP_CTL_GAMMA(x)((x) << 3)
+#define HIBMC_CTL_DISP_CTL_GAMMA_MASK 0x08
+
#define HIBMC_CRT_DISP_CTL_PLANE(x)((x) << 2)
#define HIBMC_CRT_DISP_CTL_PLANE_MASK 4
@@ -193,5 +196,7 @@
#define CRT_PLL2_HS_148MHZ 0xB0CD
#define CRT_PLL2_HS_193MHZ 0xC0872B02
+#define HIBMC_CRT_PALETTE 0x80C00
+
#define HIBMC_FIELD(field, value) (field(value) & field##_MASK)
#endif
--
2.20.1
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[PATCH] drm/hisilicon/hibmc: set obj[0] field when creating fb
without the obj[0] set, we can see the following panic:
[ 29.236764] pstate: 2049 (nzCv daif +PAN -UAO)
[ 29.241532] pc : drm_gem_vram_offset+0x10/0x28 [drm_vram_helper]
[ 29.247511] lr : hibmc_plane_atomic_update+0x30/0xe0 [hibmc_drm]
[ 29.253490] sp : 003fab713a50
[ 29.256789] x29: 003fab713a50 x28: 0028
[ 29.262077] x27: 0018 x26: ced52780
[ 29.267363] x25: 203f98dcde00 x24: 0001
[ 29.272650] x23: 0001 x22:
[ 29.277937] x21: x20: 002fb4899580
[ 29.283224] x19: 003fb8767c00 x18:
[ 29.288510] x17: x16:
[ 29.293797] x15: 0010 x14: 332d4341443a3433
[ 29.299084] x13: 3a5245444f434e45 x12: 5b206e6f20746573
[ 29.304371] x11: 65646f6d205d7365 x10: 6c62617369645f74
[ 29.309657] x9 : 88e4d650 x8 : 8000107241d0
[ 29.314944] x7 : x6 : 003fb8766400
[ 29.320231] x5 : 003fb8767c00 x4 : 88e4f320
[ 29.325517] x3 : 002fb3ae5080 x2 : 002fb3ae
[ 29.330804] x1 : x0 : 002fb07f5c00
[ 29.336090] Call trace:
[ 29.338528] drm_gem_vram_offset+0x10/0x28 [drm_vram_helper]
[ 29.344160] drm_atomic_helper_commit_planes+0x144/0x228
[ 29.349447] drm_atomic_helper_commit_tail+0x38/0x78
[ 29.354389] commit_tail+0xb4/0x160
[ 29.357861] drm_atomic_helper_commit+0x134/0x168
[ 29.362543] drm_atomic_commit+0x50/0x60
[ 29.366448] drm_mode_atomic_ioctl+0x724/0xb00
[ 29.370871] drm_ioctl_kernel+0x98/0xe8
[ 29.374690] drm_ioctl+0x26c/0x3d0
[ 29.378077] do_vfs_ioctl+0xafc/0xbb0
[ 29.381722] ksys_ioctl+0x64/0x98
[ 29.385022] __arm64_sys_ioctl+0x24/0x50
[ 29.388929] el0_svc_common.constprop.3+0xf0/0x158
[ 29.393697] el0_svc_handler+0x68/0x80
[ 29.397429] el0_sync_handler+0xa8/0x198
[ 29.401333] el0_sync+0x140/0x180
[ 29.404632] ---[ end trace 4ba9406972d937dd ]---
[ 29.409245] Unexpected kernel BRK exception at EL1
Signed-off-by: Zhihui Chen
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
index 21b684eab5c9..19dc525a73b0 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
@@ -126,6 +126,7 @@ hibmc_framebuffer_init(struct drm_device *dev,
drm_helper_mode_fill_fb_struct(dev, _fb->fb, mode_cmd);
hibmc_fb->obj = obj;
+ hibmc_fb->fb.obj[0] = obj;
ret = drm_framebuffer_init(dev, _fb->fb, _fb_funcs);
if (ret) {
DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
--
2.20.1
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[PATCH] drm/hisilicon/hibmc: add DPMS on/off function
add DPMS function to turn on/off signal of monitor
Signed-off-by: Zhihui Chen
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 16
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h | 6 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 722e369f30d4..24de937c1cb1 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -189,6 +189,20 @@ static struct drm_plane *hibmc_plane_init(struct
hibmc_drm_private *priv)
return plane;
}
+static void hibmc_crtc_dpms(struct drm_crtc *crtc, int dpms)
+{
+ struct hibmc_drm_private *priv = crtc->dev->dev_private;
+ unsigned int reg;
+
+ reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
+ reg &= ~HIBMC_CRT_DISP_CTL_DPMS_MASK;
+ reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_DPMS, dpms);
+ reg &= ~HIBMC_CRT_DISP_CTL_TIMING_MASK;
+ if (dpms == HIBMC_CRT_DPMS_ON)
+ reg |= HIBMC_CRT_DISP_CTL_TIMING(1);
+ writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL);
+}
+
static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
@@ -205,6 +219,7 @@ static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,
reg |= HIBMC_CURR_GATE_DISPLAY(1);
hibmc_set_current_gate(priv, reg);
drm_crtc_vblank_on(crtc);
+ hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_ON);
}
static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,
@@ -213,6 +228,7 @@ static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,
unsigned int reg;
struct hibmc_drm_private *priv = crtc->dev->dev_private;
+ hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_OFF);
drm_crtc_vblank_off(crtc);
hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_SLEEP);
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
index b63a1ee15ceb..b9e20cfcfb5a 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
@@ -68,6 +68,12 @@
#define HIBMC_CRT_DISP_CTL 0x80200
+#define HIBMC_CRT_DISP_CTL_DPMS(x) ((x) << 30)
+#define HIBMC_CRT_DISP_CTL_DPMS_MASK 0xc000
+
+#define HIBMC_CRT_DPMS_ON 0
+#define HIBMC_CRT_DPMS_OFF 3
+
#define HIBMC_CRT_DISP_CTL_CRTSELECT(x)((x) << 25)
#define HIBMC_CRT_DISP_CTL_CRTSELECT_MASK 0x200
--
2.20.1
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[PATCH] drm/hisilicon/hibmc: fix 'xset dpms force off' fail
both crtc_state->adjusted_mode.hdisplay and crtc_state->adjusted_mode.vdisplay are 0 when switch dpms off, return -EINVAL cause switch dpms off fail. Signed-off-by: Zhihui Chen --- drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c index 6527a97f68a3..722e369f30d4 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c @@ -80,6 +80,9 @@ static int hibmc_plane_atomic_check(struct drm_plane *plane, return -EINVAL; } + if (!crtc_state->enable) + return 0; + if (state->crtc_x + state->crtc_w > crtc_state->adjusted_mode.hdisplay || state->crtc_y + state->crtc_h > -- 2.20.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
