[PATCH v2] drm/i915/quirk: Add quirk for devices with incorrect PWM frequency
Cyernet T10C has a bad default PWM frequency causing the display to
strobe when the brightness is less than 100%. Create a new quirk to use
the value from the BIOS rather than the default register value.
Signed-off-by: Allen Ballway
---
V1 -> V2: Fix style issues.
.../gpu/drm/i915/display/intel_backlight.c| 6 +++--
drivers/gpu/drm/i915/display/intel_quirks.c | 26 +++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..b4171952343eb 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1385,8 +1385,10 @@ static int vlv_setup_backlight(struct intel_connector
*connector, enum pipe pipe
ctl2 = intel_de_read(i915, VLV_BLC_PWM_CTL2(pipe));
panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
- ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
- panel->backlight.pwm_level_max = ctl >> 16;
+ if (!intel_has_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY)) {
+ ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
+ panel->backlight.pwm_level_max = ctl >> 16;
+ }
if (!panel->backlight.pwm_level_max)
panel->backlight.pwm_level_max =
get_backlight_max_vbt(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..ff6cb499428ce 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
drm_i915_private *i915)
drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
}
+static void quirk_ignore_default_pwm_frequency(struct drm_i915_private *i915)
+{
+ intel_set_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY);
+ drm_info(&i915->drm, "Applying ignore default pwm frequency quirk");
+}
+
struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
dmi_system_id *id)
return 1;
}
+static int intel_dmi_ignore_default_pwm_frequency(const struct dmi_system_id
*id)
+{
+ DRM_INFO("Default PWM frequency is incorrect and is overridden on
%s\n", id->ident);
+ return 1;
+}
+
static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+ {
+ .dmi_id_list = &(const struct dmi_system_id[]) {
+ {
+ .callback =
intel_dmi_ignore_default_pwm_frequency,
+ .ident = "Cybernet T10C Tablet",
+ .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+ "Cybernet
Manufacturing Inc."),
+ DMI_EXACT_MATCH(DMI_BOARD_NAME,
"T10C Tablet"),
+ },
+ },
+ { }
+ },
+ .hook = quirk_ignore_default_pwm_frequency,
+ },
};
static struct intel_quirk intel_quirks[] = {
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..ca34dacf0c242 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+ QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY,
};
void intel_init_quirks(struct drm_i915_private *i915);
--
2.42.0.869.gea05f2083d-goog
[PATCH] drm/i915/quirk: Add quirk for devices with incorrect PWM frequency
Cyernet T10C has a bad default PWM frequency causing the display to
strobe when the brightness is less than 100%. Create a new quirk to use
the value from the BIOS rather than the default register value.
Signed-off-by: Allen Ballway
---
.../gpu/drm/i915/display/intel_backlight.c| 3 ++-
drivers/gpu/drm/i915/display/intel_quirks.c | 26 +++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..c4dcfece9deca 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1388,7 +1388,8 @@ static int vlv_setup_backlight(struct intel_connector
*connector, enum pipe pipe
ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
panel->backlight.pwm_level_max = ctl >> 16;
- if (!panel->backlight.pwm_level_max)
+ if (!panel->backlight.pwm_level_max ||
+ intel_has_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY))
panel->backlight.pwm_level_max =
get_backlight_max_vbt(connector);
if (!panel->backlight.pwm_level_max)
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..ff6cb499428ce 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
drm_i915_private *i915)
drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
}
+static void quirk_ignore_default_pwm_frequency(struct drm_i915_private *i915)
+{
+ intel_set_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY);
+ drm_info(&i915->drm, "Applying ignore default pwm frequency quirk");
+}
+
struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
dmi_system_id *id)
return 1;
}
+static int intel_dmi_ignore_default_pwm_frequency(const struct dmi_system_id
*id)
+{
+ DRM_INFO("Default PWM frequency is incorrect and is overridden on
%s\n", id->ident);
+ return 1;
+}
+
static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+ {
+ .dmi_id_list = &(const struct dmi_system_id[]) {
+ {
+ .callback =
intel_dmi_ignore_default_pwm_frequency,
+ .ident = "Cybernet T10C Tablet",
+ .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+ "Cybernet
Manufacturing Inc."),
+ DMI_EXACT_MATCH(DMI_BOARD_NAME,
"T10C Tablet"),
+ },
+ },
+ { }
+ },
+ .hook = quirk_ignore_default_pwm_frequency,
+ },
};
static struct intel_quirk intel_quirks[] = {
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..70589505e5a0e 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+ QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY
};
void intel_init_quirks(struct drm_i915_private *i915);
--
2.42.0.655.g421f12c284-goog
[PATCH v3 RESEND] drm/i915/quirk: Add quirk for devices that cannot be dimmed
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
V2 -> V3: Fix typo.
V1 -> V2: Fix style issue.
.../gpu/drm/i915/display/intel_backlight.c| 5
drivers/gpu/drm/i915/display/intel_quirks.c | 27 +++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..f015563d3ebd5 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1192,6 +1192,11 @@ static u32 get_backlight_min_vbt(struct intel_connector
*connector)
drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
+ if (intel_has_quirk(i915, QUIRK_NO_DIM)) {
+ /* Cannot dim backlight, set minimum to highest value */
+ return panel->backlight.pwm_level_max - 1;
+ }
+
/*
* XXX: If the vbt value is 255, it makes min equal to max, which leads
* to problems. There are such machines out there. Either our
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..910c95840a539 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
drm_i915_private *i915)
drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
}
+static void quirk_no_dim(struct drm_i915_private *i915)
+{
+ intel_set_quirk(i915, QUIRK_NO_DIM);
+ drm_info(&i915->drm, "Applying no dim quirk\n");
+}
+
struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
dmi_system_id *id)
return 1;
}
+static int intel_dmi_no_dim(const struct dmi_system_id *id)
+{
+ DRM_INFO("No dimming allowed on %s\n", id->ident);
+ return 1;
+}
+
static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+ {
+ .dmi_id_list = &(const struct dmi_system_id[]) {
+ {
+ .callback = intel_dmi_no_dim,
+ .ident = "Cybernet T10C Tablet",
+ .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+ "Cybernet
Manufacturing Inc."),
+ DMI_EXACT_MATCH(DMI_BOARD_NAME,
"T10C Tablet"),
+ },
+ },
+ { }
+ },
+ .hook = quirk_no_dim,
+ },
};
static struct intel_quirk intel_quirks[] = {
@@ -218,6 +244,7 @@ void intel_init_quirks(struct drm_i915_private *i915)
q->subsystem_device == PCI_ANY_ID))
q->hook(i915);
}
+
for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
intel_dmi_quirks[i].hook(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..b41c7bbf0a5e3 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+ QUIRK_NO_DIM,
};
void intel_init_quirks(struct drm_i915_private *i915);
--
2.41.0.255.g8b1d071c50-goog
[PATCH] drm/i915/quirk: Add quirk for devices that cannot be dimmed
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
V2 -> V3: Fix typo.
V1 -> V2: Fix style issue.
.../gpu/drm/i915/display/intel_backlight.c| 5
drivers/gpu/drm/i915/display/intel_quirks.c | 27 +++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..f015563d3ebd5 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1192,6 +1192,11 @@ static u32 get_backlight_min_vbt(struct intel_connector
*connector)
drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
+ if (intel_has_quirk(i915, QUIRK_NO_DIM)) {
+ /* Cannot dim backlight, set minimum to highest value */
+ return panel->backlight.pwm_level_max - 1;
+ }
+
/*
* XXX: If the vbt value is 255, it makes min equal to max, which leads
* to problems. There are such machines out there. Either our
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..910c95840a539 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
drm_i915_private *i915)
drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
}
+static void quirk_no_dim(struct drm_i915_private *i915)
+{
+ intel_set_quirk(i915, QUIRK_NO_DIM);
+ drm_info(&i915->drm, "Applying no dim quirk\n");
+}
+
struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
dmi_system_id *id)
return 1;
}
+static int intel_dmi_no_dim(const struct dmi_system_id *id)
+{
+ DRM_INFO("No dimming allowed on %s\n", id->ident);
+ return 1;
+}
+
static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+ {
+ .dmi_id_list = &(const struct dmi_system_id[]) {
+ {
+ .callback = intel_dmi_no_dim,
+ .ident = "Cybernet T10C Tablet",
+ .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+ "Cybernet
Manufacturing Inc."),
+ DMI_EXACT_MATCH(DMI_BOARD_NAME,
"T10C Tablet"),
+ },
+ },
+ { }
+ },
+ .hook = quirk_no_dim,
+ },
};
static struct intel_quirk intel_quirks[] = {
@@ -218,6 +244,7 @@ void intel_init_quirks(struct drm_i915_private *i915)
q->subsystem_device == PCI_ANY_ID))
q->hook(i915);
}
+
for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
intel_dmi_quirks[i].hook(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..b41c7bbf0a5e3 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+ QUIRK_NO_DIM,
};
void intel_init_quirks(struct drm_i915_private *i915);
--
2.41.0.255.g8b1d071c50-goog
[PATCH v2] drm/i915/quirk: Add quirk for devices that cannot be dimmed
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
V1 -> V2: Fix style issue.
.../gpu/drm/i915/display/intel_backlight.c| 5
drivers/gpu/drm/i915/display/intel_quirks.c | 27 +++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..049e95105e8b6 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1192,6 +1192,11 @@ static u32 get_backlight_min_vbt(struct intel_connector
*connector)
drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
+ if (intel_has_quirk(i915, QUIRK_NO_DIM)) {
+ /* Cannot dim backlight, set minimum to hightest value */
+ return panel->backlight.pwm_level_max - 1;
+ }
+
/*
* XXX: If the vbt value is 255, it makes min equal to max, which leads
* to problems. There are such machines out there. Either our
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..910c95840a539 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
drm_i915_private *i915)
drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
}
+static void quirk_no_dim(struct drm_i915_private *i915)
+{
+ intel_set_quirk(i915, QUIRK_NO_DIM);
+ drm_info(&i915->drm, "Applying no dim quirk\n");
+}
+
struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
dmi_system_id *id)
return 1;
}
+static int intel_dmi_no_dim(const struct dmi_system_id *id)
+{
+ DRM_INFO("No dimming allowed on %s\n", id->ident);
+ return 1;
+}
+
static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+ {
+ .dmi_id_list = &(const struct dmi_system_id[]) {
+ {
+ .callback = intel_dmi_no_dim,
+ .ident = "Cybernet T10C Tablet",
+ .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+ "Cybernet
Manufacturing Inc."),
+ DMI_EXACT_MATCH(DMI_BOARD_NAME,
"T10C Tablet"),
+ },
+ },
+ { }
+ },
+ .hook = quirk_no_dim,
+ },
};
static struct intel_quirk intel_quirks[] = {
@@ -218,6 +244,7 @@ void intel_init_quirks(struct drm_i915_private *i915)
q->subsystem_device == PCI_ANY_ID))
q->hook(i915);
}
+
for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
intel_dmi_quirks[i].hook(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..b41c7bbf0a5e3 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+ QUIRK_NO_DIM,
};
void intel_init_quirks(struct drm_i915_private *i915);
--
2.41.0.162.gfafddb0af9-goog
[PATCH] drm/i915/quirk: Add quirk for devices that cannot be dimmed
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
.../gpu/drm/i915/display/intel_backlight.c| 6 +
drivers/gpu/drm/i915/display/intel_quirks.c | 27 +++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
3 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..863a33245a3d7 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1192,6 +1192,11 @@ static u32 get_backlight_min_vbt(struct intel_connector
*connector)
drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
+ if (intel_has_quirk(i915, QUIRK_NO_DIM)) {
+ /* Cannot dim backlight, set minimum to hightest value */
+ return panel->backlight.pwm_level_max - 1;
+ }
+
/*
* XXX: If the vbt value is 255, it makes min equal to max, which leads
* to problems. There are such machines out there. Either our
@@ -1206,6 +1211,7 @@ static u32 get_backlight_min_vbt(struct intel_connector
*connector)
connector->panel.vbt.backlight.min_brightness, min);
}
+
/* vbt value is a coefficient in range [0..255] */
return scale(min, 0, 255, 0, panel->backlight.pwm_level_max);
}
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..910c95840a539 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
drm_i915_private *i915)
drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
}
+static void quirk_no_dim(struct drm_i915_private *i915)
+{
+ intel_set_quirk(i915, QUIRK_NO_DIM);
+ drm_info(&i915->drm, "Applying no dim quirk\n");
+}
+
struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
dmi_system_id *id)
return 1;
}
+static int intel_dmi_no_dim(const struct dmi_system_id *id)
+{
+ DRM_INFO("No dimming allowed on %s\n", id->ident);
+ return 1;
+}
+
static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+ {
+ .dmi_id_list = &(const struct dmi_system_id[]) {
+ {
+ .callback = intel_dmi_no_dim,
+ .ident = "Cybernet T10C Tablet",
+ .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+ "Cybernet
Manufacturing Inc."),
+ DMI_EXACT_MATCH(DMI_BOARD_NAME,
"T10C Tablet"),
+ },
+ },
+ { }
+ },
+ .hook = quirk_no_dim,
+ },
};
static struct intel_quirk intel_quirks[] = {
@@ -218,6 +244,7 @@ void intel_init_quirks(struct drm_i915_private *i915)
q->subsystem_device == PCI_ANY_ID))
q->hook(i915);
}
+
for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
intel_dmi_quirks[i].hook(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..b41c7bbf0a5e3 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+ QUIRK_NO_DIM,
};
void intel_init_quirks(struct drm_i915_private *i915);
--
2.41.0.162.gfafddb0af9-goog
[PATCH v2 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes
Add MTU3 nodes for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
Tested-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c0a3afd55eaf..3d88480913eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -908,6 +908,43 @@
status = "disabled";
};
+ ssusb0: usb@11201000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11201000 0 0x2dff>,
+ <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port0 PHY_TYPE_USB2>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host0: usb@1120 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1120 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck";
+ interrupts = ;
+ mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+ wakeup-source;
+ status = "disabled";
+ };
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
@@ -939,6 +976,44 @@
status = "disabled";
};
+ ssusb1: usb@11281000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11281000 0 0x2dff>,
+ <0 0x11283e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port1 PHY_TYPE_USB2>,
+ <&u3port1 PHY_TYPE_USB3>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host1: usb@1128 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1128 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+
[PATCH v2 5/9] arm64: dts: mediatek: mt8186: Add ADSP node
Add ADSP node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a0b7dacc10cd..2700c830316f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,26 @@
interrupts = ;
};
+ adsp: adsp@1068 {
+ compatible = "mediatek,mt8186-dsp";
+ reg = <0 0x1068 0 0x2000>,
+ <0 0x1080 0 0x10>,
+ <0 0x1068b000 0 0x100>,
+ <0 0x1068f000 0 0x1000>;
+ reg-names = "cfg", "sram", "sec", "bus";
+ clocks = <&topckgen CLK_TOP_AUDIODSP>,
+<&topckgen CLK_TOP_ADSP_BUS>;
+ clock-names = "audiodsp",
+ "adsp_bus";
+ assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,
+ <&topckgen CLK_TOP_ADSP_BUS>;
+ assigned-clock-parents = <&clk26m>, <&topckgen
CLK_TOP_MAINPLL_D2_D2>;
+ mbox-names = "rx", "tx";
+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;
+ status = "disabled";
+ };
+
adsp_mailbox0: mailbox@10686000 {
compatible = "mediatek,mt8186-adsp-mbox";
#mbox-cells = <0>;
--
2.18.0
[PATCH v2 6/9] arm64: dts: mediatek: mt8186: Add audio controller node
Add audio controller node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 2700c830316f..c52f9be1e750 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -998,6 +998,68 @@
};
};
+ afe: audio-controller@1121 {
+ compatible = "mediatek,mt8186-sound";
+ reg = <0 0x1121 0 0x2000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>,
+<&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>,
+<&topckgen CLK_TOP_AUDIO>,
+<&topckgen CLK_TOP_AUD_INTBUS>,
+<&topckgen CLK_TOP_MAINPLL_D2_D4>,
+<&topckgen CLK_TOP_AUD_1>,
+<&apmixedsys CLK_APMIXED_APLL1>,
+<&topckgen CLK_TOP_AUD_2>,
+<&apmixedsys CLK_APMIXED_APLL2>,
+<&topckgen CLK_TOP_AUD_ENGEN1>,
+<&topckgen CLK_TOP_APLL1_D8>,
+<&topckgen CLK_TOP_AUD_ENGEN2>,
+<&topckgen CLK_TOP_APLL2_D8>,
+<&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
+<&topckgen CLK_TOP_APLL12_CK_DIV0>,
+<&topckgen CLK_TOP_APLL12_CK_DIV1>,
+<&topckgen CLK_TOP_APLL12_CK_DIV2>,
+<&topckgen CLK_TOP_APLL12_CK_DIV4>,
+<&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
+<&topckgen CLK_TOP_AUDIO_H>,
+<&clk26m>;
+ clock-names = "aud_infra_clk",
+ "mtkaif_26m_clk",
+ "top_mux_audio",
+ "top_mux_audio_int",
+ "top_mainpll_d2_d4",
+ "top_mux_aud_1",
+ "top_apll1_ck",
+ "top_mux_aud_2",
+ "top_apll2_ck",
+ "top_mux_aud_eng1",
+ "top_apll1_d8",
+ "top_mux_aud_eng2",
+ "top_apll2_d8",
+ "top_i2s0_m_sel",
+ "top_i2s1_m_sel",
+ "top_i2s2_m_sel",
+ "top_i2s4_m_sel",
+ "top_tdm_m_sel",
+ "top_apll12_div0",
+ "top_apll12_div1",
+ "top_apll12_div2",
+ "top_apll12_div4",
+ "top_apll12_div_tdm",
+ "top_mux_audio_h",
+ "top_clk26m_clk";
+ interrupts = ;
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,infracfg = <&infracfg_ao>;
+ mediatek,topckgen = <&topckgen>;
+ resets = <&watchdog MT8186_TOPRGU_AUDIO_SW_RST>;
+ reset-names = "audiosys";
+ status = "disabled";
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
--
2.18.0
[PATCH v2 7/9] arm64: dts: mediatek: mt8186: Add DPI node
Add DPI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
Tested-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c52f9be1e750..45b9d6777929 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1230,6 +1230,23 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ dpi: dpi@1400a000 {
+ compatible = "mediatek,mt8186-dpi";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_DPI>,
+<&mmsys CLK_MM_DISP_DPI>,
+<&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ assigned-clocks = <&topckgen CLK_TOP_DPI>;
+ assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+ interrupts = ;
+ status = "disabled";
+
+ port {
+ dpi_out: endpoint { };
+ };
+ };
+
dsi0: dsi@14013000 {
compatible = "mediatek,mt8186-dsi";
reg = <0 0x14013000 0 0x1000>;
--
2.18.0
[PATCH v2 4/9] arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes
Add ADSP mailbox node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a8ff984f1192..a0b7dacc10cd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,20 @@
interrupts = ;
};
+ adsp_mailbox0: mailbox@10686000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10686100 0 0x1000>;
+ interrupts = ;
+ };
+
+ adsp_mailbox1: mailbox@10687000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10687100 0 0x1000>;
+ interrupts = ;
+ };
+
nor_flash: spi@1100 {
compatible = "mediatek,mt8186-nor";
reg = <0 0x1100 0 0x1000>;
--
2.18.0
[PATCH v2 9/9] arm64: dts: mediatek: mt8186: Add display nodes
Add display nodes and GCE info for MT8186 SoC. Also, add GCE
(Global Command Engine) properties to the display nodes in order to
enable the usage of the CMDQ (Command Queue), which is required for
operating the display.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 135 +++
1 file changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 45b9d6777929..90d1b631bc8f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -5,6 +5,7 @@
*/
/dts-v1/;
#include
+#include
#include
#include
#include
@@ -19,6 +20,13 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ ovl = &ovl;
+ ovl_2l= &ovl_2l;
+ rdma0 = &rdma0;
+ rdma1 = &rdma1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -632,6 +640,15 @@
clocks = <&clk13m>;
};
+ gce: mailbox@1022c000 {
+ compatible = "mediatek,mt8186-gce";
+ reg = <0 0X1022c000 0 0x4000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ clock-names = "gce";
+ interrupts = ;
+ #mbox-cells = <2>;
+ };
+
scp: scp@1050 {
compatible = "mediatek,mt8186-scp";
reg = <0 0x1050 0 0x4>,
@@ -1197,6 +1214,20 @@
reg = <0 0x1400 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
+ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0
0x1000>;
+ };
+
+ mutex: mutex@14001000 {
+ compatible = "mediatek,mt8186-disp-mutex";
+ reg = <0 0x14001000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
+ interrupts = ;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401 0x1000
0x1000>;
+ mediatek,gce-events =
,
+
;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
smi_common: smi@14002000 {
@@ -1230,6 +1261,49 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ ovl: ovl@14005000 {
+ compatible = "mediatek,mt8186-disp-ovl",
+"mediatek,mt8192-disp-ovl";
+ reg = <0 0x14005000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L0_OVL_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x5000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ ovl_2l: ovl@14006000 {
+ compatible = "mediatek,mt8186-disp-ovl-2l",
+"mediatek,mt8192-disp-ovl-2l";
+ reg = <0 0x14006000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_OVL_2L_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x6000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ rdma0: rdma@14007000 {
+ compatible = "mediatek,mt8186-disp-rdma",
+"mediatek,mt8183-disp-rdma";
+ reg = <0 0x14007000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x7000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ color: color@14009000 {
+ compatible = "mediatek,mt8186-disp-color",
+
[PATCH v2 8/9] dt-bindings: display: mediatek: Fix the fallback for mediatek, mt8186-disp-ccorr
The mt8186-disp-ccorr is not fully compatible with the mt8183-disp-ccorr
implementation. It causes a crash when system resumes if it binds to the
device.
We should use mt8192-disp-ccorr as fallback of mt8186-disp-ccorr.
Fixes: 8a26ea19d4dc ("dt-bindings: display: mediatek: add MT8186 SoC binding")
Signed-off-by: Allen-KH Cheng
Reviewed-by: Rob Herring
---
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index 63fb02014a56..117e3db43f84 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -32,7 +32,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-ccorr
- - const: mediatek,mt8183-disp-ccorr
+ - const: mediatek,mt8192-disp-ccorr
reg:
maxItems: 1
--
2.18.0
[PATCH v2 3/9] arm64: dts: mediatek: mt8186: Add SPMI node
Add SPMI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 3d88480913eb..a8ff984f1192 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -605,6 +605,25 @@
clock-names = "spi", "wrap";
};
+ spmi: spmi@10015000 {
+ compatible = "mediatek,mt8186-spmi",
+"mediatek,mt8195-spmi";
+ reg = <0 0x10015000 0 0x000e00>,
+ <0 0x1001B000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+<&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+<&topckgen CLK_TOP_SPMI_MST>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>;
+ assigned-clock-parents = <&topckgen
CLK_TOP_ULPOSC1_D10>;
+ interrupts = ,
+;
+ status = "disabled";
+ };
+
systimer: timer@10017000 {
compatible = "mediatek,mt8186-timer",
"mediatek,mt6765-timer";
--
2.18.0
[PATCH v2 2/9] dt-bindings: spmi: spmi-mtk-pmif: Document mediatek, mt8195-spmi as fallback of mediatek, mt8186-spmi
The mt8186-spmi is used as compatible with mt8195-spmi on the MT8186, document this situation. Signed-off-by: Allen-KH Cheng Reviewed-by: Rob Herring --- .../devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index abcbbe13723f..e4f465abcfe9 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -18,9 +18,14 @@ allOf: properties: compatible: -enum: - - mediatek,mt6873-spmi - - mediatek,mt8195-spmi +oneOf: + - enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + - items: + - enum: + - mediatek,mt8186-spmi + - const: mediatek,mt8195-spmi reg: maxItems: 2 -- 2.18.0
[PATCH v2 0/9] Add and update some driver nodes for MT8186 SoC
This series is based on matthias github, for-next. Changes since v1: - Remove the unnecessary trailing number - Add aliases for ovl* and rdma* Allen-KH Cheng (9): arm64: dts: mediatek: mt8186: Add MTU3 nodes dt-bindings: spmi: spmi-mtk-pmif: Document mediatek,mt8195-spmi as fallback of mediatek,mt8186-spmi arm64: dts: mediatek: mt8186: Add SPMI node arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes arm64: dts: mediatek: mt8186: Add ADSP node arm64: dts: mediatek: mt8186: Add audio controller node arm64: dts: mediatek: mt8186: Add DPI node dt-bindings: display: mediatek: Fix the fallback for mediatek,mt8186-disp-ccorr arm64: dts: mediatek: mt8186: Add display nodes .../display/mediatek/mediatek,ccorr.yaml | 2 +- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 +- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 342 ++ 3 files changed, 351 insertions(+), 4 deletions(-) -- 2.18.0
[PATCH 7/9] arm64: dts: mediatek: mt8186: Add DPI node
Add DPI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c52f9be1e750..eab30ab01572 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1230,6 +1230,23 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ dpi0: dpi@1400a000 {
+ compatible = "mediatek,mt8186-dpi";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_DPI>,
+<&mmsys CLK_MM_DISP_DPI>,
+<&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ assigned-clocks = <&topckgen CLK_TOP_DPI>;
+ assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+ interrupts = ;
+ status = "disabled";
+
+ port {
+ dpi_out: endpoint { };
+ };
+ };
+
dsi0: dsi@14013000 {
compatible = "mediatek,mt8186-dsi";
reg = <0 0x14013000 0 0x1000>;
--
2.18.0
[PATCH 5/9] arm64: dts: mediatek: mt8186: Add ADSP node
Add ADSP node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a0b7dacc10cd..2700c830316f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,26 @@
interrupts = ;
};
+ adsp: adsp@1068 {
+ compatible = "mediatek,mt8186-dsp";
+ reg = <0 0x1068 0 0x2000>,
+ <0 0x1080 0 0x10>,
+ <0 0x1068b000 0 0x100>,
+ <0 0x1068f000 0 0x1000>;
+ reg-names = "cfg", "sram", "sec", "bus";
+ clocks = <&topckgen CLK_TOP_AUDIODSP>,
+<&topckgen CLK_TOP_ADSP_BUS>;
+ clock-names = "audiodsp",
+ "adsp_bus";
+ assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,
+ <&topckgen CLK_TOP_ADSP_BUS>;
+ assigned-clock-parents = <&clk26m>, <&topckgen
CLK_TOP_MAINPLL_D2_D2>;
+ mbox-names = "rx", "tx";
+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;
+ status = "disabled";
+ };
+
adsp_mailbox0: mailbox@10686000 {
compatible = "mediatek,mt8186-adsp-mbox";
#mbox-cells = <0>;
--
2.18.0
[PATCH 8/9] dt-bindings: display: mediatek: Fix the fallback for mediatek, mt8186-disp-ccorr
The mt8186-disp-ccorr is not fully compatible with the mt8183-disp-ccorr
implementation. It causes a crash when system resumes if it binds to the
device.
We should use mt8192-disp-ccorr as fallback of mt8186-disp-ccorr.
Fixes: 8a26ea19d4dc ("dt-bindings: display: mediatek: add MT8186 SoC binding")
Signed-off-by: Allen-KH Cheng
---
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index 63fb02014a56..117e3db43f84 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -32,7 +32,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-ccorr
- - const: mediatek,mt8183-disp-ccorr
+ - const: mediatek,mt8192-disp-ccorr
reg:
maxItems: 1
--
2.18.0
[PATCH 4/9] arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes
Add ADSP mailbox node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a8ff984f1192..a0b7dacc10cd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,20 @@
interrupts = ;
};
+ adsp_mailbox0: mailbox@10686000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10686100 0 0x1000>;
+ interrupts = ;
+ };
+
+ adsp_mailbox1: mailbox@10687000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10687100 0 0x1000>;
+ interrupts = ;
+ };
+
nor_flash: spi@1100 {
compatible = "mediatek,mt8186-nor";
reg = <0 0x1100 0 0x1000>;
--
2.18.0
[PATCH 9/9] arm64: dts: mediatek: mt8186: Add display nodes
Add display nodes and GCE info for MT8186 SoC. Also, add GCE
(Global Command Engine) properties to the display nodes in order to
enable the usage of the CMDQ (Command Queue), which is required for
operating the display.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 128 +++
1 file changed, 128 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index eab30ab01572..8670d37970ef 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -5,6 +5,7 @@
*/
/dts-v1/;
#include
+#include
#include
#include
#include
@@ -632,6 +633,15 @@
clocks = <&clk13m>;
};
+ gce: mailbox@1022c000 {
+ compatible = "mediatek,mt8186-gce";
+ reg = <0 0X1022c000 0 0x4000>;
+ interrupts = ;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ clock-names = "gce";
+ };
+
scp: scp@1050 {
compatible = "mediatek,mt8186-scp";
reg = <0 0x1050 0 0x4>,
@@ -1197,6 +1207,20 @@
reg = <0 0x1400 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
+ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0
0x1000>;
+ };
+
+ mutex: mutex@14001000 {
+ compatible = "mediatek,mt8186-disp-mutex";
+ reg = <0 0x14001000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
+ interrupts = ;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401 0x1000
0x1000>;
+ mediatek,gce-events =
,
+
;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
smi_common: smi@14002000 {
@@ -1230,6 +1254,49 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ ovl0: ovl@14005000 {
+ compatible = "mediatek,mt8186-disp-ovl",
+"mediatek,mt8192-disp-ovl";
+ reg = <0 0x14005000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L0_OVL_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x5000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ ovl0_2l: ovl@14006000 {
+ compatible = "mediatek,mt8186-disp-ovl-2l",
+"mediatek,mt8192-disp-ovl-2l";
+ reg = <0 0x14006000 0 0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_OVL_2L_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x6000
0x1000>;
+ };
+
+ rdma0: rdma@14007000 {
+ compatible = "mediatek,mt8186-disp-rdma",
+"mediatek,mt8183-disp-rdma";
+ reg = <0 0x14007000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x7000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ color0: color@14009000 {
+ compatible = "mediatek,mt8186-disp-color",
+"mediatek,mt8173-disp-color";
+ reg = <0 0x14009000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_COLOR0>;
+ interrupts = ;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x8000
0x1000>;
+
[PATCH 2/9] dt-bindings: spmi: spmi-mtk-pmif: Document mediatek, mt8195-spmi as fallback of mediatek, mt8186-spmi
The mt8186-spmi is used as compatible with mt8195-spmi on the MT8186, document this situation. Signed-off-by: Allen-KH Cheng --- .../devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index abcbbe13723f..e4f465abcfe9 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -18,9 +18,14 @@ allOf: properties: compatible: -enum: - - mediatek,mt6873-spmi - - mediatek,mt8195-spmi +oneOf: + - enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + - items: + - enum: + - mediatek,mt8186-spmi + - const: mediatek,mt8195-spmi reg: maxItems: 2 -- 2.18.0
[PATCH 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes
Add MTU3 nodes for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c0a3afd55eaf..3d88480913eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -908,6 +908,43 @@
status = "disabled";
};
+ ssusb0: usb@11201000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11201000 0 0x2dff>,
+ <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port0 PHY_TYPE_USB2>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host0: usb@1120 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1120 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck";
+ interrupts = ;
+ mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+ wakeup-source;
+ status = "disabled";
+ };
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
@@ -939,6 +976,44 @@
status = "disabled";
};
+ ssusb1: usb@11281000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11281000 0 0x2dff>,
+ <0 0x11283e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port1 PHY_TYPE_USB2>,
+ <&u3port1 PHY_TYPE_USB3>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host1: usb@1128 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1128 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+
[PATCH 6/9] arm64: dts: mediatek: mt8186: Add audio controller node
Add audio controller node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 2700c830316f..c52f9be1e750 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -998,6 +998,68 @@
};
};
+ afe: audio-controller@1121 {
+ compatible = "mediatek,mt8186-sound";
+ reg = <0 0x1121 0 0x2000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>,
+<&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>,
+<&topckgen CLK_TOP_AUDIO>,
+<&topckgen CLK_TOP_AUD_INTBUS>,
+<&topckgen CLK_TOP_MAINPLL_D2_D4>,
+<&topckgen CLK_TOP_AUD_1>,
+<&apmixedsys CLK_APMIXED_APLL1>,
+<&topckgen CLK_TOP_AUD_2>,
+<&apmixedsys CLK_APMIXED_APLL2>,
+<&topckgen CLK_TOP_AUD_ENGEN1>,
+<&topckgen CLK_TOP_APLL1_D8>,
+<&topckgen CLK_TOP_AUD_ENGEN2>,
+<&topckgen CLK_TOP_APLL2_D8>,
+<&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
+<&topckgen CLK_TOP_APLL12_CK_DIV0>,
+<&topckgen CLK_TOP_APLL12_CK_DIV1>,
+<&topckgen CLK_TOP_APLL12_CK_DIV2>,
+<&topckgen CLK_TOP_APLL12_CK_DIV4>,
+<&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
+<&topckgen CLK_TOP_AUDIO_H>,
+<&clk26m>;
+ clock-names = "aud_infra_clk",
+ "mtkaif_26m_clk",
+ "top_mux_audio",
+ "top_mux_audio_int",
+ "top_mainpll_d2_d4",
+ "top_mux_aud_1",
+ "top_apll1_ck",
+ "top_mux_aud_2",
+ "top_apll2_ck",
+ "top_mux_aud_eng1",
+ "top_apll1_d8",
+ "top_mux_aud_eng2",
+ "top_apll2_d8",
+ "top_i2s0_m_sel",
+ "top_i2s1_m_sel",
+ "top_i2s2_m_sel",
+ "top_i2s4_m_sel",
+ "top_tdm_m_sel",
+ "top_apll12_div0",
+ "top_apll12_div1",
+ "top_apll12_div2",
+ "top_apll12_div4",
+ "top_apll12_div_tdm",
+ "top_mux_audio_h",
+ "top_clk26m_clk";
+ interrupts = ;
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,infracfg = <&infracfg_ao>;
+ mediatek,topckgen = <&topckgen>;
+ resets = <&watchdog MT8186_TOPRGU_AUDIO_SW_RST>;
+ reset-names = "audiosys";
+ status = "disabled";
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
--
2.18.0
[PATCH 0/9] Add and update some driver nodes for MT8186 SoC
This series is based on matthias github, for-next. Allen-KH Cheng (9): arm64: dts: mediatek: mt8186: Add MTU3 nodes dt-bindings: spmi: spmi-mtk-pmif: Document mediatek,mt8195-spmi as fallback of mediatek,mt8186-spmi arm64: dts: mediatek: mt8186: Add SPMI node arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes arm64: dts: mediatek: mt8186: Add ADSP node arm64: dts: mediatek: mt8186: Add audio controller node arm64: dts: mediatek: mt8186: Add DPI node dt-bindings: display: mediatek: Fix the fallback for mediatek,mt8186-disp-ccorr arm64: dts: mediatek: mt8186: Add display nodes .../display/mediatek/mediatek,ccorr.yaml | 2 +- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 +- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 335 ++ 3 files changed, 344 insertions(+), 4 deletions(-) -- 2.18.0
[PATCH 3/9] arm64: dts: mediatek: mt8186: Add SPMI node
Add SPMI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 3d88480913eb..a8ff984f1192 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -605,6 +605,25 @@
clock-names = "spi", "wrap";
};
+ spmi: spmi@10015000 {
+ compatible = "mediatek,mt8186-spmi",
+"mediatek,mt8195-spmi";
+ reg = <0 0x10015000 0 0x000e00>,
+ <0 0x1001B000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+<&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+<&topckgen CLK_TOP_SPMI_MST>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>;
+ assigned-clock-parents = <&topckgen
CLK_TOP_ULPOSC1_D10>;
+ interrupts = ,
+;
+ status = "disabled";
+ };
+
systimer: timer@10017000 {
compatible = "mediatek,mt8186-timer",
"mediatek,mt6765-timer";
--
2.18.0
[PATCH] drm: Add orientation quirk for DynaBook K50
Like the ASUS T100HAN for which there is already a quirk,
the DynaBook K50 has a 800x1280 portrait screen mounted
in the tablet part of a landscape oriented 2-in-1.
Update the quirk to be more generic and apply to this device.
Signed-off-by: Allen Ballway
---
.../gpu/drm/drm_panel_orientation_quirks.c| 20 ---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c
b/drivers/gpu/drm/drm_panel_orientation_quirks.c
index 52d8800a8ab86..14f870fb2db04 100644
--- a/drivers/gpu/drm/drm_panel_orientation_quirks.c
+++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c
@@ -30,12 +30,6 @@ struct drm_dmi_panel_orientation_data {
int orientation;
};
-static const struct drm_dmi_panel_orientation_data asus_t100ha = {
- .width = 800,
- .height = 1280,
- .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP,
-};
-
static const struct drm_dmi_panel_orientation_data gpd_micropc = {
.width = 720,
.height = 1280,
@@ -121,6 +115,12 @@ static const struct drm_dmi_panel_orientation_data
lcd1280x1920_rightside_up = {
.orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
};
+static const struct drm_dmi_panel_orientation_data lcd800x1280_leftside_up = {
+ .width = 800,
+ .height = 1280,
+ .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP,
+};
+
static const struct drm_dmi_panel_orientation_data lcd1600x2560_leftside_up = {
.width = 1600,
.height = 2560,
@@ -151,7 +151,7 @@ static const struct dmi_system_id orientation_data[] = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
},
- .driver_data = (void *)&asus_t100ha,
+ .driver_data = (void *)&lcd800x1280_leftside_up,
}, {/* Asus T101HA */
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
@@ -196,6 +196,12 @@ static const struct dmi_system_id orientation_data[] = {
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Hi10 pro tablet"),
},
.driver_data = (void *)&lcd1200x1920_rightside_up,
+ }, {/* Dynabook K50 */
+ .matches = {
+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dynabook Inc."),
+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "dynabook K50/FR"),
+ },
+ .driver_data = (void *)&lcd800x1280_leftside_up,
}, {/* GPD MicroPC (generic strings, also match on bios date) */
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Default string"),
--
2.38.1.584.g0f3c55d4c2-goog
[PATCH] drm: Add orientation quirk for DynaBook K50
Panel is 800x1280 but mounted on a detachable form factor sidways.
Signed-off-by: Allen Ballway
---
.../gpu/drm/drm_panel_orientation_quirks.c| 20 ---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c
b/drivers/gpu/drm/drm_panel_orientation_quirks.c
index fc1728d46ac2a..8c4b007081730 100644
--- a/drivers/gpu/drm/drm_panel_orientation_quirks.c
+++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c
@@ -30,12 +30,6 @@ struct drm_dmi_panel_orientation_data {
int orientation;
};
-static const struct drm_dmi_panel_orientation_data asus_t100ha = {
- .width = 800,
- .height = 1280,
- .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP,
-};
-
static const struct drm_dmi_panel_orientation_data gpd_micropc = {
.width = 720,
.height = 1280,
@@ -115,6 +109,12 @@ static const struct drm_dmi_panel_orientation_data
lcd1280x1920_rightside_up = {
.orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
};
+static const struct drm_dmi_panel_orientation_data lcd800x1280_leftside_up = {
+ .width = 800,
+ .height = 1280,
+ .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP,
+};
+
static const struct drm_dmi_panel_orientation_data lcd1600x2560_leftside_up = {
.width = 1600,
.height = 2560,
@@ -133,7 +133,7 @@ static const struct dmi_system_id orientation_data[] = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
},
- .driver_data = (void *)&asus_t100ha,
+ .driver_data = (void *)&lcd800x1280_leftside_up,
}, {/* Asus T101HA */
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
@@ -172,6 +172,12 @@ static const struct dmi_system_id orientation_data[] = {
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Hi10 pro tablet"),
},
.driver_data = (void *)&lcd1200x1920_rightside_up,
+ }, {/* Dynabook K50 */
+ .matches = {
+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dynabook Inc."),
+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "dynabook K50/FR"),
+ },
+ .driver_data = (void *)&lcd800x1280_leftside_up,
}, {/* GPD MicroPC (generic strings, also match on bios date) */
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Default string"),
--
2.38.1.431.g37b22c650d-goog
[PATCH v7 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Currently there are no "upstream" users. So, no existing users to break.
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../bindings/display/bridge/ite,it6505.yaml | 68 +--
1 file changed, 62 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a7..b16a9d9127ddb 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,9 +52,49 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
- port:
-$ref: /schemas/graph.yaml#/properties/port
-description: A port node pointing to DPI host port node
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/$defs/port-base
+unevaluatedProperties: false
+description: A port node pointing to DPI host port node
+
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+ link-frequencies:
+minItems: 1
+maxItems: 1
+description: Allowed max link frequencies in Hz
+
+ port@1:
+$ref: /schemas/graph.yaml#/$defs/port-base
+unevaluatedProperties: false
+description: Video port for DP output
+
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+ data-lanes:
+minItems: 1
+uniqueItems: true
+items:
+ - enum: [ 0, 1 ]
+ - const: 1
+ - const: 2
+ - const: 3
+
+required:
+ - port@0
+ - port@1
required:
- compatible
@@ -63,6 +103,7 @@ required:
- interrupts
- reset-gpios
- extcon
+ - ports
additionalProperties: false
@@ -85,9 +126,24 @@ examples:
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
-port {
-it6505_in: endpoint {
-remote-endpoint = <&dpi_out>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+it6505_in: endpoint {
+remote-endpoint = <&dpi_out>;
+link-frequencies = /bits/ 64 <15000>;
+};
+};
+
+port@1 {
+reg = <1>;
+it6505_out: endpoint {
+remote-endpoint = <&dp_in>;
+data-lanes = <0 1>;
+};
};
};
};
--
2.25.1
[PATCH v7 2/2] drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt
From: allen chen
Add driver to read data-lanes and link-frequencies from dt property to
restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 80 +++--
1 file changed, 77 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index a4302492cf8df..ed4536cde3140 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -437,6 +437,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1476,7 +1478,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2912,7 +2915,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3099,10 +3102,32 @@ static int it6505_init_pdata(struct it6505 *it6505)
return 0;
}
+static int it6505_get_data_lanes_count(const struct device_node *endpoint,
+ const unsigned int min,
+ const unsigned int max)
+{
+ int ret;
+
+ ret = of_property_count_u32_elems(endpoint, "data-lanes");
+ if (ret < 0)
+ return ret;
+
+ if (ret < min || ret > max)
+ return -EINVAL;
+
+ return ret;
+}
+
static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
+ struct device_node *np = dev->of_node, *ep = NULL;
+ int len;
+ u64 link_frequencies;
+ u32 data_lanes[4];
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3118,7 +3143,56 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ ep = of_graph_get_endpoint_by_regs(np, 1, 0);
+ of_node_put(ep);
+
+ if (ep) {
+ len = it6505_get_data_lanes_count(ep, 1, 4);
+
+ if (len > 0 && len != 3) {
+ of_property_read_u32_array(ep, "data-lanes",
+ data_lanes, len);
+ *max_lane_count = len;
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ dev_err(dev, "error data-lanes, use default");
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ dev_err(dev, "error endpoint, use default");
+ }
+
+ ep = of_graph_get_endpoint_by_regs(np, 0, 0);
+ of_node_put(ep);
+
+ if (ep) {
+ len = of_property_read_variable_u64_array(ep,
+ "link-frequencies",
+ &link_frequencies, 0,
+ 1);
+ if (len >= 0) {
+ do_div(link_frequencies, 1000);
+ if (link_frequencies > 297000) {
+ dev_err(dev,
+ "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ } else {
+ *max_dpi_pixel_clock = link_frequencies;
+ }
+ } else {
+ dev_err(dev, "error link frequencies, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+
[PATCH v7 0/2] *** IT6505 driver read dt properties ***
This series let driver can read properties from dt to restrict dp output bandwidth. Changes in v3: -Rename property name. Changes in v4: -Use data-lanes and link-frequencies instead of "ite,dp-output-data-lane-count" and "ite,dp-output-max-pixel-clock-mhz". Changes in v5: -Add a port and a endpoint. -Move data-lanes property to the output endpoint. Changes in v6: -Modified data-lanes description by suggestion. Changes in v7: -Add commit messages to explain reason for breaking users. allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt .../bindings/display/bridge/ite,it6505.yaml | 68 ++-- drivers/gpu/drm/bridge/ite-it6505.c | 80 ++- 2 files changed, 139 insertions(+), 9 deletions(-) -- 2.25.1
[PATCH v6 2/2] drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt
From: allen chen
Add driver to read data-lanes and link-frequencies from dt property to
restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 80 +++--
1 file changed, 77 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index a4302492cf8df..ed4536cde3140 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -437,6 +437,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1476,7 +1478,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2912,7 +2915,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3099,10 +3102,32 @@ static int it6505_init_pdata(struct it6505 *it6505)
return 0;
}
+static int it6505_get_data_lanes_count(const struct device_node *endpoint,
+ const unsigned int min,
+ const unsigned int max)
+{
+ int ret;
+
+ ret = of_property_count_u32_elems(endpoint, "data-lanes");
+ if (ret < 0)
+ return ret;
+
+ if (ret < min || ret > max)
+ return -EINVAL;
+
+ return ret;
+}
+
static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
+ struct device_node *np = dev->of_node, *ep = NULL;
+ int len;
+ u64 link_frequencies;
+ u32 data_lanes[4];
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3118,7 +3143,56 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ ep = of_graph_get_endpoint_by_regs(np, 1, 0);
+ of_node_put(ep);
+
+ if (ep) {
+ len = it6505_get_data_lanes_count(ep, 1, 4);
+
+ if (len > 0 && len != 3) {
+ of_property_read_u32_array(ep, "data-lanes",
+ data_lanes, len);
+ *max_lane_count = len;
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ dev_err(dev, "error data-lanes, use default");
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ dev_err(dev, "error endpoint, use default");
+ }
+
+ ep = of_graph_get_endpoint_by_regs(np, 0, 0);
+ of_node_put(ep);
+
+ if (ep) {
+ len = of_property_read_variable_u64_array(ep,
+ "link-frequencies",
+ &link_frequencies, 0,
+ 1);
+ if (len >= 0) {
+ do_div(link_frequencies, 1000);
+ if (link_frequencies > 297000) {
+ dev_err(dev,
+ "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ } else {
+ *max_dpi_pixel_clock = link_frequencies;
+ }
+ } else {
+ dev_err(dev, "error link frequencies, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+
[PATCH v6 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../bindings/display/bridge/ite,it6505.yaml | 68 +--
1 file changed, 62 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a7..b16a9d9127ddb 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,9 +52,49 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
- port:
-$ref: /schemas/graph.yaml#/properties/port
-description: A port node pointing to DPI host port node
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/$defs/port-base
+unevaluatedProperties: false
+description: A port node pointing to DPI host port node
+
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+ link-frequencies:
+minItems: 1
+maxItems: 1
+description: Allowed max link frequencies in Hz
+
+ port@1:
+$ref: /schemas/graph.yaml#/$defs/port-base
+unevaluatedProperties: false
+description: Video port for DP output
+
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+ data-lanes:
+minItems: 1
+uniqueItems: true
+items:
+ - enum: [ 0, 1 ]
+ - const: 1
+ - const: 2
+ - const: 3
+
+required:
+ - port@0
+ - port@1
required:
- compatible
@@ -63,6 +103,7 @@ required:
- interrupts
- reset-gpios
- extcon
+ - ports
additionalProperties: false
@@ -85,9 +126,24 @@ examples:
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
-port {
-it6505_in: endpoint {
-remote-endpoint = <&dpi_out>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+it6505_in: endpoint {
+remote-endpoint = <&dpi_out>;
+link-frequencies = /bits/ 64 <15000>;
+};
+};
+
+port@1 {
+reg = <1>;
+it6505_out: endpoint {
+remote-endpoint = <&dp_in>;
+data-lanes = <0 1>;
+};
};
};
};
--
2.25.1
[PATCH v6 0/2] *** IT6505 driver read dt properties ***
This series let driver can read properties from dt to restrict dp output bandwidth. Changes in v3: -Rename property name. Changes in v4: -Use data-lanes and link-frequencies instead of "ite,dp-output-data-lane-count" and "ite,dp-output-max-pixel-clock-mhz". Changes in v5: -Add a port and a endpoint. -Move data-lanes property to the output endpoint. Changes in v6: -Modified data-lanes description by suggestion. allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt .../bindings/display/bridge/ite,it6505.yaml | 68 ++-- drivers/gpu/drm/bridge/ite-it6505.c | 80 ++- 2 files changed, 139 insertions(+), 9 deletions(-) -- 2.25.1
[PATCH v5 2/2] drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt
From: allen chen
Add driver to read data-lanes and link-frequencies from dt property to
restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 80 +++--
1 file changed, 77 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index a4302492cf8df..ed4536cde3140 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -437,6 +437,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1476,7 +1478,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2912,7 +2915,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3099,10 +3102,32 @@ static int it6505_init_pdata(struct it6505 *it6505)
return 0;
}
+static int it6505_get_data_lanes_count(const struct device_node *endpoint,
+ const unsigned int min,
+ const unsigned int max)
+{
+ int ret;
+
+ ret = of_property_count_u32_elems(endpoint, "data-lanes");
+ if (ret < 0)
+ return ret;
+
+ if (ret < min || ret > max)
+ return -EINVAL;
+
+ return ret;
+}
+
static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
+ struct device_node *np = dev->of_node, *ep = NULL;
+ int len;
+ u64 link_frequencies;
+ u32 data_lanes[4];
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3118,7 +3143,56 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ ep = of_graph_get_endpoint_by_regs(np, 1, 0);
+ of_node_put(ep);
+
+ if (ep) {
+ len = it6505_get_data_lanes_count(ep, 1, 4);
+
+ if (len > 0 && len != 3) {
+ of_property_read_u32_array(ep, "data-lanes",
+ data_lanes, len);
+ *max_lane_count = len;
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ dev_err(dev, "error data-lanes, use default");
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ dev_err(dev, "error endpoint, use default");
+ }
+
+ ep = of_graph_get_endpoint_by_regs(np, 0, 0);
+ of_node_put(ep);
+
+ if (ep) {
+ len = of_property_read_variable_u64_array(ep,
+ "link-frequencies",
+ &link_frequencies, 0,
+ 1);
+ if (len >= 0) {
+ do_div(link_frequencies, 1000);
+ if (link_frequencies > 297000) {
+ dev_err(dev,
+ "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ } else {
+ *max_dpi_pixel_clock = link_frequencies;
+ }
+ } else {
+ dev_err(dev, "error link frequencies, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+
[PATCH v5 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../bindings/display/bridge/ite,it6505.yaml | 89 +--
1 file changed, 83 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a7..8e607b6929fc9 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,9 +52,70 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
- port:
-$ref: /schemas/graph.yaml#/properties/port
-description: A port node pointing to DPI host port node
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/$defs/port-base
+unevaluatedProperties: false
+description: A port node pointing to DPI host port node
+
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+ link-frequencies:
+minItems: 1
+maxItems: 1
+description: Allowed max link frequencies in Hz
+
+ port@1:
+$ref: /schemas/graph.yaml#/$defs/port-base
+unevaluatedProperties: false
+description: Video port for DP output
+
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+ data-lanes:
+oneOf:
+ - minItems: 1
+maxItems: 1
+uniqueItems: true
+items:
+ enum:
+- 0
+- 1
+description: For one lane operation.
+
+ - minItems: 2
+maxItems: 2
+uniqueItems: true
+items:
+ enum:
+- 0
+- 1
+description: For two lanes operation.
+
+ - minItems: 4
+maxItems: 4
+uniqueItems: true
+items:
+ enum:
+- 0
+- 1
+- 2
+- 3
+description: For four lanes operation.
+required:
+ - port@0
+ - port@1
required:
- compatible
@@ -63,6 +124,7 @@ required:
- interrupts
- reset-gpios
- extcon
+ - ports
additionalProperties: false
@@ -85,9 +147,24 @@ examples:
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
-port {
-it6505_in: endpoint {
-remote-endpoint = <&dpi_out>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+it6505_in: endpoint {
+remote-endpoint = <&dpi_out>;
+link-frequencies = /bits/ 64 <15000>;
+};
+};
+
+port@1 {
+reg = <1>;
+it6505_out: endpoint {
+remote-endpoint = <&dp_in>;
+data-lanes = <0 1>;
+};
};
};
};
--
2.25.1
[PATCH v5 0/2] *** IT6505 driver read dt properties ***
This series let driver can read properties from dt to restrict dp output bandwidth. Changes in v3: -Rename property name. Changes in v4: -Use data-lanes and link-frequencies instead of "ite,dp-output-data-lane-count" and "ite,dp-output-max-pixel-clock-mhz". Changes in v5: -Add a port and a endpoint. -Move data-lanes property to the output endpoint. allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt .../bindings/display/bridge/ite,it6505.yaml | 89 +-- drivers/gpu/drm/bridge/ite-it6505.c | 80 - 2 files changed, 160 insertions(+), 9 deletions(-) -- 2.25.1
[PATCH v4 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../bindings/display/bridge/ite,it6505.yaml | 43 +++
1 file changed, 43 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a7..f2c3d1d10359e 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,10 +52,51 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ data-lanes:
+oneOf:
+ - minItems: 1
+maxItems: 1
+uniqueItems: true
+items:
+ enum:
+- 0
+- 1
+description: For one lane operation.
+
+ - minItems: 2
+maxItems: 2
+uniqueItems: true
+items:
+ enum:
+- 0
+- 1
+description: For two lanes operation.
+
+ - minItems: 4
+maxItems: 4
+uniqueItems: true
+items:
+ enum:
+- 0
+- 1
+- 2
+- 3
+description: For four lanes operation.
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
+properties:
+ endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+
+properties:
+ link-frequencies:
+minItems: 1
+maxItems: 1
+description: Allowed max link frequencies in Hz.
+
required:
- compatible
- ovdd-supply
@@ -84,10 +125,12 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+data-lanes = <0 1>;
port {
it6505_in: endpoint {
remote-endpoint = <&dpi_out>;
+link-frequencies = /bits/ 64 <15000>;
};
};
};
--
2.25.1
[PATCH v4 2/2] drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt
From: allen chen
Add driver to read data-lanes and link-frequencies from dt property to
restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 54 +++--
1 file changed, 51 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index a4302492cf8df..653ab38465b98 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -437,6 +437,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1476,7 +1478,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2912,7 +2915,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3102,7 +3105,13 @@ static int it6505_init_pdata(struct it6505 *it6505)
static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
+ struct device_node *np = dev->of_node, *ep = NULL;
+ int len;
+ u64 link_frequencies;
+ u32 data_lanes[4];
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3118,7 +3127,46 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ len = of_property_read_variable_u32_array(np, "data-lanes",
+ data_lanes, 0,
+ ARRAY_SIZE(data_lanes));
+ *max_lane_count = len;
+
+ if (len < 0 || *max_lane_count == 3 || *max_lane_count > 4) {
+ dev_err(dev, "error data-lanes, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ ep = of_graph_get_endpoint_by_regs(np, 0, 0);
+
+ if (ep) {
+ len = of_property_read_variable_u64_array(ep,
+ "link-frequencies",
+ &link_frequencies, 0,
+ 1);
+ if (len >= 0) {
+ link_frequencies /= 1000;
+ if (link_frequencies > 297000) {
+ dev_err(dev,
+ "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ } else {
+ *max_dpi_pixel_clock = link_frequencies;
+ }
+ } else {
+ dev_err(dev, "error link frequencies, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ dev_err(dev, "error endpoint, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
[PATCH v4 0/2] *** IT6505 driver read dt properties ***
This series let driver can read properties from dt to restrict dp output bandwidth. Changes in v3: -Rename property name. Changes in v4: -Use data-lanes and link-frequencies instead of "ite,dp-output-data-lane-count" and "ite,dp-output-max-pixel-clock-mhz". allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt .../bindings/display/bridge/ite,it6505.yaml | 43 +++ drivers/gpu/drm/bridge/ite-it6505.c | 54 +-- 2 files changed, 94 insertions(+), 3 deletions(-) -- 2.25.1
[PATCH v3 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-mhz from dt
From: allen chen
Add driver to read data-lanes and max-pixel-clock-mhz from dt property to
restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 36 ++---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 2767b70fa2cb..eca9a2c296a8 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3081,7 +3086,32 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "ite,dp-output-data-lane-count",
+max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "ite,dp-output-max-pixel-clock-mhz",
+max_dpi_pixel_clock) == 0) {
+ *max_dpi_pixel_clock *= 1000;
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
[PATCH v3 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../bindings/display/bridge/ite,it6505.yaml | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a..f5482a614d05 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,6 +52,16 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ ite,dp-output-data-lane-count:
+description: restrict the dp output data-lanes with value of 1-4
+$ref: /schemas/types.yaml#/definitions/uint32
+enum: [ 1, 2, 4 ]
+
+ ite,dp-output-max-pixel-clock-mhz:
+description: restrict max pixel clock
+$ref: /schemas/types.yaml#/definitions/uint32
+default: 150
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
@@ -84,6 +94,8 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+ite,dp-output-data-lane-count = <2>;
+ite,dp-output-max-pixel-clock-mhz = <150>;
port {
it6505_in: endpoint {
--
2.25.1
[PATCH v3 0/2] *** IT6505 driver read dt properties ***
From: allen chen This series let driver can read properties from dt to restrict dp output bandwidth. Changes in v3: -Rename property name. allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-mhz from dt .../bindings/display/bridge/ite,it6505.yaml | 12 +++ drivers/gpu/drm/bridge/ite-it6505.c | 36 +-- 2 files changed, 45 insertions(+), 3 deletions(-) -- 2.25.1
[PATCH v2 0/2] *** IT6505 driver read dt properties ***
From: allen chen This series let driver can read properties from dt to restrict dp output bandwidth. allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt .../bindings/display/bridge/ite,it6505.yaml | 10 ++ drivers/gpu/drm/bridge/ite-it6505.c | 35 +-- 2 files changed, 42 insertions(+), 3 deletions(-) -- 2.25.1
[PATCH v2 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a..62b9f2192202 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,6 +52,14 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ data-lanes:
+maxItems: 1
+description: restrict the dp output data-lanes with value of 1-4
+
+ max-pixel-clock-khz:
+maxItems: 1
+description: restrict max pixel clock
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
@@ -84,6 +92,8 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+data-lanes = <2>;
+max-pixel-clock-khz = <15>;
port {
it6505_in: endpoint {
--
2.25.1
[PATCH v2 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt
From: allen chen
Add driver to read data-lanes and max-pixel-clock-khz from dt property to
restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 2767b70fa2cb..cfa25a176a29 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3081,7 +3086,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "data-lanes",
+max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-pixel-clock-khz",
+max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
Re: [PATCH] drm/mediatek: dsi: Move mtk_dsi_stop() call back to mtk_dsi_poweroff()
On 9/19/22 21:32, AngeloGioacchino Del Regno wrote:
> Il 19/09/22 10:40, Hsin-Yi Wang ha scritto:
>> On Mon, Sep 19, 2022 at 4:39 PM Nícolas F. R. A. Prado
>> wrote:
>>>
>>> As the comment right before the mtk_dsi_stop() call advises,
>>> mtk_dsi_stop() should only be called after
>>> mtk_drm_crtc_atomic_disable(). That's because that function calls
>>> drm_crtc_wait_one_vblank(), which requires the vblank irq to be enabled.
>>>
>>> Previously mtk_dsi_stop(), being in mtk_dsi_poweroff() and guarded by a
>>> refcount, would only be called at the end of
>>> mtk_drm_crtc_atomic_disable(), through the call to
>>> mtk_crtc_ddp_hw_fini().
>>> Commit cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>>> enable/disable and define new funcs") moved the mtk_dsi_stop() call to
>>> mtk_output_dsi_disable(), causing it to be called before
>>> mtk_drm_crtc_atomic_disable(), and consequently generating vblank
>>> timeout warnings during suspend.
>>>
>>> Move the mtk_dsi_stop() call back to mtk_dsi_poweroff() so that we have
>>> a working vblank irq during mtk_drm_crtc_atomic_disable() and stop
>>> getting vblank timeout warnings.
>>>
>>> Fixes: cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>>> enable/disable and define new funcs")
>>> Signed-off-by: Nícolas F. R. A. Prado
>>>
>> Tested-by: Hsin-Yi Wang
>>
>
> Reviewed-by: AngeloGioacchino Del Regno
>
>
>
Tested suspend/resume work properly on mt8188 and mt8186 .
Tested-by: Allen-KH Cheng
Re: [PATCH v2] drm: mediatek: Fix display vblank timeout when disable dsi
Hi CK,
We can use [1] in mt8186. Please ignore this PATCH.
Thanks,
Allen
[1]
http://lists.infradead.org/pipermail/linux-mediatek/2022-August/046713.html
On 9/19/22 11:01, Allen-KH Cheng wrote:
> Hi CK,
>
> We will test this fix on the mt8186/mt8183.
> Maybe our fix is not necessary.
>
> I appreciate your suggestion.
>
> BRs,
> Allen
>
> On 9/18/22 12:32, Chun-Kuang Hu wrote:
>> Hi, Allen:
>>
>> Allen-KH Cheng 於 2022年9月14日 週三 晚上10:00寫道：
>>>
>>> From: Xinlei Lee
>>>
>>> Dsi is turned off at bridge.disable, causing crtc to wait for vblank
>>> timeout. It is necessary to add count protection to turn off dsi and
>>> turn off at post_disable.
>>
>> If turn off dsi in post_disable(), you should turn on dsi in pre_enable().
>>
>> There is another patch fix this problem [1], do you have any comment
>> on that patch?
>>
>> [1]
>> http://lists.infradead.org/pipermail/linux-mediatek/2022-August/046713.html
>>
>> Regards,
>> Chun-Kuang.
>>
>>>
>>> Fixes: cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>>> enable/disable and define new funcs")
>>> Signed-off-by: Xinlei Lee
>>> Co-developed-by: Allen-KH Cheng
>>> Signed-off-by: Allen-KH Cheng
>>> ---
>>> Change in v1:
>>> * Rebase to kernel/git/chunkuang.hu/linux.git, mediatek-drm-fixes
>>> [Allen-KH Cheng ]
>>> ---
>>> ---
>>> drivers/gpu/drm/mediatek/mtk_dsi.c | 15 ++-
>>> 1 file changed, 6 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> b/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> index 5b624e0f5b0a..e30f4244c001 100644
>>> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> @@ -768,14 +768,6 @@ static void mtk_dsi_bridge_mode_set(struct drm_bridge
>>> *bridge,
>>> drm_display_mode_to_videomode(adjusted, &dsi->vm);
>>> }
>>>
>>> -static void mtk_dsi_bridge_atomic_disable(struct drm_bridge *bridge,
>>> - struct drm_bridge_state
>>> *old_bridge_state)
>>> -{
>>> - struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>>> -
>>> - mtk_output_dsi_disable(dsi);
>>> -}
>>> -
>>> static void mtk_dsi_bridge_atomic_enable(struct drm_bridge *bridge,
>>> struct drm_bridge_state
>>> *old_bridge_state)
>>> {
>>> @@ -803,13 +795,15 @@ static void mtk_dsi_bridge_atomic_post_disable(struct
>>> drm_bridge *bridge,
>>> {
>>> struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>>>
>>> + if (dsi->refcount == 1)
>>> + mtk_output_dsi_disable(dsi);
>>> +
>>> mtk_dsi_poweroff(dsi);
>>> }
>>>
>>> static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>>> .attach = mtk_dsi_bridge_attach,
>>> .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
>>> - .atomic_disable = mtk_dsi_bridge_atomic_disable,
>>> .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
>>> .atomic_enable = mtk_dsi_bridge_atomic_enable,
>>> .atomic_pre_enable = mtk_dsi_bridge_atomic_pre_enable,
>>> @@ -829,6 +823,9 @@ void mtk_dsi_ddp_stop(struct device *dev)
>>> {
>>> struct mtk_dsi *dsi = dev_get_drvdata(dev);
>>>
>>> + if (dsi->refcount == 1)
>>> + mtk_output_dsi_disable(dsi);
>>> +
>>> mtk_dsi_poweroff(dsi);
>>> }
>>>
>>> --
>>> 2.18.0
>>>
Re: [PATCH v2] drm: mediatek: Fix display vblank timeout when disable dsi
Hi CK,
We will test this fix on the mt8186/mt8183.
Maybe our fix is not necessary.
I appreciate your suggestion.
BRs,
Allen
On 9/18/22 12:32, Chun-Kuang Hu wrote:
> Hi, Allen:
>
> Allen-KH Cheng 於 2022年9月14日 週三 晚上10:00寫道：
>>
>> From: Xinlei Lee
>>
>> Dsi is turned off at bridge.disable, causing crtc to wait for vblank
>> timeout. It is necessary to add count protection to turn off dsi and
>> turn off at post_disable.
>
> If turn off dsi in post_disable(), you should turn on dsi in pre_enable().
>
> There is another patch fix this problem [1], do you have any comment
> on that patch?
>
> [1]
> http://lists.infradead.org/pipermail/linux-mediatek/2022-August/046713.html
>
> Regards,
> Chun-Kuang.
>
>>
>> Fixes: cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>> enable/disable and define new funcs")
>> Signed-off-by: Xinlei Lee
>> Co-developed-by: Allen-KH Cheng
>> Signed-off-by: Allen-KH Cheng
>> ---
>> Change in v1:
>> * Rebase to kernel/git/chunkuang.hu/linux.git, mediatek-drm-fixes
>> [Allen-KH Cheng ]
>> ---
>> ---
>> drivers/gpu/drm/mediatek/mtk_dsi.c | 15 ++-
>> 1 file changed, 6 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
>> b/drivers/gpu/drm/mediatek/mtk_dsi.c
>> index 5b624e0f5b0a..e30f4244c001 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
>> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
>> @@ -768,14 +768,6 @@ static void mtk_dsi_bridge_mode_set(struct drm_bridge
>> *bridge,
>> drm_display_mode_to_videomode(adjusted, &dsi->vm);
>> }
>>
>> -static void mtk_dsi_bridge_atomic_disable(struct drm_bridge *bridge,
>> - struct drm_bridge_state
>> *old_bridge_state)
>> -{
>> - struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>> -
>> - mtk_output_dsi_disable(dsi);
>> -}
>> -
>> static void mtk_dsi_bridge_atomic_enable(struct drm_bridge *bridge,
>> struct drm_bridge_state
>> *old_bridge_state)
>> {
>> @@ -803,13 +795,15 @@ static void mtk_dsi_bridge_atomic_post_disable(struct
>> drm_bridge *bridge,
>> {
>> struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>>
>> + if (dsi->refcount == 1)
>> + mtk_output_dsi_disable(dsi);
>> +
>> mtk_dsi_poweroff(dsi);
>> }
>>
>> static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>> .attach = mtk_dsi_bridge_attach,
>> .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
>> - .atomic_disable = mtk_dsi_bridge_atomic_disable,
>> .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
>> .atomic_enable = mtk_dsi_bridge_atomic_enable,
>> .atomic_pre_enable = mtk_dsi_bridge_atomic_pre_enable,
>> @@ -829,6 +823,9 @@ void mtk_dsi_ddp_stop(struct device *dev)
>> {
>> struct mtk_dsi *dsi = dev_get_drvdata(dev);
>>
>> + if (dsi->refcount == 1)
>> + mtk_output_dsi_disable(dsi);
>> +
>> mtk_dsi_poweroff(dsi);
>> }
>>
>> --
>> 2.18.0
>>
[PATCH 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt
From: allen chen
Add driver to read data-lanes and max-pixel-clock-khz from dt property
to restrict output bandwidth.
Signed-off-by: Allen chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 2767b70fa2cb..cfa25a176a29 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3081,7 +3086,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "data-lanes",
+max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-pixel-clock-khz",
+max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
[PATCH 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a..62b9f2192202 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,6 +52,14 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ data-lanes:
+maxItems: 1
+description: restrict the dp output data-lanes with value of 1-4
+
+ max-pixel-clock-khz:
+maxItems: 1
+description: restrict max pixel clock
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
@@ -84,6 +92,8 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+data-lanes = <2>;
+max-pixel-clock-khz = <15>;
port {
it6505_in: endpoint {
--
2.25.1
[PATCH 0/2] *** IT6505 driver read dt properties ***
From: allen chen This series let driver can read properties from dt to restrict dp output bandwidth. allen chen (2): dt-bindings: it6505: add properties to restrict output bandwidth drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt .../bindings/display/bridge/ite,it6505.yaml | 10 ++ drivers/gpu/drm/bridge/ite-it6505.c | 35 +-- 2 files changed, 42 insertions(+), 3 deletions(-) -- 2.25.1
[PATCH] dt-bindings: it6505: add properties to restrict output bandwidth
From: allen chen
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
.../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a..62b9f2192202 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,6 +52,14 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ data-lanes:
+maxItems: 1
+description: restrict the dp output data-lanes with value of 1-4
+
+ max-pixel-clock-khz:
+maxItems: 1
+description: restrict max pixel clock
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
@@ -84,6 +92,8 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+data-lanes = <2>;
+max-pixel-clock-khz = <15>;
port {
it6505_in: endpoint {
--
2.25.1
[PATCH v2 2/3] drm/bridge: it6505: Add i2c api power on check
From: allen chen
Use i2c bus to read/write when it6505 power off will occur i2c error.
Add this check will prevent i2c error when it6505 power off.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
Reviewed-by: Robert Foss
---
drivers/gpu/drm/bridge/ite-it6505.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index aa5e0aa1af85..cfd2c3275dc5 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -518,6 +518,9 @@ static int it6505_read(struct it6505 *it6505, unsigned int
reg_addr)
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_read(it6505->regmap, reg_addr, &value);
if (err < 0) {
dev_err(dev, "read failed reg[0x%x] err: %d", reg_addr, err);
@@ -533,6 +536,9 @@ static int it6505_write(struct it6505 *it6505, unsigned int
reg_addr,
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_write(it6505->regmap, reg_addr, reg_val);
if (err < 0) {
@@ -550,6 +556,9 @@ static int it6505_set_bits(struct it6505 *it6505, unsigned
int reg,
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_update_bits(it6505->regmap, reg, mask, value);
if (err < 0) {
dev_err(dev, "write reg[0x%x] = 0x%x mask = 0x%x failed err %d",
@@ -2553,13 +2562,12 @@ static int it6505_poweron(struct it6505 *it6505)
usleep_range(1, 2);
}
+ it6505->powered = true;
it6505_reset_logic(it6505);
it6505_int_mask_enable(it6505);
it6505_init(it6505);
it6505_lane_off(it6505);
- it6505->powered = true;
-
return 0;
}
--
2.25.1
[PATCH v2 3/3] drm/bridge: it6505: Modified video clock calculation and video debug message
From: allen chen
Speed up video clock calculation and remove redundant video debug message.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
Reviewed-by: Robert Foss
---
drivers/gpu/drm/bridge/ite-it6505.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index cfd2c3275dc5..11a34ddb60a1 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -703,7 +703,7 @@ static void it6505_calc_video_info(struct it6505 *it6505)
DRM_DEV_DEBUG_DRIVER(dev, "hactive_start:%d, vactive_start:%d",
hdes, vdes);
- for (i = 0; i < 10; i++) {
+ for (i = 0; i < 3; i++) {
it6505_set_bits(it6505, REG_DATA_CTRL0, ENABLE_PCLK_COUNTER,
ENABLE_PCLK_COUNTER);
usleep_range(1, 15000);
@@ -720,7 +720,7 @@ static void it6505_calc_video_info(struct it6505 *it6505)
return;
}
- sum /= 10;
+ sum /= 3;
pclk = 13500 * 2048 / sum;
it6505->video_info.clock = pclk;
it6505->video_info.hdisplay = hdew;
@@ -2344,8 +2344,6 @@ static void it6505_irq_hpd(struct it6505 *it6505)
if (!it6505_get_video_status(it6505))
it6505_video_reset(it6505);
-
- it6505_calc_video_info(it6505);
} else {
memset(it6505->dpcd, 0, sizeof(it6505->dpcd));
--
2.25.1
[PATCH v2 1/3] drm/bridge: it6505: Modified power sequence
From: allen chen
Change power sequence to meet it6505 data sheet requirement when boot on.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
Reviewed-by: Robert Foss
---
drivers/gpu/drm/bridge/ite-it6505.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 2d119e3016b3..aa5e0aa1af85 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -3029,7 +3029,7 @@ static int it6505_init_pdata(struct it6505 *it6505)
return PTR_ERR(pdata->ovdd);
}
- pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(pdata->gpiod_reset)) {
dev_err(dev, "gpiod_reset gpio not found");
return PTR_ERR(pdata->gpiod_reset);
--
2.25.1
[PATCH v2 0/3] drm/bridge: it6505: Fixes bugs
From: allen chen This series fixes some it6505 driver bugs and improve computing time. Changes in v2: - Change committe message occure to occur. allen chen (3): drm/bridge: it6505: Modified power sequence drm/bridge: it6505: Add i2c api power on check drm/bridge: it6505: Modified video clock calculation and video debug message drivers/gpu/drm/bridge/ite-it6505.c | 20 +--- 1 file changed, 13 insertions(+), 7 deletions(-) -- 2.25.1
[PATCH v2] drm/bridge: it6505: Add i2c api power on check
From: allen chen
Use i2c bus to read/write when it6505 power off will occur i2c error.
Add this check will prevent i2c error when it6505 power off.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
Reviewed-by: Robert Foss
---
drivers/gpu/drm/bridge/ite-it6505.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index aa5e0aa1af85..cfd2c3275dc5 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -518,6 +518,9 @@ static int it6505_read(struct it6505 *it6505, unsigned int
reg_addr)
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_read(it6505->regmap, reg_addr, &value);
if (err < 0) {
dev_err(dev, "read failed reg[0x%x] err: %d", reg_addr, err);
@@ -533,6 +536,9 @@ static int it6505_write(struct it6505 *it6505, unsigned int
reg_addr,
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_write(it6505->regmap, reg_addr, reg_val);
if (err < 0) {
@@ -550,6 +556,9 @@ static int it6505_set_bits(struct it6505 *it6505, unsigned
int reg,
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_update_bits(it6505->regmap, reg, mask, value);
if (err < 0) {
dev_err(dev, "write reg[0x%x] = 0x%x mask = 0x%x failed err %d",
@@ -2553,13 +2562,12 @@ static int it6505_poweron(struct it6505 *it6505)
usleep_range(1, 2);
}
+ it6505->powered = true;
it6505_reset_logic(it6505);
it6505_int_mask_enable(it6505);
it6505_init(it6505);
it6505_lane_off(it6505);
- it6505->powered = true;
-
return 0;
}
--
2.25.1
[PATCH 3/3] drm/bridge: it6505: Modified video clock calculation and video debug message
From: allen chen
Speed up video clock calculation and remove redundant video debug message.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
drivers/gpu/drm/bridge/ite-it6505.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index cfd2c3275dc5..11a34ddb60a1 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -703,7 +703,7 @@ static void it6505_calc_video_info(struct it6505 *it6505)
DRM_DEV_DEBUG_DRIVER(dev, "hactive_start:%d, vactive_start:%d",
hdes, vdes);
- for (i = 0; i < 10; i++) {
+ for (i = 0; i < 3; i++) {
it6505_set_bits(it6505, REG_DATA_CTRL0, ENABLE_PCLK_COUNTER,
ENABLE_PCLK_COUNTER);
usleep_range(1, 15000);
@@ -720,7 +720,7 @@ static void it6505_calc_video_info(struct it6505 *it6505)
return;
}
- sum /= 10;
+ sum /= 3;
pclk = 13500 * 2048 / sum;
it6505->video_info.clock = pclk;
it6505->video_info.hdisplay = hdew;
@@ -2344,8 +2344,6 @@ static void it6505_irq_hpd(struct it6505 *it6505)
if (!it6505_get_video_status(it6505))
it6505_video_reset(it6505);
-
- it6505_calc_video_info(it6505);
} else {
memset(it6505->dpcd, 0, sizeof(it6505->dpcd));
--
2.25.1
[PATCH 2/3] drm/bridge: it6505: Add i2c api power on check
From: allen chen
Use i2c bus to read/write when it6505 power off will occure i2c error.
Add this check will prevent i2c error when it6505 power off.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
drivers/gpu/drm/bridge/ite-it6505.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index aa5e0aa1af85..cfd2c3275dc5 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -518,6 +518,9 @@ static int it6505_read(struct it6505 *it6505, unsigned int
reg_addr)
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_read(it6505->regmap, reg_addr, &value);
if (err < 0) {
dev_err(dev, "read failed reg[0x%x] err: %d", reg_addr, err);
@@ -533,6 +536,9 @@ static int it6505_write(struct it6505 *it6505, unsigned int
reg_addr,
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_write(it6505->regmap, reg_addr, reg_val);
if (err < 0) {
@@ -550,6 +556,9 @@ static int it6505_set_bits(struct it6505 *it6505, unsigned
int reg,
int err;
struct device *dev = &it6505->client->dev;
+ if (!it6505->powered)
+ return -ENODEV;
+
err = regmap_update_bits(it6505->regmap, reg, mask, value);
if (err < 0) {
dev_err(dev, "write reg[0x%x] = 0x%x mask = 0x%x failed err %d",
@@ -2553,13 +2562,12 @@ static int it6505_poweron(struct it6505 *it6505)
usleep_range(1, 2);
}
+ it6505->powered = true;
it6505_reset_logic(it6505);
it6505_int_mask_enable(it6505);
it6505_init(it6505);
it6505_lane_off(it6505);
- it6505->powered = true;
-
return 0;
}
--
2.25.1
[PATCH 1/3] drm/bridge: it6505: Modified power sequence
From: allen chen
Change power sequence to meet it6505 data sheet requirement when boot on.
Signed-off-by: Pin-Yen Lin
Signed-off-by: Allen Chen
---
drivers/gpu/drm/bridge/ite-it6505.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 2d119e3016b3..aa5e0aa1af85 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -3029,7 +3029,7 @@ static int it6505_init_pdata(struct it6505 *it6505)
return PTR_ERR(pdata->ovdd);
}
- pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(pdata->gpiod_reset)) {
dev_err(dev, "gpiod_reset gpio not found");
return PTR_ERR(pdata->gpiod_reset);
--
2.25.1
[PATCH 0/3] drm/bridge: it6505: Fixes bugs
From: allen chen This series fixes some it6505 driver bugs and improve computing time. allen chen (3): drm/bridge: it6505: Modified power sequence drm/bridge: it6505: Add i2c api power on check drm/bridge: it6505: Modified video clock calculation and video debug message drivers/gpu/drm/bridge/ite-it6505.c | 20 +--- 1 file changed, 13 insertions(+), 7 deletions(-) -- 2.25.1
[PATCH] drm/bridge: add it6505 driver read config from dt property
From: allen chen
add read max-lane and max-pixel-clock from dt property
Signed-off-by: Allen Chen
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 4b673c4792d77..c9121d4635a52 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1466,7 +1468,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2895,7 +2898,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3057,6 +3060,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3072,7 +3077,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "max-lane-count",
+max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-dpi-pixel-clock",
+max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
[PATCH] drm/bridge: add it6505 driver read config from dt property
From: allen chen
add read max-lane and max-pixel-clock from dt property
Signed-off-by: Allen-kh Cheng
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b/drivers/gpu/drm/bridge/ite-it6505.c
index 4b673c4792d77..c9121d4635a52 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1466,7 +1468,8 @@ static void it6505_parse_link_capabilities(struct it6505
*it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2895,7 +2898,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3057,6 +3060,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3072,7 +3077,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "max-lane-count",
+max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-dpi-pixel-clock",
+max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
[PATCH v11] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Tested-by: Hsin-yi Wang Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- v10 -> v11 : remove drm_bridge_new_crtc_state --- drivers/gpu/drm/bridge/Kconfig |8 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3352 +++ 3 files changed, 3361 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 61db5a66b4934..f667fdd87a2cb 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,14 @@ config DRM_DISPLAY_CONNECTOR on ARM-based platforms. Saying Y here when this driver is not needed will not cause any issue. +config DRM_ITE_IT6505 +tristate "ITE IT6505 DisplayPort bridge" +depends on OF +select DRM_KMS_HELPER +select EXTCON +help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LONTIUM_LT8912B tristate "Lontium LT8912B DSI/HDMI bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index f2c73683cfcb7..425844c304953 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHIPONE_ICN6211) += chipone-icn6211.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..f47cf134e7900 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3352 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE 0 +#define INT_RECEIVE_HPD_IRQ 1 +#define INT_SCDT_CHANGE 2 +#define INT_HDCP_FAIL 3 +#define INT_HDCP_DONE 4 +#define BIT_OFFSET(x) (((x) - INT_STATUS_01) * BITS_PER_BYTE) +#define BIT_INT_HPD INT_HPD_CHANGE +#define BIT_INT_HPD_IRQ INT_RECEIVE_HPD_IRQ +#define BIT_INT_SCDT INT_SCDT_CHANGE +#define BIT_INT_HDCP_FAIL INT_HDCP_FAIL +#define BIT_INT_HDCP_DONE INT_HDCP_DONE + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL 0 +#define INT_HDCP_KSV_CHECK 1 +#define INT_AUDIO_FIFO_ERROR 2 +#define BIT_INT_AUX_CMD_FAIL (BIT_OFFSET(0x07) + INT_AUX_CMD_FAIL) +#define BIT_INT_HDCP_KSV_CHECK (BIT_OFFSET(0x07) + INT_HDCP_KSV_CHECK) +#define BIT_INT_AUDIO_FIFO_ERROR (BIT_OFFSET(0x07) + INT_AUDIO_FIFO_ERROR) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL 4 +#define INT_VID_FIFO_ERROR 5 +#define INT_IO_LATCH_FIFO_OVERFLOW 7 +#define BIT_INT_LINK_TRAIN_FAIL (BIT_OFFSET(0x08) + INT_LINK_TRAIN_FAIL) +#define BIT_INT_VID_FIFO_ERROR (BIT_OFFSET(0x08) + INT_VID_FIFO_ERROR) +#define BIT_INT_IO_FIFO_OVERFLOW (BIT_OFFSET(0x08) + INT_IO_LATCH_FIFO_OVERFLOW) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +
[PATCH v10] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Tested-by: Hsin-yi Wang Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- This patch depends on https://patchwork.kernel.org/project/linux-mediatek/patch/20210722062246.2512666-4-...@ravnborg.org/ --- drivers/gpu/drm/bridge/Kconfig |8 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3335 +++ 3 files changed, 3344 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 431b6e12a81fe..e1afe171075f5 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,14 @@ config DRM_DISPLAY_CONNECTOR on ARM-based platforms. Saying Y here when this driver is not needed will not cause any issue. +config DRM_ITE_IT6505 +tristate "ITE IT6505 DisplayPort bridge" +depends on OF +select DRM_KMS_HELPER +select EXTCON +help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LONTIUM_LT8912B tristate "Lontium LT8912B DSI/HDMI bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index f2c73683cfcb7..425844c304953 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHIPONE_ICN6211) += chipone-icn6211.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..e35b28386563b --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3335 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE 0 +#define INT_RECEIVE_HPD_IRQ 1 +#define INT_SCDT_CHANGE 2 +#define INT_HDCP_FAIL 3 +#define INT_HDCP_DONE 4 +#define BIT_OFFSET(x) (((x) - INT_STATUS_01) * BITS_PER_BYTE) +#define BIT_INT_HPD INT_HPD_CHANGE +#define BIT_INT_HPD_IRQ INT_RECEIVE_HPD_IRQ +#define BIT_INT_SCDT INT_SCDT_CHANGE +#define BIT_INT_HDCP_FAIL INT_HDCP_FAIL +#define BIT_INT_HDCP_DONE INT_HDCP_DONE + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL 0 +#define INT_HDCP_KSV_CHECK 1 +#define INT_AUDIO_FIFO_ERROR 2 +#define BIT_INT_AUX_CMD_FAIL (BIT_OFFSET(0x07) + INT_AUX_CMD_FAIL) +#define BIT_INT_HDCP_KSV_CHECK (BIT_OFFSET(0x07) + INT_HDCP_KSV_CHECK) +#define BIT_INT_AUDIO_FIFO_ERROR (BIT_OFFSET(0x07) + INT_AUDIO_FIFO_ERROR) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL 4 +#define INT_VID_FIFO_ERROR 5 +#define INT_IO_LATCH_FIFO_OVERFLOW 7 +#define BIT_INT_LINK_TRAIN_FAIL (BIT_OFFSET(0x08) + INT_LINK_TRAIN_FAIL) +#define BIT_INT_VID_FIFO_ERROR (BIT_OFFSET(0x08) + INT_VID_FIFO_ERROR) +#define BIT_INT_IO_FIFO_OVERFLOW (BIT_OFFSET(0x08) + INT_IO_LATCH_FIFO_OVERFLOW) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_
[PATCH v9] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Tested-by: Hsin-yi Wang Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- v8->v9: move aux register from probe to bridge_attach add aux->drm_dev = bridge->dev This patch depends on https://patchwork.kernel.org/project/linux-mediatek/patch/20210722062246.2512666-4-...@ravnborg.org/ --- drivers/gpu/drm/bridge/Kconfig |8 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3335 +++ 3 files changed, 3344 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 431b6e12a81fe..e1afe171075f5 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,14 @@ config DRM_DISPLAY_CONNECTOR on ARM-based platforms. Saying Y here when this driver is not needed will not cause any issue. +config DRM_ITE_IT6505 +tristate "ITE IT6505 DisplayPort bridge" +depends on OF +select DRM_KMS_HELPER +select EXTCON +help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LONTIUM_LT8912B tristate "Lontium LT8912B DSI/HDMI bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index f2c73683cfcb7..425844c304953 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHIPONE_ICN6211) += chipone-icn6211.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..e35b28386563b --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3335 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE 0 +#define INT_RECEIVE_HPD_IRQ 1 +#define INT_SCDT_CHANGE 2 +#define INT_HDCP_FAIL 3 +#define INT_HDCP_DONE 4 +#define BIT_OFFSET(x) (((x) - INT_STATUS_01) * BITS_PER_BYTE) +#define BIT_INT_HPD INT_HPD_CHANGE +#define BIT_INT_HPD_IRQ INT_RECEIVE_HPD_IRQ +#define BIT_INT_SCDT INT_SCDT_CHANGE +#define BIT_INT_HDCP_FAIL INT_HDCP_FAIL +#define BIT_INT_HDCP_DONE INT_HDCP_DONE + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL 0 +#define INT_HDCP_KSV_CHECK 1 +#define INT_AUDIO_FIFO_ERROR 2 +#define BIT_INT_AUX_CMD_FAIL (BIT_OFFSET(0x07) + INT_AUX_CMD_FAIL) +#define BIT_INT_HDCP_KSV_CHECK (BIT_OFFSET(0x07) + INT_HDCP_KSV_CHECK) +#define BIT_INT_AUDIO_FIFO_ERROR (BIT_OFFSET(0x07) + INT_AUDIO_FIFO_ERROR) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL 4 +#define INT_VID_FIFO_ERROR 5 +#define INT_IO_LATCH_FIFO_OVERFLOW 7 +#define BIT_INT_LINK_TRAIN_FAIL (BIT_OFFSET(0x08) + INT_LINK_TRAIN_FAIL) +#define BIT_INT_VID_FIFO_ERROR (BIT_OFFSET(0x08) + INT_VID_FIFO_ERROR) +#define BIT_INT_IO_FIFO_OVERFLOW (BIT_OFFSET(0x08) + INT_IO_LATCH_FIFO_OVERFLOW) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FO
[PATCH v8] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Tested-by: Hsin-yi Wang Signed-off-by: Hermes Wu Signed-off-by: Allen Chen v7->v8: fixed "checkpatch --strict" error remove unused variable *edid remove mode_set() callback Documenting the individual bits of the interrupt mask values change it6505_dpcd_write parameter from unsigned long to u8 This patch depends on https://patchwork.kernel.org/project/linux-mediatek/patch/20210722062246.2512666-4-...@ravnborg.org/ --- drivers/gpu/drm/bridge/Kconfig |8 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | +++ 3 files changed, 3342 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 431b6e12a81fe..e1afe171075f5 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,14 @@ config DRM_DISPLAY_CONNECTOR on ARM-based platforms. Saying Y here when this driver is not needed will not cause any issue. +config DRM_ITE_IT6505 +tristate "ITE IT6505 DisplayPort bridge" +depends on OF +select DRM_KMS_HELPER +select EXTCON +help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LONTIUM_LT8912B tristate "Lontium LT8912B DSI/HDMI bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index f2c73683cfcb7..425844c304953 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHIPONE_ICN6211) += chipone-icn6211.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..27586c3fd5f28 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1, @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE 0 +#define INT_RECEIVE_HPD_IRQ 1 +#define INT_SCDT_CHANGE 2 +#define INT_HDCP_FAIL 3 +#define INT_HDCP_DONE 4 +#define BIT_OFFSET(x) (((x) - INT_STATUS_01) * BITS_PER_BYTE) +#define BIT_INT_HPD INT_HPD_CHANGE +#define BIT_INT_HPD_IRQ INT_RECEIVE_HPD_IRQ +#define BIT_INT_SCDT INT_SCDT_CHANGE +#define BIT_INT_HDCP_FAIL INT_HDCP_FAIL +#define BIT_INT_HDCP_DONE INT_HDCP_DONE + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL 0 +#define INT_HDCP_KSV_CHECK 1 +#define INT_AUDIO_FIFO_ERROR 2 +#define BIT_INT_AUX_CMD_FAIL (BIT_OFFSET(0x07) + INT_AUX_CMD_FAIL) +#define BIT_INT_HDCP_KSV_CHECK (BIT_OFFSET(0x07) + INT_HDCP_KSV_CHECK) +#define BIT_INT_AUDIO_FIFO_ERROR (BIT_OFFSET(0x07) + INT_AUDIO_FIFO_ERROR) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL 4 +#define INT_VID_FIFO_ERROR 5 +#define INT_IO_LATCH_FIFO_OVERFLOW 7 +#define BIT_INT_LINK_TRAIN_FAIL (BIT_OFFSET(0x08) + INT_LINK_TRAIN_FAIL) +#define BIT_INT_VID_FIFO_ERROR (BIT_OFFSET(0x08) + INT_VID_FIFO_ERROR) +#define BIT_INT_IO_FIFO_OVERFLOW (BIT_OFFSET(0x08) + INT_IO_LATCH_FIFO_OVERFLOW) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BI
[PATCH v7] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Tested-by: Hsin-yi Wang Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3300 +++ 3 files changed, 3308 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 85b673613687d..f009ea5bd4047 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,13 @@ config DRM_DISPLAY_CONNECTOR on ARM-based platforms. Saying Y here when this driver is not needed will not cause any issue. +config DRM_ITE_IT6505 +tristate "ITE IT6505 DisplayPort bridge" +depends on OF +select DRM_KMS_HELPER +help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LONTIUM_LT8912B tristate "Lontium LT8912B DSI/HDMI bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index f2c73683cfcb7..425844c304953 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHIPONE_ICN6211) += chipone-icn6211.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..593472096c8a6 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3300 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE 0 +#define INT_RECEIVE_HPD_IRQ 1 +#define INT_SCDT_CHANGE 2 +#define INT_HDCP_FAIL 3 +#define INT_HDCP_DONE 4 +#define BIT_OFFSET(x) ((x - INT_STATUS_01) * BITS_PER_BYTE) +#define BIT_INT_HPD INT_HPD_CHANGE +#define BIT_INT_HPD_IRQ INT_RECEIVE_HPD_IRQ +#define BIT_INT_SCDT INT_SCDT_CHANGE +#define BIT_INT_HDCP_FAIL INT_HDCP_FAIL +#define BIT_INT_HDCP_DONE INT_HDCP_DONE + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL 0 +#define INT_HDCP_KSV_CHECK 1 +#define INT_AUDIO_FIFO_ERROR 2 +#define BIT_INT_AUX_CMD_FAIL (BIT_OFFSET(0x07) + INT_AUX_CMD_FAIL) +#define BIT_INT_HDCP_KSV_CHECK (BIT_OFFSET(0x07) + INT_HDCP_KSV_CHECK) +#define BIT_INT_AUDIO_FIFO_ERROR (BIT_OFFSET(0x07) + INT_AUDIO_FIFO_ERROR) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL 4 +#define INT_VID_FIFO_ERROR 5 +#define INT_IO_LATCH_FIFO_OVERFLOW 7 +#define BIT_INT_LINK_TRAIN_FAIL (BIT_OFFSET(0x08) + INT_LINK_TRAIN_FAIL) +#define BIT_INT_VID_FIFO_ERROR (BIT_OFFSET(0x08) + INT_VID_FIFO_ERROR) +#define BIT_INT_IO_FIFO_OVERFLOW (BIT_OFFSET(0x08) + INT_IO_LATCH_FIFO_OVERFLOW) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR
[PATCH v6] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3343 +++ 3 files changed, 3351 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index e4110d6ca7b3c..25d34d7196004 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,13 @@ config DRM_LONTIUM_LT9611UXC HDMI signals Please say Y if you have such hardware. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DisplayPort bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 86e7acc76f8d6..2b2f8f0b5b0fa 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..5e76719a51a4a --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3343 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP_CTRL2 0x3A +#defi
[PATCH v5] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3343 +++ 3 files changed, 3351 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index e4110d6ca7b3c..25d34d7196004 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -74,6 +74,13 @@ config DRM_LONTIUM_LT9611UXC HDMI signals Please say Y if you have such hardware. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DisplayPort bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 86e7acc76f8d6..2b2f8f0b5b0fa 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..e4251c69fc991 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3343 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP_CTRL2 0x3A +#defi
[PATCH v4] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3344 +++ 3 files changed, 3352 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index ef91646441b16..1e9c6ade786b1 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -61,6 +61,13 @@ config DRM_LONTIUM_LT9611 HDMI signals Please say Y if you have such hardware. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DisplayPort bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 2b3aff104e466..1f8cbc27a0643 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..8ffcaf1158801 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3344 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP_CTRL2 0x3A +#define HDCP_AN
[PATCH] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3336 +++ 3 files changed, 3344 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 3e11af4e9f63e..f21dce3fabeb9 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -61,6 +61,13 @@ config DRM_LONTIUM_LT9611 HDMI signals Please say Y if you have such hardware. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DisplayPort bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index c589a6a7cbe1d..8a118fd901ad7 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..a72e524eb20b1 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3336 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP_CTRL2 0x3A +#define HDCP_AN
[PATCH v3] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen Reported-by: kernel test robot --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3338 +++ 3 files changed, 3346 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 3e11af4e9f63e..f21dce3fabeb9 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -61,6 +61,13 @@ config DRM_LONTIUM_LT9611 HDMI signals Please say Y if you have such hardware. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DisplayPort bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index c589a6a7cbe1d..8a118fd901ad7 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..0ed19673431ee --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3338 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP
[PATCH v2] drm/bridge: add it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. From: Allen Chen Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3336 +++ 3 files changed, 3344 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 3e11af4e9f63e..f21dce3fabeb9 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -61,6 +61,13 @@ config DRM_LONTIUM_LT9611 HDMI signals Please say Y if you have such hardware. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DisplayPort bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DisplayPort bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index c589a6a7cbe1d..8a118fd901ad7 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index 0..a72e524eb20b1 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3336 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP_CTRL2 0x3A +#define HDCP_AN
Re: [PATCH] block: convert tasklets to use new tasklet_setup() API
On Wed, Aug 26, 2020 at 8:43 PM Kees Cook wrote: > > On Wed, Aug 26, 2020 at 12:55:28PM +0300, Dan Carpenter wrote: > > On Wed, Aug 26, 2020 at 07:21:35AM +0530, Allen Pais wrote: > > > On Thu, Aug 20, 2020 at 3:09 AM James Bottomley > > > wrote: > > > > > > > > On Wed, 2020-08-19 at 21:54 +0530, Allen wrote: > > > > > > [...] > > > > > > > > Since both threads seem to have petered out, let me suggest in > > > > > > > > kernel.h: > > > > > > > > > > > > > > > > #define cast_out(ptr, container, member) \ > > > > > > > > container_of(ptr, typeof(*container), member) > > > > > > > > > > > > > > > > It does what you want, the argument order is the same as > > > > > > > > container_of with the only difference being you name the > > > > > > > > containing structure instead of having to specify its type. > > > > > > > > > > > > > > Not to incessantly bike shed on the naming, but I don't like > > > > > > > cast_out, it's not very descriptive. And it has connotations of > > > > > > > getting rid of something, which isn't really true. > > > > > > > > > > > > Um, I thought it was exactly descriptive: you're casting to the > > > > > > outer container. I thought about following the C++ dynamic casting > > > > > > style, so out_cast(), but that seemed a bit pejorative. What about > > > > > > outer_cast()? > > > > > > > > > > > > > FWIW, I like the from_ part of the original naming, as it has > > > > > > > some clues as to what is being done here. Why not just > > > > > > > from_container()? That should immediately tell people what it > > > > > > > does without having to look up the implementation, even before > > > > > > > this becomes a part of the accepted coding norm. > > > > > > > > > > > > I'm not opposed to container_from() but it seems a little less > > > > > > descriptive than outer_cast() but I don't really care. I always > > > > > > have to look up container_of() when I'm using it so this would just > > > > > > be another macro of that type ... > > > > > > > > > > > > > > > > So far we have a few which have been suggested as replacement > > > > > for from_tasklet() > > > > > > > > > > - out_cast() or outer_cast() > > > > > - from_member(). > > > > > - container_from() or from_container() > > > > > > > > > > from_container() sounds fine, would trimming it a bit work? like > > > > > from_cont(). > > > > > > > > I'm fine with container_from(). It's the same form as container_of() > > > > and I think we need urgent agreement to not stall everything else so > > > > the most innocuous name is likely to get the widest acceptance. > > > > > > Kees, > > > > > > Will you be sending the newly proposed API to Linus? I have V2 > > > which uses container_from() > > > ready to be sent out. > > > > I liked that James swapped the first two arguments so that it matches > > container_of(). Plus it's nice that when you have: > > > > struct whatever *foo = container_from(ptr, foo, member); > > > > Then it means that "ptr == &foo->member". > > I'm a bit stalled right now -- the merge window was keeping me busy, and > this week is the Linux Plumbers Conference. This is on my list, but I > haven't gotten back around to it. If you want, feel free to send the > container_from() patch; you might be able to unblock this faster than me > right now. :) > Sure, Thanks. -- - Allen ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] block: convert tasklets to use new tasklet_setup() API
On Thu, Aug 20, 2020 at 3:09 AM James Bottomley wrote: > > On Wed, 2020-08-19 at 21:54 +0530, Allen wrote: > > > [...] > > > > > Since both threads seem to have petered out, let me suggest in > > > > > kernel.h: > > > > > > > > > > #define cast_out(ptr, container, member) \ > > > > > container_of(ptr, typeof(*container), member) > > > > > > > > > > It does what you want, the argument order is the same as > > > > > container_of with the only difference being you name the > > > > > containing structure instead of having to specify its type. > > > > > > > > Not to incessantly bike shed on the naming, but I don't like > > > > cast_out, it's not very descriptive. And it has connotations of > > > > getting rid of something, which isn't really true. > > > > > > Um, I thought it was exactly descriptive: you're casting to the > > > outer container. I thought about following the C++ dynamic casting > > > style, so out_cast(), but that seemed a bit pejorative. What about > > > outer_cast()? > > > > > > > FWIW, I like the from_ part of the original naming, as it has > > > > some clues as to what is being done here. Why not just > > > > from_container()? That should immediately tell people what it > > > > does without having to look up the implementation, even before > > > > this becomes a part of the accepted coding norm. > > > > > > I'm not opposed to container_from() but it seems a little less > > > descriptive than outer_cast() but I don't really care. I always > > > have to look up container_of() when I'm using it so this would just > > > be another macro of that type ... > > > > > > > So far we have a few which have been suggested as replacement > > for from_tasklet() > > > > - out_cast() or outer_cast() > > - from_member(). > > - container_from() or from_container() > > > > from_container() sounds fine, would trimming it a bit work? like > > from_cont(). > > I'm fine with container_from(). It's the same form as container_of() > and I think we need urgent agreement to not stall everything else so > the most innocuous name is likely to get the widest acceptance. Kees, Will you be sending the newly proposed API to Linus? I have V2 which uses container_from() ready to be sent out. Thanks. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] block: convert tasklets to use new tasklet_setup() API
> [...] > > > Since both threads seem to have petered out, let me suggest in > > > kernel.h: > > > > > > #define cast_out(ptr, container, member) \ > > > container_of(ptr, typeof(*container), member) > > > > > > It does what you want, the argument order is the same as > > > container_of with the only difference being you name the containing > > > structure instead of having to specify its type. > > > > Not to incessantly bike shed on the naming, but I don't like > > cast_out, it's not very descriptive. And it has connotations of > > getting rid of something, which isn't really true. > > Um, I thought it was exactly descriptive: you're casting to the outer > container. I thought about following the C++ dynamic casting style, so > out_cast(), but that seemed a bit pejorative. What about outer_cast()? > > > FWIW, I like the from_ part of the original naming, as it has some > > clues as to what is being done here. Why not just from_container()? > > That should immediately tell people what it does without having to > > look up the implementation, even before this becomes a part of the > > accepted coding norm. > > I'm not opposed to container_from() but it seems a little less > descriptive than outer_cast() but I don't really care. I always have > to look up container_of() when I'm using it so this would just be > another macro of that type ... > So far we have a few which have been suggested as replacement for from_tasklet() - out_cast() or outer_cast() - from_member(). - container_from() or from_container() from_container() sounds fine, would trimming it a bit work? like from_cont(). -- - Allen ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] block: convert tasklets to use new tasklet_setup() API
> > > > > > > > > > > > > > > > In preparation for unconditionally passing the > > > > > > > > struct tasklet_struct pointer to all tasklet > > > > > > > > callbacks, switch to using the new tasklet_setup() > > > > > > > > and from_tasklet() to pass the tasklet pointer explicitly. > > > > > > > > > > > > > > Who came up with the idea to add a macro 'from_tasklet' that > > > > > > > is just container_of? container_of in the code would be > > > > > > > _much_ more readable, and not leave anyone guessing wtf > > > > > > > from_tasklet is doing. > > > > > > > > > > > > > > I'd fix that up now before everything else goes in... > > > > > > > > > > > > As I mentioned in the other thread, I think this makes things > > > > > > much more readable. It's the same thing that the timer_struct > > > > > > conversion did (added a container_of wrapper) to avoid the > > > > > > ever-repeating use of typeof(), long lines, etc. > > > > > > > > > > But then it should use a generic name, instead of each sub-system > > > > > using some random name that makes people look up exactly what it > > > > > does. I'm not huge fan of the container_of() redundancy, but > > > > > adding private variants of this doesn't seem like the best way > > > > > forward. Let's have a generic helper that does this, and use it > > > > > everywhere. > > > > > > > > I'm open to suggestions, but as things stand, these kinds of > > > > treewide > > > > > > On naming? Implementation is just as it stands, from_tasklet() is > > > totally generic which is why I objected to it. from_member()? Not > > > great with naming... But I can see this going further and then we'll > > > suddenly have tons of these. It's not good for readability. > > > > Since both threads seem to have petered out, let me suggest in > > kernel.h: > > > > #define cast_out(ptr, container, member) \ > > container_of(ptr, typeof(*container), member) > > > > It does what you want, the argument order is the same as container_of > > with the only difference being you name the containing structure > > instead of having to specify its type. > > I like this! Shall I send this to Linus to see if this can land in -rc2 > for use going forward? > Cool, I shall wait for it to be accepted and then spin out V2 with cast_out() -- - Allen ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] char: ipmi: convert tasklets to use new tasklet_setup() API
> >
> > Signed-off-by: Romain Perier
> > Signed-off-by: Allen Pais
>
> This looks good to me.
>
> Reviewed-by: Corey Minyard
>
> Are you planning to push this, or do you want me to take it? If you
> want me to take it, what is the urgency?
Thanks. Well, not hurry, as long as it goes into 5.9 with all other
changes.
>
> -corey
>
> > ---
> > drivers/char/ipmi/ipmi_msghandler.c | 13 ++---
> > 1 file changed, 6 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/char/ipmi/ipmi_msghandler.c
> > b/drivers/char/ipmi/ipmi_msghandler.c
> > index 737c0b6b24ea..e1814b6a1225 100644
> > --- a/drivers/char/ipmi/ipmi_msghandler.c
> > +++ b/drivers/char/ipmi/ipmi_msghandler.c
> > @@ -39,7 +39,7 @@
> >
> > static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void);
> > static int ipmi_init_msghandler(void);
> > -static void smi_recv_tasklet(unsigned long);
> > +static void smi_recv_tasklet(struct tasklet_struct *t);
> > static void handle_new_recv_msgs(struct ipmi_smi *intf);
> > static void need_waiter(struct ipmi_smi *intf);
> > static int handle_one_recv_msg(struct ipmi_smi *intf,
> > @@ -3430,9 +3430,8 @@ int ipmi_add_smi(struct module *owner,
> > intf->curr_seq = 0;
> > spin_lock_init(&intf->waiting_rcv_msgs_lock);
> > INIT_LIST_HEAD(&intf->waiting_rcv_msgs);
> > - tasklet_init(&intf->recv_tasklet,
> > - smi_recv_tasklet,
> > - (unsigned long) intf);
> > + tasklet_setup(&intf->recv_tasklet,
> > + smi_recv_tasklet);
> > atomic_set(&intf->watchdog_pretimeouts_to_deliver, 0);
> > spin_lock_init(&intf->xmit_msgs_lock);
> > INIT_LIST_HEAD(&intf->xmit_msgs);
> > @@ -4467,10 +4466,10 @@ static void handle_new_recv_msgs(struct ipmi_smi
> > *intf)
> > }
> > }
> >
> > -static void smi_recv_tasklet(unsigned long val)
> > +static void smi_recv_tasklet(struct tasklet_struct *t)
> > {
> > unsigned long flags = 0; /* keep us warning-free. */
> > - struct ipmi_smi *intf = (struct ipmi_smi *) val;
> > + struct ipmi_smi *intf = from_tasklet(intf, t, recv_tasklet);
> > int run_to_completion = intf->run_to_completion;
> > struct ipmi_smi_msg *newmsg = NULL;
> >
> > @@ -4542,7 +4541,7 @@ void ipmi_smi_msg_received(struct ipmi_smi *intf,
> > spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags);
> >
> > if (run_to_completion)
> > - smi_recv_tasklet((unsigned long) intf);
> > + smi_recv_tasklet(&intf->recv_tasklet);
> > else
> > tasklet_schedule(&intf->recv_tasklet);
> > }
> > --
> > 2.17.1
> >
--
- Allen
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[PATCH] input: serio: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/input/serio/hp_sdc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/input/serio/hp_sdc.c b/drivers/input/serio/hp_sdc.c
index 13eacf6ab431..91f8253ac66a 100644
--- a/drivers/input/serio/hp_sdc.c
+++ b/drivers/input/serio/hp_sdc.c
@@ -301,7 +301,7 @@ static irqreturn_t hp_sdc_nmisr(int irq, void *dev_id)
unsigned long hp_sdc_put(void);
-static void hp_sdc_tasklet(unsigned long foo)
+static void hp_sdc_tasklet(struct tasklet_struct *unused)
{
write_lock_irq(&hp_sdc.rtq_lock);
@@ -890,7 +890,7 @@ static int __init hp_sdc_init(void)
hp_sdc_status_in8();
hp_sdc_data_in8();
- tasklet_init(&hp_sdc.task, hp_sdc_tasklet, 0);
+ tasklet_setup(&hp_sdc.task, hp_sdc_tasklet, 0);
/* Sync the output buffer registers, thus scheduling hp_sdc_tasklet. */
t_sync.actidx = 0;
--
2.17.1
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[PATCH] drm: i915: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly
and remove the .data field.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 31 ++-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++--
2 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 24322ef08aa4..c45e42b9f239 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3130,9 +3130,10 @@ static bool preempt_timeout(const struct intel_engine_cs
*const engine)
* Check the unread Context Status Buffers and manage the submission of new
* contexts to the ELSP accordingly.
*/
-static void execlists_submission_tasklet(unsigned long data)
+static void execlists_submission_tasklet(struct tasklet_struct *t)
{
- struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
+ struct intel_engine_cs * const engine = from_tasklet(engine, t,
+execlists.tasklet);
bool timeout = preempt_timeout(engine);
process_csb(engine);
@@ -4306,9 +4307,10 @@ static void execlists_reset_rewind(struct
intel_engine_cs *engine, bool stalled)
spin_unlock_irqrestore(&engine->active.lock, flags);
}
-static void nop_submission_tasklet(unsigned long data)
+static void nop_submission_tasklet(struct tasklet_struct *t)
{
- struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
+ struct intel_engine_cs * const engine = from_tasklet(engine, t,
+execlists.tasklet);
/* The driver is wedged; don't process any more events. */
WRITE_ONCE(engine->execlists.queue_priority_hint, INT_MIN);
@@ -4391,7 +4393,8 @@ static void execlists_reset_cancel(struct intel_engine_cs
*engine)
execlists->queue = RB_ROOT_CACHED;
GEM_BUG_ON(__tasklet_is_enabled(&execlists->tasklet));
- execlists->tasklet.func = nop_submission_tasklet;
+ execlists->tasklet.func = (void (*)(unsigned long))
+ nop_submission_tasklet;
spin_unlock_irqrestore(&engine->active.lock, flags);
}
@@ -4986,7 +4989,8 @@ void intel_execlists_set_default_submission(struct
intel_engine_cs *engine)
{
engine->submit_request = execlists_submit_request;
engine->schedule = i915_schedule;
- engine->execlists.tasklet.func = execlists_submission_tasklet;
+ engine->execlists.tasklet.func = (void (*)(unsigned long))
+ execlists_submission_tasklet;
engine->reset.prepare = execlists_reset_prepare;
engine->reset.rewind = execlists_reset_rewind;
@@ -5113,8 +5117,7 @@ int intel_execlists_submission_setup(struct
intel_engine_cs *engine)
struct intel_uncore *uncore = engine->uncore;
u32 base = engine->mmio_base;
- tasklet_init(&engine->execlists.tasklet,
-execlists_submission_tasklet, (unsigned long)engine);
+ tasklet_setup(&engine->execlists.tasklet, execlists_submission_tasklet);
timer_setup(&engine->execlists.timer, execlists_timeslice, 0);
timer_setup(&engine->execlists.preempt, execlists_preempt, 0);
@@ -5509,9 +5512,10 @@ static intel_engine_mask_t
virtual_submission_mask(struct virtual_engine *ve)
return mask;
}
-static void virtual_submission_tasklet(unsigned long data)
+static void virtual_submission_tasklet(struct tasklet_struct *t)
{
- struct virtual_engine * const ve = (struct virtual_engine *)data;
+ struct virtual_engine * ve = from_tasklet(ve, t,
+ base.execlists.tasklet);
const int prio = READ_ONCE(ve->base.execlists.queue_priority_hint);
intel_engine_mask_t mask;
unsigned int n;
@@ -5724,9 +5728,8 @@ intel_execlists_create_virtual(struct intel_engine_cs
**siblings,
INIT_LIST_HEAD(virtual_queue(ve));
ve->base.execlists.queue_priority_hint = INT_MIN;
- tasklet_init(&ve->base.execlists.tasklet,
-virtual_submission_tasklet,
-(unsigned long)ve);
+ tasklet_setup(&ve->base.execlists.tasklet,
+virtual_submission_tasklet);
intel_context_init(&ve->context, &ve->base);
@@ -5748,7 +5751,7 @@ intel_execlists_create_virtual(struct intel_engine_cs
**siblings,
* layering if we handle cloning of the requests and
* submitting a copy into each backend.
*/
- if (sibling->execlists.tasklet.func !=
+
[PATCH] block: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/block/umem.c| 6 +++---
drivers/block/xsysace.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/block/umem.c b/drivers/block/umem.c
index 2b95d7b33b91..320781d5d156 100644
--- a/drivers/block/umem.c
+++ b/drivers/block/umem.c
@@ -405,7 +405,7 @@ static int add_bio(struct cardinfo *card)
return 1;
}
-static void process_page(unsigned long data)
+static void process_page(struct tasklet_struct *t)
{
/* check if any of the requests in the page are DMA_COMPLETE,
* and deal with them appropriately.
@@ -415,7 +415,7 @@ static void process_page(unsigned long data)
*/
struct mm_page *page;
struct bio *return_bio = NULL;
- struct cardinfo *card = (struct cardinfo *)data;
+ struct cardinfo *card = from_tasklet(card, t, tasklet);
unsigned int dma_status = card->dma_status;
spin_lock(&card->lock);
@@ -891,7 +891,7 @@ static int mm_pci_probe(struct pci_dev *dev, const struct
pci_device_id *id)
if (!card->queue)
goto failed_alloc;
- tasklet_init(&card->tasklet, process_page, (unsigned long)card);
+ tasklet_setup(&card->tasklet, process_page);
card->check_batteries = 0;
diff --git a/drivers/block/xsysace.c b/drivers/block/xsysace.c
index 5d8e0ab3f054..bdd50a87d10f 100644
--- a/drivers/block/xsysace.c
+++ b/drivers/block/xsysace.c
@@ -762,9 +762,9 @@ static void ace_fsm_dostate(struct ace_device *ace)
}
}
-static void ace_fsm_tasklet(unsigned long data)
+static void ace_fsm_tasklet(struct tasklet_struct *t)
{
- struct ace_device *ace = (void *)data;
+ struct ace_device *ace = from_tasklet(ace, t, fsm_tasklet);
unsigned long flags;
spin_lock_irqsave(&ace->lock, flags);
@@ -1001,7 +1001,7 @@ static int ace_setup(struct ace_device *ace)
/*
* Initialize the state machine tasklet and stall timer
*/
- tasklet_init(&ace->fsm_tasklet, ace_fsm_tasklet, (unsigned long)ace);
+ tasklet_setup(&ace->fsm_tasklet, ace_fsm_tasklet);
timer_setup(&ace->stall_timer, ace_stall_timer, 0);
/*
--
2.17.1
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[PATCH] drivers: rapidio: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/rapidio/devices/tsi721_dma.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/rapidio/devices/tsi721_dma.c
b/drivers/rapidio/devices/tsi721_dma.c
index d375c02059f3..4a2bb6d7c692 100644
--- a/drivers/rapidio/devices/tsi721_dma.c
+++ b/drivers/rapidio/devices/tsi721_dma.c
@@ -566,9 +566,9 @@ static void tsi721_advance_work(struct tsi721_bdma_chan
*bdma_chan,
bdma_chan->id);
}
-static void tsi721_dma_tasklet(unsigned long data)
+static void tsi721_dma_tasklet(struct tasklet_struct *t)
{
- struct tsi721_bdma_chan *bdma_chan = (struct tsi721_bdma_chan *)data;
+ struct tsi721_bdma_chan *bdma_chan = from_tasklet(bdma_chan, t,
tasklet);
u32 dmac_int, dmac_sts;
dmac_int = ioread32(bdma_chan->regs + TSI721_DMAC_INT);
@@ -988,8 +988,7 @@ int tsi721_register_dma(struct tsi721_device *priv)
INIT_LIST_HEAD(&bdma_chan->queue);
INIT_LIST_HEAD(&bdma_chan->free_list);
- tasklet_init(&bdma_chan->tasklet, tsi721_dma_tasklet,
-(unsigned long)bdma_chan);
+ tasklet_setup(&bdma_chan->tasklet, tsi721_dma_tasklet);
list_add_tail(&bdma_chan->dchan.device_node,
&mport->dma.channels);
nr_channels++;
--
2.17.1
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[PATCH] char: ipmi: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/char/ipmi/ipmi_msghandler.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/char/ipmi/ipmi_msghandler.c
b/drivers/char/ipmi/ipmi_msghandler.c
index 737c0b6b24ea..e1814b6a1225 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -39,7 +39,7 @@
static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void);
static int ipmi_init_msghandler(void);
-static void smi_recv_tasklet(unsigned long);
+static void smi_recv_tasklet(struct tasklet_struct *t);
static void handle_new_recv_msgs(struct ipmi_smi *intf);
static void need_waiter(struct ipmi_smi *intf);
static int handle_one_recv_msg(struct ipmi_smi *intf,
@@ -3430,9 +3430,8 @@ int ipmi_add_smi(struct module *owner,
intf->curr_seq = 0;
spin_lock_init(&intf->waiting_rcv_msgs_lock);
INIT_LIST_HEAD(&intf->waiting_rcv_msgs);
- tasklet_init(&intf->recv_tasklet,
-smi_recv_tasklet,
-(unsigned long) intf);
+ tasklet_setup(&intf->recv_tasklet,
+smi_recv_tasklet);
atomic_set(&intf->watchdog_pretimeouts_to_deliver, 0);
spin_lock_init(&intf->xmit_msgs_lock);
INIT_LIST_HEAD(&intf->xmit_msgs);
@@ -4467,10 +4466,10 @@ static void handle_new_recv_msgs(struct ipmi_smi *intf)
}
}
-static void smi_recv_tasklet(unsigned long val)
+static void smi_recv_tasklet(struct tasklet_struct *t)
{
unsigned long flags = 0; /* keep us warning-free. */
- struct ipmi_smi *intf = (struct ipmi_smi *) val;
+ struct ipmi_smi *intf = from_tasklet(intf, t, recv_tasklet);
int run_to_completion = intf->run_to_completion;
struct ipmi_smi_msg *newmsg = NULL;
@@ -4542,7 +4541,7 @@ void ipmi_smi_msg_received(struct ipmi_smi *intf,
spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags);
if (run_to_completion)
- smi_recv_tasklet((unsigned long) intf);
+ smi_recv_tasklet(&intf->recv_tasklet);
else
tasklet_schedule(&intf->recv_tasklet);
}
--
2.17.1
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[PATCH] arch: um: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
arch/um/drivers/vector_kern.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/um/drivers/vector_kern.c b/arch/um/drivers/vector_kern.c
index 8735c468230a..06980870ae23 100644
--- a/arch/um/drivers/vector_kern.c
+++ b/arch/um/drivers/vector_kern.c
@@ -1196,9 +1196,9 @@ static int vector_net_close(struct net_device *dev)
/* TX tasklet */
-static void vector_tx_poll(unsigned long data)
+static void vector_tx_poll(struct tasklet_struct *t)
{
- struct vector_private *vp = (struct vector_private *)data;
+ struct vector_private *vp = from_tasklet(vp, t, tx_poll);
vp->estats.tx_kicks++;
vector_send(vp->tx_queue);
@@ -1629,7 +1629,7 @@ static void vector_eth_configure(
});
dev->features = dev->hw_features = (NETIF_F_SG | NETIF_F_FRAGLIST);
- tasklet_init(&vp->tx_poll, vector_tx_poll, (unsigned long)vp);
+ tasklet_setup(&vp->tx_poll, vector_tx_poll);
INIT_WORK(&vp->reset_tx, vector_reset_tx);
timer_setup(&vp->tl, vector_timer_expire, 0);
--
2.17.1
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[PATCH 1/2] mailbox: bcm: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/mailbox/bcm-pdc-mailbox.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c
b/drivers/mailbox/bcm-pdc-mailbox.c
index 53945ca5d785..5b375985f7b8 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -962,9 +962,9 @@ static irqreturn_t pdc_irq_handler(int irq, void *data)
* a DMA receive interrupt. Reenables the receive interrupt.
* @data: PDC state structure
*/
-static void pdc_tasklet_cb(unsigned long data)
+static void pdc_tasklet_cb(struct tasklet_struct *t)
{
- struct pdc_state *pdcs = (struct pdc_state *)data;
+ struct pdc_state *pdcs = from_tasklet(pdcs, t, rx_tasklet);
pdc_receive(pdcs);
@@ -1589,7 +1589,7 @@ static int pdc_probe(struct platform_device *pdev)
pdc_hw_init(pdcs);
/* Init tasklet for deferred DMA rx processing */
- tasklet_init(&pdcs->rx_tasklet, pdc_tasklet_cb, (unsigned long)pdcs);
+ tasklet_setup(&pdcs->rx_tasklet, pdc_tasklet_cb);
err = pdc_interrupts_init(pdcs);
if (err)
--
2.17.1
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[PATCH] net: atm: convert tasklets callbacks to use from_tasklet()
From: Allen Pais
Update all the callbacks of all tasklets by using
from_tasklet() and remove .data field.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
net/atm/pppoatm.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/net/atm/pppoatm.c b/net/atm/pppoatm.c
index 579b66da1d95..3803be8470f7 100644
--- a/net/atm/pppoatm.c
+++ b/net/atm/pppoatm.c
@@ -416,7 +416,6 @@ static int pppoatm_assign_vcc(struct atm_vcc *atmvcc, void
__user *arg)
pvcc->chan.mtu = atmvcc->qos.txtp.max_sdu - PPP_HDRLEN -
(be.encaps == e_vc ? 0 : LLC_LEN);
pvcc->wakeup_tasklet = tasklet_proto;
- pvcc->wakeup_tasklet.data = (unsigned long) &pvcc->chan;
err = ppp_register_channel(&pvcc->chan);
if (err != 0) {
kfree(pvcc);
--
2.17.1
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[PATCH] firewire: ohci: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/firewire/ohci.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 7dde21b18b04..6298ff03796e 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -921,9 +921,9 @@ static void ar_recycle_buffers(struct ar_context *ctx,
unsigned int end_buffer)
}
}
-static void ar_context_tasklet(unsigned long data)
+static void ar_context_tasklet(struct tasklet_struct *t)
{
- struct ar_context *ctx = (struct ar_context *)data;
+ struct ar_context *ctx = from_tasklet(ctx, t, tasklet);
unsigned int end_buffer_index, end_buffer_offset;
void *p, *end;
@@ -977,7 +977,7 @@ static int ar_context_init(struct ar_context *ctx, struct
fw_ohci *ohci,
ctx->regs= regs;
ctx->ohci= ohci;
- tasklet_init(&ctx->tasklet, ar_context_tasklet, (unsigned long)ctx);
+ tasklet_setup(&ctx->tasklet, ar_context_tasklet);
for (i = 0; i < AR_BUFFERS; i++) {
ctx->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32);
@@ -1049,9 +1049,9 @@ static struct descriptor *find_branch_descriptor(struct
descriptor *d, int z)
return d + z - 1;
}
-static void context_tasklet(unsigned long data)
+static void context_tasklet(struct tasklet_struct *t)
{
- struct context *ctx = (struct context *) data;
+ struct context *ctx = from_tasklet(ctx, t, tasklet);
struct descriptor *d, *last;
u32 address;
int z;
@@ -1145,7 +1145,7 @@ static int context_init(struct context *ctx, struct
fw_ohci *ohci,
ctx->buffer_tail = list_entry(ctx->buffer_list.next,
struct descriptor_buffer, list);
- tasklet_init(&ctx->tasklet, context_tasklet, (unsigned long)ctx);
+ tasklet_setup(&ctx->tasklet, context_tasklet);
ctx->callback = callback;
/*
@@ -1420,7 +1420,7 @@ static void at_context_flush(struct context *ctx)
tasklet_disable(&ctx->tasklet);
ctx->flushing = true;
- context_tasklet((unsigned long)ctx);
+ context_tasklet(&ctx->tasklet);
ctx->flushing = false;
tasklet_enable(&ctx->tasklet);
@@ -3472,7 +3472,7 @@ static int ohci_flush_iso_completions(struct
fw_iso_context *base)
tasklet_disable(&ctx->context.tasklet);
if (!test_and_set_bit_lock(0, &ctx->flushing_completions)) {
- context_tasklet((unsigned long)&ctx->context);
+ context_tasklet(&ctx->context.tasklet);
switch (base->type) {
case FW_ISO_CONTEXT_TRANSMIT:
--
2.17.1
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[PATCH 1/2] hsi: nokia-modem: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/hsi/clients/nokia-modem.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/hsi/clients/nokia-modem.c
b/drivers/hsi/clients/nokia-modem.c
index cd7ebf4c2e2f..36d373f089ce 100644
--- a/drivers/hsi/clients/nokia-modem.c
+++ b/drivers/hsi/clients/nokia-modem.c
@@ -36,9 +36,10 @@ struct nokia_modem_device {
struct hsi_client *cmt_speech;
};
-static void do_nokia_modem_rst_ind_tasklet(unsigned long data)
+static void do_nokia_modem_rst_ind_tasklet(struct tasklet_struct *t)
{
- struct nokia_modem_device *modem = (struct nokia_modem_device *)data;
+ struct nokia_modem_device *modem = from_tasklet(modem, t,
+ nokia_modem_rst_ind_tasklet);
if (!modem)
return;
@@ -155,8 +156,8 @@ static int nokia_modem_probe(struct device *dev)
modem->nokia_modem_rst_ind_irq = irq;
pflags = irq_get_trigger_type(irq);
- tasklet_init(&modem->nokia_modem_rst_ind_tasklet,
- do_nokia_modem_rst_ind_tasklet, (unsigned long)modem);
+ tasklet_setup(&modem->nokia_modem_rst_ind_tasklet,
+ do_nokia_modem_rst_ind_tasklet);
err = devm_request_irq(dev, irq, nokia_modem_rst_ind_isr,
pflags, "modem_rst_ind", modem);
if (err < 0) {
--
2.17.1
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[PATCH] driver: hv: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/hv/channel_mgmt.c | 3 +--
drivers/hv/connection.c | 4 ++--
drivers/hv/hv.c | 3 +--
drivers/hv/hyperv_vmbus.h | 4 ++--
drivers/hv/vmbus_drv.c| 4 ++--
5 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c
index 591106cf58fc..640fc1688d49 100644
--- a/drivers/hv/channel_mgmt.c
+++ b/drivers/hv/channel_mgmt.c
@@ -321,8 +321,7 @@ static struct vmbus_channel *alloc_channel(void)
INIT_LIST_HEAD(&channel->sc_list);
- tasklet_init(&channel->callback_event,
-vmbus_on_event, (unsigned long)channel);
+ tasklet_setup(&channel->callback_event, vmbus_on_event);
hv_ringbuffer_pre_init(channel);
diff --git a/drivers/hv/connection.c b/drivers/hv/connection.c
index 11170d9a2e1a..23e10ebecf5c 100644
--- a/drivers/hv/connection.c
+++ b/drivers/hv/connection.c
@@ -322,9 +322,9 @@ struct vmbus_channel *relid2channel(u32 relid)
*If this tasklet has been running for a long time
*then reschedule ourselves.
*/
-void vmbus_on_event(unsigned long data)
+void vmbus_on_event(struct tasklet_struct *t)
{
- struct vmbus_channel *channel = (void *) data;
+ struct vmbus_channel *channel = from_tasklet(channel, t,
callback_event);
unsigned long time_limit = jiffies + 2;
trace_vmbus_on_event(channel);
diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
index da69338f92f5..91a0582387d6 100644
--- a/drivers/hv/hv.c
+++ b/drivers/hv/hv.c
@@ -96,8 +96,7 @@ int hv_synic_alloc(void)
for_each_present_cpu(cpu) {
hv_cpu = per_cpu_ptr(hv_context.cpu_context, cpu);
- tasklet_init(&hv_cpu->msg_dpc,
-vmbus_on_msg_dpc, (unsigned long) hv_cpu);
+ tasklet_setup(&hv_cpu->msg_dpc, vmbus_on_msg_dpc);
hv_cpu->synic_message_page =
(void *)get_zeroed_page(GFP_ATOMIC);
diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h
index 40e2b9f91163..36199d8ea8c3 100644
--- a/drivers/hv/hyperv_vmbus.h
+++ b/drivers/hv/hyperv_vmbus.h
@@ -351,8 +351,8 @@ void vmbus_disconnect(void);
int vmbus_post_msg(void *buffer, size_t buflen, bool can_sleep);
-void vmbus_on_event(unsigned long data);
-void vmbus_on_msg_dpc(unsigned long data);
+void vmbus_on_event(struct tasklet_struct *t);
+void vmbus_on_msg_dpc(struct tasklet_struct *t);
int hv_kvp_init(struct hv_util_service *srv);
void hv_kvp_deinit(void);
diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c
index 910b6e90866c..6b7987dac97a 100644
--- a/drivers/hv/vmbus_drv.c
+++ b/drivers/hv/vmbus_drv.c
@@ -1043,9 +1043,9 @@ static void vmbus_onmessage_work(struct work_struct *work)
kfree(ctx);
}
-void vmbus_on_msg_dpc(unsigned long data)
+void vmbus_on_msg_dpc(struct tasklet_struct *t)
{
- struct hv_per_cpu_context *hv_cpu = (void *)data;
+ struct hv_per_cpu_context *hv_cpu = from_tasklet(hv_cpu, t, msg_dpc);
void *page_addr = hv_cpu->synic_message_page;
struct hv_message *msg = (struct hv_message *)page_addr +
VMBUS_MESSAGE_SINT;
--
2.17.1
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[PATCH] drivers: s390: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/s390/block/dasd.c | 18 --
drivers/s390/char/con3215.c | 6 +++---
drivers/s390/char/con3270.c | 7 +++
drivers/s390/char/tty3270.c | 15 +++
drivers/s390/cio/qdio.h | 6 +++---
drivers/s390/cio/qdio_main.c | 12 ++--
drivers/s390/cio/qdio_setup.c | 9 +++--
drivers/s390/net/ctcm_main.c | 8 +++-
drivers/s390/net/ctcm_mpc.c | 16
drivers/s390/net/ctcm_mpc.h | 6 +++---
10 files changed, 47 insertions(+), 56 deletions(-)
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index eb17fea8075c..ec0d8a4ed05f 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -72,8 +72,8 @@ MODULE_LICENSE("GPL");
static int dasd_alloc_queue(struct dasd_block *);
static void dasd_free_queue(struct dasd_block *);
static int dasd_flush_block_queue(struct dasd_block *);
-static void dasd_device_tasklet(unsigned long);
-static void dasd_block_tasklet(unsigned long);
+static void dasd_device_tasklet(struct tasklet_struct *);
+static void dasd_block_tasklet(struct tasklet_struct *);
static void do_kick_device(struct work_struct *);
static void do_restore_device(struct work_struct *);
static void do_reload_device(struct work_struct *);
@@ -133,8 +133,7 @@ struct dasd_device *dasd_alloc_device(void)
dasd_init_chunklist(&device->ese_chunks, device->ese_mem, PAGE_SIZE *
2);
spin_lock_init(&device->mem_lock);
atomic_set(&device->tasklet_scheduled, 0);
- tasklet_init(&device->tasklet, dasd_device_tasklet,
-(unsigned long) device);
+ tasklet_setup(&device->tasklet, dasd_device_tasklet);
INIT_LIST_HEAD(&device->ccw_queue);
timer_setup(&device->timer, dasd_device_timeout, 0);
INIT_WORK(&device->kick_work, do_kick_device);
@@ -174,8 +173,7 @@ struct dasd_block *dasd_alloc_block(void)
atomic_set(&block->open_count, -1);
atomic_set(&block->tasklet_scheduled, 0);
- tasklet_init(&block->tasklet, dasd_block_tasklet,
-(unsigned long) block);
+ tasklet_setup(&block->tasklet, dasd_block_tasklet);
INIT_LIST_HEAD(&block->ccw_queue);
spin_lock_init(&block->queue_lock);
INIT_LIST_HEAD(&block->format_list);
@@ -2187,9 +2185,9 @@ EXPORT_SYMBOL_GPL(dasd_flush_device_queue);
/*
* Acquire the device lock and process queues for the device.
*/
-static void dasd_device_tasklet(unsigned long data)
+static void dasd_device_tasklet(struct tasklet_struct *t)
{
- struct dasd_device *device = (struct dasd_device *) data;
+ struct dasd_device *device = from_tasklet(device, t, tasklet);
struct list_head final_queue;
atomic_set (&device->tasklet_scheduled, 0);
@@ -2929,9 +2927,9 @@ static void __dasd_block_start_head(struct dasd_block
*block)
* block layer request queue, creates ccw requests, enqueues them on
* a dasd_device and processes ccw requests that have been returned.
*/
-static void dasd_block_tasklet(unsigned long data)
+static void dasd_block_tasklet(struct tasklet_struct *t)
{
- struct dasd_block *block = (struct dasd_block *) data;
+ struct dasd_block *block = from_tasklet(block, t, tasklet);
struct list_head final_queue;
struct list_head *l, *n;
struct dasd_ccw_req *cqr;
diff --git a/drivers/s390/char/con3215.c b/drivers/s390/char/con3215.c
index 92757f9bd010..ab5964cffb91 100644
--- a/drivers/s390/char/con3215.c
+++ b/drivers/s390/char/con3215.c
@@ -334,9 +334,9 @@ static inline void raw3215_try_io(struct raw3215_info *raw)
/*
* Call tty_wakeup from tasklet context
*/
-static void raw3215_wakeup(unsigned long data)
+static void raw3215_wakeup(struct tasklet_struct *t)
{
- struct raw3215_info *raw = (struct raw3215_info *) data;
+ struct raw3215_info *raw = from_tasklet(raw, t, tlet);
struct tty_struct *tty;
tty = tty_port_tty_get(&raw->port);
@@ -673,7 +673,7 @@ static struct raw3215_info *raw3215_alloc_info(void)
timer_setup(&info->timer, raw3215_timeout, 0);
init_waitqueue_head(&info->empty_wait);
- tasklet_init(&info->tlet, raw3215_wakeup, (unsigned long)info);
+ tasklet_setup(&info->tlet, raw3215_wakeup);
tty_port_init(&info->port);
return info;
diff --git a/drivers/s390/char/con3270.c b/drivers/s390/char/con3270.c
index e17364e13d2f..02de4281d5b7 100644
--- a/drivers/s390/char/con3270.c
+++ b/drivers/s390/char/con3270.c
@@ -291,8 +291,9 @@ con
[PATCH] drivers: ntb: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/ntb/ntb_transport.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c
index e6d1f5b298f3..ab3bee2fc803 100644
--- a/drivers/ntb/ntb_transport.c
+++ b/drivers/ntb/ntb_transport.c
@@ -273,7 +273,7 @@ enum {
#define NTB_QP_DEF_NUM_ENTRIES 100
#define NTB_LINK_DOWN_TIMEOUT 10
-static void ntb_transport_rxc_db(unsigned long data);
+static void ntb_transport_rxc_db(struct tasklet_struct *t);
static const struct ntb_ctx_ops ntb_transport_ops;
static struct ntb_client ntb_transport_client;
static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
@@ -1234,8 +1234,7 @@ static int ntb_transport_init_queue(struct
ntb_transport_ctx *nt,
INIT_LIST_HEAD(&qp->rx_free_q);
INIT_LIST_HEAD(&qp->tx_free_q);
- tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
-(unsigned long)qp);
+ tasklet_setup(&qp->rxc_db_work, ntb_transport_rxc_db);
return 0;
}
@@ -1685,9 +1684,9 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp)
return 0;
}
-static void ntb_transport_rxc_db(unsigned long data)
+static void ntb_transport_rxc_db(struct tasklet_struct *t)
{
- struct ntb_transport_qp *qp = (void *)data;
+ struct ntb_transport_qp *qp = from_tasklet(qp, t, rxc_db_work);
int rc, i;
dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
--
2.17.1
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[PATCH 1/2] memstick: jmb38x: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/memstick/host/jmb38x_ms.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/memstick/host/jmb38x_ms.c
b/drivers/memstick/host/jmb38x_ms.c
index 4a6b866b0291..2bcf5ce113bd 100644
--- a/drivers/memstick/host/jmb38x_ms.c
+++ b/drivers/memstick/host/jmb38x_ms.c
@@ -603,10 +603,10 @@ static void jmb38x_ms_abort(struct timer_list *t)
spin_unlock_irqrestore(&host->lock, flags);
}
-static void jmb38x_ms_req_tasklet(unsigned long data)
+static void jmb38x_ms_req_tasklet(struct tasklet_struct *t)
{
- struct memstick_host *msh = (struct memstick_host *)data;
- struct jmb38x_ms_host *host = memstick_priv(msh);
+ struct jmb38x_ms_host *host = from_tasklet(host, t, notify);
+ struct memstick_host *msh = host->msh;
unsigned long flags;
int rc;
@@ -868,7 +868,7 @@ static struct memstick_host *jmb38x_ms_alloc_host(struct
jmb38x_ms *jm, int cnt)
host->irq = jm->pdev->irq;
host->timeout_jiffies = msecs_to_jiffies(1000);
- tasklet_init(&host->notify, jmb38x_ms_req_tasklet, (unsigned long)msh);
+ tasklet_setup(&host->notify, jmb38x_ms_req_tasklet);
msh->request = jmb38x_ms_submit_req;
msh->set_param = jmb38x_ms_set_param;
--
2.17.1
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[PATCH 1/2] misc: ibmvmc: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/misc/ibmvmc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/ibmvmc.c b/drivers/misc/ibmvmc.c
index 2d778d0f011e..347278c1a5e4 100644
--- a/drivers/misc/ibmvmc.c
+++ b/drivers/misc/ibmvmc.c
@@ -2064,10 +2064,10 @@ static void ibmvmc_handle_crq(struct ibmvmc_crq_msg
*crq,
}
}
-static void ibmvmc_task(unsigned long data)
+static void ibmvmc_task(struct tasklet_struct *t)
{
- struct crq_server_adapter *adapter =
- (struct crq_server_adapter *)data;
+ struct crq_server_adapter *adapter = from_tasklet(adapter, t,
+ work_task);
struct vio_dev *vdev = to_vio_dev(adapter->dev);
struct ibmvmc_crq_msg *crq;
int done = 0;
@@ -2150,7 +2150,7 @@ static int ibmvmc_init_crq_queue(struct
crq_server_adapter *adapter)
queue->cur = 0;
spin_lock_init(&queue->lock);
- tasklet_init(&adapter->work_task, ibmvmc_task, (unsigned long)adapter);
+ tasklet_setup(&adapter->work_task, ibmvmc_task);
if (request_irq(vdev->irq,
ibmvmc_handle_event,
--
2.17.1
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[PATCH] platform: goldfish: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/platform/goldfish/goldfish_pipe.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/platform/goldfish/goldfish_pipe.c
b/drivers/platform/goldfish/goldfish_pipe.c
index 1ab207ec9c94..b9bead07760c 100644
--- a/drivers/platform/goldfish/goldfish_pipe.c
+++ b/drivers/platform/goldfish/goldfish_pipe.c
@@ -577,10 +577,10 @@ static struct goldfish_pipe *signalled_pipes_pop_front(
return pipe;
}
-static void goldfish_interrupt_task(unsigned long dev_addr)
+static void goldfish_interrupt_task(struct tasklet_struct *t)
{
/* Iterate over the signalled pipes and wake them one by one */
- struct goldfish_pipe_dev *dev = (struct goldfish_pipe_dev *)dev_addr;
+ struct goldfish_pipe_dev *dev = from_tasklet(dev, t, irq_tasklet);
struct goldfish_pipe *pipe;
int wakes;
@@ -811,8 +811,7 @@ static int goldfish_pipe_device_init(struct platform_device
*pdev,
{
int err;
- tasklet_init(&dev->irq_tasklet, &goldfish_interrupt_task,
-(unsigned long)dev);
+ tasklet_setup(&dev->irq_tasklet, &goldfish_interrupt_task);
err = devm_request_irq(&pdev->dev, dev->irq,
goldfish_pipe_interrupt,
--
2.17.1
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[PATCH] drivers: vme: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/vme/bridges/vme_fake.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/vme/bridges/vme_fake.c b/drivers/vme/bridges/vme_fake.c
index 6a1bc284f297..38dd5f949cd0 100644
--- a/drivers/vme/bridges/vme_fake.c
+++ b/drivers/vme/bridges/vme_fake.c
@@ -90,13 +90,13 @@ static struct device *vme_root;
/*
* Calling VME bus interrupt callback if provided.
*/
-static void fake_VIRQ_tasklet(unsigned long data)
+static void fake_VIRQ_tasklet(struct tasklet_struct *t)
{
struct vme_bridge *fake_bridge;
struct fake_driver *bridge;
- fake_bridge = (struct vme_bridge *) data;
- bridge = fake_bridge->driver_priv;
+ bridge = from_tasklet(bridge, t, int_tasklet);
+ fake_bridge = bridge->parent;
vme_irq_handler(fake_bridge, bridge->int_level, bridge->int_statid);
}
@@ -1098,8 +1098,7 @@ static int __init fake_init(void)
/* Initialize wait queues & mutual exclusion flags */
mutex_init(&fake_device->vme_int);
mutex_init(&fake_bridge->irq_mtx);
- tasklet_init(&fake_device->int_tasklet, fake_VIRQ_tasklet,
- (unsigned long) fake_bridge);
+ tasklet_setup(&fake_device->int_tasklet, fake_VIRQ_tasklet);
strcpy(fake_bridge->name, driver_name);
--
2.17.1
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[PATCH] drivers: atm: convert tasklets to use new tasklet_setup() API
From: Allen Pais
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
---
drivers/atm/eni.c | 9 +
drivers/atm/fore200e.c | 14 +++---
drivers/atm/he.c| 8
drivers/atm/solos-pci.c | 8
4 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/atm/eni.c b/drivers/atm/eni.c
index 39be444534d0..540edea0ad7a 100644
--- a/drivers/atm/eni.c
+++ b/drivers/atm/eni.c
@@ -1521,10 +1521,11 @@ static irqreturn_t eni_int(int irq,void *dev_id)
}
-static void eni_tasklet(unsigned long data)
+static void eni_tasklet(struct tasklet_struct *t)
{
- struct atm_dev *dev = (struct atm_dev *) data;
- struct eni_dev *eni_dev = ENI_DEV(dev);
+ struct eni_dev *eni_dev = from_tasklet(eni_dev, t, task);
+ struct atm_dev *dev = container_of((void *)eni_dev, typeof(*dev),
+ dev_data);
unsigned long flags;
u32 events;
@@ -1838,7 +1839,7 @@ static int eni_start(struct atm_dev *dev)
eni_dev->vci,eni_dev->rx_dma,eni_dev->tx_dma,
eni_dev->service,buf);
spin_lock_init(&eni_dev->lock);
- tasklet_init(&eni_dev->task,eni_tasklet,(unsigned long) dev);
+ tasklet_setup(&eni_dev->task,eni_tasklet);
eni_dev->events = 0;
/* initialize memory management */
buffer_mem = eni_dev->mem - (buf - eni_dev->ram);
diff --git a/drivers/atm/fore200e.c b/drivers/atm/fore200e.c
index a81bc49c14ac..8c6226b50e4d 100644
--- a/drivers/atm/fore200e.c
+++ b/drivers/atm/fore200e.c
@@ -1180,9 +1180,9 @@ fore200e_interrupt(int irq, void* dev)
#ifdef FORE200E_USE_TASKLET
static void
-fore200e_tx_tasklet(unsigned long data)
+fore200e_tx_tasklet(struct tasklet_struct *t)
{
-struct fore200e* fore200e = (struct fore200e*) data;
+struct fore200e* fore200e = from_tasklet(fore200e, t, tx_tasklet);
unsigned long flags;
DPRINTK(3, "tx tasklet scheduled for device %d\n",
fore200e->atm_dev->number);
@@ -1194,15 +1194,15 @@ fore200e_tx_tasklet(unsigned long data)
static void
-fore200e_rx_tasklet(unsigned long data)
+fore200e_rx_tasklet(struct tasklet_struct *t)
{
-struct fore200e* fore200e = (struct fore200e*) data;
+struct fore200e* fore200e = from_tasklet(fore200e, t, rx_tasklet);
unsigned longflags;
DPRINTK(3, "rx tasklet scheduled for device %d\n",
fore200e->atm_dev->number);
spin_lock_irqsave(&fore200e->q_lock, flags);
-fore200e_rx_irq((struct fore200e*) data);
+fore200e_rx_irq(fore200e);
spin_unlock_irqrestore(&fore200e->q_lock, flags);
}
#endif
@@ -1943,8 +1943,8 @@ static int fore200e_irq_request(struct fore200e *fore200e)
fore200e_irq_itoa(fore200e->irq), fore200e->name);
#ifdef FORE200E_USE_TASKLET
-tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned
long)fore200e);
-tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned
long)fore200e);
+tasklet_setup(&fore200e->tx_tasklet, fore200e_tx_tasklet);
+tasklet_setup(&fore200e->rx_tasklet, fore200e_rx_tasklet);
#endif
fore200e->state = FORE200E_STATE_IRQ;
diff --git a/drivers/atm/he.c b/drivers/atm/he.c
index 8af793f5e811..9c36fea4336f 100644
--- a/drivers/atm/he.c
+++ b/drivers/atm/he.c
@@ -100,7 +100,7 @@ static void he_close(struct atm_vcc *vcc);
static int he_send(struct atm_vcc *vcc, struct sk_buff *skb);
static int he_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
static irqreturn_t he_irq_handler(int irq, void *dev_id);
-static void he_tasklet(unsigned long data);
+static void he_tasklet(struct tasklet_struct *t);
static int he_proc_read(struct atm_dev *dev,loff_t *pos,char *page);
static int he_start(struct atm_dev *dev);
static void he_stop(struct he_dev *dev);
@@ -383,7 +383,7 @@ static int he_init_one(struct pci_dev *pci_dev,
he_dev->atm_dev->dev_data = he_dev;
atm_dev->dev_data = he_dev;
he_dev->number = atm_dev->number;
- tasklet_init(&he_dev->tasklet, he_tasklet, (unsigned long) he_dev);
+ tasklet_setup(&he_dev->tasklet, he_tasklet);
spin_lock_init(&he_dev->global_lock);
if (he_start(atm_dev)) {
@@ -1925,10 +1925,10 @@ he_service_rbpl(struct he_dev *he_dev, int group)
}
static void
-he_tasklet(unsigned long data)
+he_tasklet(struct tasklet_struct *t)
{
unsigned long flags;
- struct he_dev *he_dev = (struct he_dev *) data;
+ struct he_dev *he_dev = from_tasklet(he_dev, t, tasklet);
int group, type;
int updated = 0;
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/so
[PATCH v1 2/2] drm/bridge: add refactored it6505 driver
This adds support for the iTE IT6505. This device can convert DPI signal to DP output. Signed-off-by: Jitao Shi Signed-off-by: Pi-Hsun Shih Signed-off-by: Yilun Lin Signed-off-by: Hermes Wu Signed-off-by: Allen Chen --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/ite-it6505.c | 3278 +++ 3 files changed, 3286 insertions(+) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 43271c2..a9f49c7 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -48,6 +48,13 @@ config DRM_DISPLAY_CONNECTOR on ARM-based platforms. Saying Y here when this driver is not needed will not cause any issue. +config DRM_ITE_IT6505 + tristate "ITE IT6505 DP bridge" + depends on OF + select DRM_KMS_HELPER + help + ITE IT6505 DP bridge chip driver. + config DRM_LVDS_CODEC tristate "Transparent LVDS encoders and decoders support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index d63d4b7..86619c7 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o +obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += megachips-stdp-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c new file mode 100644 index ..0601a35 --- /dev/null +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -0,0 +1,3278 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define REG_IC_VER 0x04 + +#define REG_RESET_CTRL 0x05 +#define VIDEO_RESET BIT(0) +#define AUDIO_RESET BIT(1) +#define ALL_LOGIC_RESET BIT(2) +#define AUX_RESET BIT(3) +#define HDCP_RESET BIT(4) + +#define INT_STATUS_01 0x06 +#define INT_MASK_01 0x09 +#define INT_HPD_CHANGE BIT(0) +#define INT_RECEIVE_HPD_IRQ BIT(1) +#define INT_SCDT_CHANGE BIT(2) +#define INT_HDCP_FAIL BIT(3) +#define INT_HDCP_DONE BIT(4) + +#define INT_STATUS_02 0x07 +#define INT_MASK_02 0x0A +#define INT_AUX_CMD_FAIL BIT(0) +#define INT_HDCP_KSV_CHECK BIT(1) +#define INT_AUDIO_FIFO_ERROR BIT(2) + +#define INT_STATUS_03 0x08 +#define INT_MASK_03 0x0B +#define INT_LINK_TRAIN_FAIL BIT(4) +#define INT_VID_FIFO_ERROR BIT(5) +#define INT_IO_LATCH_FIFO_OVERFLOW BIT(7) + +#define REG_SYSTEM_STS 0x0D +#define INT_STS BIT(0) +#define HPD_STS BIT(1) +#define VIDEO_STB BIT(2) + +#define REG_LINK_TRAIN_STS 0x0E +#define LINK_STATE_CR BIT(2) +#define LINK_STATE_EQ BIT(3) +#define LINK_STATE_NORP BIT(4) + +#define REG_BANK_SEL 0x0F +#define REG_CLK_CTRL0 0x10 +#define M_PCLK_DELAY 0x03 + +#define REG_AUX_OPT 0x11 +#define AUX_AUTO_RST BIT(0) +#define AUX_FIX_FREQ BIT(3) + +#define REG_DATA_CTRL0 0x12 +#define VIDEO_LATCH_EDGE BIT(4) +#define ENABLE_PCLK_COUNTER BIT(7) + +#define REG_PCLK_COUNTER_VALUE 0x13 + +#define REG_501_FIFO_CTRL 0x15 +#define RST_501_FIFO BIT(1) + +#define REG_TRAIN_CTRL0 0x16 +#define FORCE_LBR BIT(0) +#define LANE_COUNT_MASK 0x06 +#define LANE_SWAP BIT(3) +#define SPREAD_AMP_5 BIT(4) +#define FORCE_CR_DONE BIT(5) +#define FORCE_EQ_DONE BIT(6) + +#define REG_TRAIN_CTRL1 0x17 +#define AUTO_TRAIN BIT(0) +#define MANUAL_TRAIN BIT(1) +#define FORCE_RETRAIN BIT(2) + +#define REG_AUX_CTRL 0x23 +#define CLR_EDID_FIFO BIT(0) +#define AUX_USER_MODE BIT(1) +#define AUX_NO_SEGMENT_WR BIT(6) +#define AUX_EN_FIFO_READ BIT(7) + +#define REG_AUX_ADR_0_7 0x24 +#define REG_AUX_ADR_8_15 0x25 +#define REG_AUX_ADR_16_19 0x26 +#define REG_AUX_OUT_DATA0 0x27 + +#define REG_AUX_CMD_REQ 0x2B +#define AUX_BUSY BIT(5) + +#define REG_AUX_DATA_0_7 0x2C +#define REG_AUX_DATA_8_15 0x2D +#define REG_AUX_DATA_16_23 0x2E +#define REG_AUX_DATA_24_31 0x2F + +#define REG_AUX_DATA_FIFO 0x2F + +#define REG_AUX_ERROR_STS 0x9F +#define M_AUX_REQ_FAIL 0x03 + +#define REG_HDCP_CTRL1 0x38 +#define HDCP_CP_ENABLE BIT(0) + +#define REG_HDCP_TRIGGER 0x39 +#define HDCP_TRIGGER_START BIT(0) +#define HDCP_TRIGGER_CPIRQ BIT(1) +#define HDCP_TRIGGER_KSV_DONE BIT(4) +#define HDCP_TRIGGER_KSV_FAIL BIT(5) + +#define REG_HDCP_CTRL2 0x3A +#define HDCP_AN_SEL BIT(0) +#define HDCP_AN
[PATCH v1 0/2] IT6505 cover letter
The IT6505 is a high-performance DisplayPort 1.1a transmitter, fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications. The IT6505 supports color depth of up to 36 bits (12 bits/color) and ensures robust transmission of high-quality uncompressed video content, along with uncompressed and compressed digital audio content. This series refactors previous it6505 driver and contains document bindings, Kconfig to control the function enable or not. allen (2): ite-it6505 change trigger condition WIP: drm/bridge: add it6505 driver .../bindings/display/bridge/ite,it6505.yaml|2 +- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile|1 + drivers/gpu/drm/bridge/ite-it6505.c| 3278 4 files changed, 3287 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/bridge/ite-it6505.c -- 1.9.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
