Re: [DPU PATCH 2/6] drm/msm: remove support for ping pong split topology
On Mon, Apr 16, 2018 at 11:22:17AM -0700, Jeykumar Sankaran wrote:
> Ping pong split topology was meant for low end soc's which
> doesn't have enough layer mixers to support split panels.
> Considering how uncommon the topology is for current chipset's and
> also to simply the driver programming, striping off the support
> for SDM845.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 19 ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 179
> +
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 -
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 110 +
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 33
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 11 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h | 4 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 37 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 -
> 13 files changed, 15 insertions(+), 415 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
> index 1237efc..f7e9f76 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
> @@ -41,8 +41,8 @@
> {DPU_RM_TOPOLOGY_SINGLEPIPE,"dpu_singlepipe"},
> {DPU_RM_TOPOLOGY_DUALPIPE, "dpu_dualpipe"},
> {DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, "dpu_dualpipemerge"},
> - {DPU_RM_TOPOLOGY_PPSPLIT, "dpu_ppsplit"},
> };
> +
> static const struct drm_prop_enum_list e_topology_control[] = {
> {DPU_RM_TOPCTL_RESERVE_LOCK,"reserve_lock"},
> {DPU_RM_TOPCTL_RESERVE_CLEAR, "reserve_clear"},
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index 516458e..8e464fa 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -1914,23 +1914,6 @@ static void _dpu_crtc_setup_mixers(struct drm_crtc
> *crtc)
> mutex_unlock(&dpu_crtc->crtc_lock);
> }
>
> -static void _dpu_crtc_setup_is_ppsplit(struct drm_crtc_state *state)
> -{
> - int i;
> - struct dpu_crtc_state *cstate;
> -
> - cstate = to_dpu_crtc_state(state);
> -
> - cstate->is_ppsplit = false;
> - for (i = 0; i < cstate->num_connectors; i++) {
> - struct drm_connector *conn = cstate->connectors[i];
> -
> - if (dpu_connector_get_topology_name(conn) ==
> - DPU_RM_TOPOLOGY_PPSPLIT)
> - cstate->is_ppsplit = true;
> - }
> -}
> -
> static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
> struct drm_crtc_state *state)
> {
> @@ -1993,7 +1976,6 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc,
>
> if (!dpu_crtc->num_mixers) {
> _dpu_crtc_setup_mixers(crtc);
> - _dpu_crtc_setup_is_ppsplit(crtc->state);
> _dpu_crtc_setup_lm_bounds(crtc, crtc->state);
> }
>
> @@ -2901,7 +2883,6 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
>
> mixer_width = dpu_crtc_get_mixer_width(dpu_crtc, cstate, mode);
>
> - _dpu_crtc_setup_is_ppsplit(state);
> _dpu_crtc_setup_lm_bounds(crtc, state);
>
>/* get plane state for all drm planes associated with crtc state */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 6f12355..32375b1 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -545,7 +545,6 @@ void dpu_encoder_helper_split_config(
> struct dpu_encoder_virt *dpu_enc;
> struct split_pipe_cfg cfg = { 0 };
> struct dpu_hw_mdp *hw_mdptop;
> - enum dpu_rm_topology_name topology;
> struct msm_display_info *disp_info;
>
> if (!phys_enc || !phys_enc->hw_mdptop || !phys_enc->parent) {
> @@ -569,8 +568,6 @@ void dpu_encoder_helper_split_config(
> if (phys_enc->split_role == ENC_ROLE_SOLO) {
> if (hw_mdptop->ops.setup_split_pipe)
> hw_mdptop->ops.setup_split_pipe(hw_mdptop, &cfg);
> - if (hw_mdptop->ops.setup_pp_split)
> - hw_mdptop->ops.setup_pp_split(hw_mdptop, &cfg);
> return;
> }
>
> @@ -582,29 +579,11 @@ void dpu_encoder_helper_split_config(
> phys_enc->ops.needs_single_flush(phys_enc))
> cfg.split_flush_en = true;
>
> - topology = dpu_connector_get_topology_name(phys_enc->connector);
> - if (topology == DPU_RM_TOPOLOGY_PPSPLIT)
> - cfg.pp_split_s
[DPU PATCH 2/6] drm/msm: remove support for ping pong split topology
Ping pong split topology was meant for low end soc's which
doesn't have enough layer mixers to support split panels.
Considering how uncommon the topology is for current chipset's and
also to simply the driver programming, striping off the support
for SDM845.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 19 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 179 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 -
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 110 +
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 33
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 11 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h | 4 -
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 37 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 -
13 files changed, 15 insertions(+), 415 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
index 1237efc..f7e9f76 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c
@@ -41,8 +41,8 @@
{DPU_RM_TOPOLOGY_SINGLEPIPE,"dpu_singlepipe"},
{DPU_RM_TOPOLOGY_DUALPIPE, "dpu_dualpipe"},
{DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, "dpu_dualpipemerge"},
- {DPU_RM_TOPOLOGY_PPSPLIT, "dpu_ppsplit"},
};
+
static const struct drm_prop_enum_list e_topology_control[] = {
{DPU_RM_TOPCTL_RESERVE_LOCK,"reserve_lock"},
{DPU_RM_TOPCTL_RESERVE_CLEAR, "reserve_clear"},
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 516458e..8e464fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1914,23 +1914,6 @@ static void _dpu_crtc_setup_mixers(struct drm_crtc *crtc)
mutex_unlock(&dpu_crtc->crtc_lock);
}
-static void _dpu_crtc_setup_is_ppsplit(struct drm_crtc_state *state)
-{
- int i;
- struct dpu_crtc_state *cstate;
-
- cstate = to_dpu_crtc_state(state);
-
- cstate->is_ppsplit = false;
- for (i = 0; i < cstate->num_connectors; i++) {
- struct drm_connector *conn = cstate->connectors[i];
-
- if (dpu_connector_get_topology_name(conn) ==
- DPU_RM_TOPOLOGY_PPSPLIT)
- cstate->is_ppsplit = true;
- }
-}
-
static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
struct drm_crtc_state *state)
{
@@ -1993,7 +1976,6 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc,
if (!dpu_crtc->num_mixers) {
_dpu_crtc_setup_mixers(crtc);
- _dpu_crtc_setup_is_ppsplit(crtc->state);
_dpu_crtc_setup_lm_bounds(crtc, crtc->state);
}
@@ -2901,7 +2883,6 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
mixer_width = dpu_crtc_get_mixer_width(dpu_crtc, cstate, mode);
- _dpu_crtc_setup_is_ppsplit(state);
_dpu_crtc_setup_lm_bounds(crtc, state);
/* get plane state for all drm planes associated with crtc state */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 6f12355..32375b1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -545,7 +545,6 @@ void dpu_encoder_helper_split_config(
struct dpu_encoder_virt *dpu_enc;
struct split_pipe_cfg cfg = { 0 };
struct dpu_hw_mdp *hw_mdptop;
- enum dpu_rm_topology_name topology;
struct msm_display_info *disp_info;
if (!phys_enc || !phys_enc->hw_mdptop || !phys_enc->parent) {
@@ -569,8 +568,6 @@ void dpu_encoder_helper_split_config(
if (phys_enc->split_role == ENC_ROLE_SOLO) {
if (hw_mdptop->ops.setup_split_pipe)
hw_mdptop->ops.setup_split_pipe(hw_mdptop, &cfg);
- if (hw_mdptop->ops.setup_pp_split)
- hw_mdptop->ops.setup_pp_split(hw_mdptop, &cfg);
return;
}
@@ -582,29 +579,11 @@ void dpu_encoder_helper_split_config(
phys_enc->ops.needs_single_flush(phys_enc))
cfg.split_flush_en = true;
- topology = dpu_connector_get_topology_name(phys_enc->connector);
- if (topology == DPU_RM_TOPOLOGY_PPSPLIT)
- cfg.pp_split_slave = cfg.intf;
- else
- cfg.pp_split_slave = INTF_MAX;
-
if (phys_enc->split_role == ENC_ROLE_MASTER) {
DPU_DEBUG_ENC(dpu_enc, "enable %d\n", cfg.en);
if (hw_mdptop->ops
