Re: [PATCH] drm/amd/display: re-indent dpp401_dscl_program_isharp()

2024-04-28 Thread Aurabindo Pillai 

Patch has been merged to amd-staging-drm-next.

On 4/28/24 12:09 PM, Aurabindo Pillai wrote:

Thanks for the fix!

Reviewed-by: Aurabindo Pillai 

On 4/28/24 8:42 AM, Dan Carpenter wrote:

Smatch complains because some lines are indented more than they should
be.  I went a bit crazy re-indenting this.  ;)

The comments were not useful except as a marker of things which are left
to implement so I deleted most of them except for the TODO.

I introduced a "data" pointer so that I could replace
"scl_data->dscl_prog_data." with just "data->" and shorten the lines a
bit.  It's more readable without the line breaks.

I also tried to align it so you can see what is changing on each line.

Signed-off-by: Dan Carpenter 
---
  .../display/dc/dpp/dcn401/dcn401_dpp_dscl.c   | 93 ++-
  1 file changed, 30 insertions(+), 63 deletions(-)

diff --git 
a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c 
b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

index c20376083441..696ccf96b847 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
@@ -779,75 +779,42 @@ static void dpp401_dscl_program_isharp(struct 
dpp *dpp_base,

  const struct scaler_data *scl_data)
  {
  struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base);
+    const struct dscl_prog_data *data;
  if (memcmp(>scl_data, scl_data, sizeof(*scl_data)) == 0)
  return;
  PERF_TRACE();
  dpp->scl_data = *scl_data;
-    // ISHARP_EN
-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_EN, scl_data->dscl_prog_data.isharp_en);
-    // ISHARP_NOISEDET_EN
-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_NOISEDET_EN, 
scl_data->dscl_prog_data.isharp_noise_det.enable);

-    // ISHARP_NOISEDET_MODE
-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_NOISEDET_MODE, 
scl_data->dscl_prog_data.isharp_noise_det.mode);

-    // ISHARP_NOISEDET_UTHRE
-    REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-    ISHARP_NOISEDET_UTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.uthreshold);

-    // ISHARP_NOISEDET_DTHRE
-    REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-    ISHARP_NOISEDET_DTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.dthreshold);

-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_NOISEDET_MODE, 
scl_data->dscl_prog_data.isharp_noise_det.mode);

-    // ISHARP_NOISEDET_UTHRE
-    REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-    ISHARP_NOISEDET_UTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.uthreshold);

-    // ISHARP_NOISEDET_DTHRE
-    REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-    ISHARP_NOISEDET_DTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.dthreshold);

-    // ISHARP_NOISEDET_PWL_START_IN
-    REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-    ISHARP_NOISEDET_PWL_START_IN, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_start_in);

-    // ISHARP_NOISEDET_PWL_END_IN
-    REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-    ISHARP_NOISEDET_PWL_END_IN, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_end_in);

-    // ISHARP_NOISEDET_PWL_SLOPE
-    REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-    ISHARP_NOISEDET_PWL_SLOPE, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_slope);

-    // ISHARP_LBA_MODE
-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_LBA_MODE, 
scl_data->dscl_prog_data.isharp_lba.mode);

-    // TODO: ISHARP_LBA: IN_SEG, BASE_SEG, SLOPE_SEG
-    // ISHARP_FMT_MODE
-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_FMT_MODE, 
scl_data->dscl_prog_data.isharp_fmt.mode);

-    // ISHARP_FMT_NORM
-    REG_SET(ISHARP_MODE, 0,
-    ISHARP_FMT_NORM, 
scl_data->dscl_prog_data.isharp_fmt.norm);

-    // ISHARP_DELTA_LUT
-    dpp401_dscl_set_isharp_filter(dpp, 
scl_data->dscl_prog_data.isharp_delta);

-    // ISHARP_NLDELTA_SCLIP_EN_P
-    REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-    ISHARP_NLDELTA_SCLIP_EN_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.enable_p);

-    // ISHARP_NLDELTA_SCLIP_PIVOT_P
-    REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-    ISHARP_NLDELTA_SCLIP_PIVOT_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.pivot_p);

-    // ISHARP_NLDELTA_SCLIP_SLOPE_P
-    REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-    ISHARP_NLDELTA_SCLIP_SLOPE_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.slope_p);

-    // ISHARP_NLDELTA_SCLIP_EN_N
-    REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-    ISHARP_NLDELTA_SCLIP_EN_N, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.enable_n);

-    // ISHARP_NLDELTA_SCLIP_PIVOT_N
-    REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-    ISHARP_NLDELTA_SCLIP_PIVOT_N, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.pivot_n);

-    // ISHARP_NLDELTA_SCLIP_SLOPE_N
-    REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   

Re: [PATCH] drm/amd/display: re-indent dpp401_dscl_program_isharp()

2024-04-28 Thread Aurabindo Pillai 

Thanks for the fix!

Reviewed-by: Aurabindo Pillai 

On 4/28/24 8:42 AM, Dan Carpenter wrote:

Smatch complains because some lines are indented more than they should
be.  I went a bit crazy re-indenting this.  ;)

The comments were not useful except as a marker of things which are left
to implement so I deleted most of them except for the TODO.

I introduced a "data" pointer so that I could replace
"scl_data->dscl_prog_data." with just "data->" and shorten the lines a
bit.  It's more readable without the line breaks.

I also tried to align it so you can see what is changing on each line.

Signed-off-by: Dan Carpenter 
---
  .../display/dc/dpp/dcn401/dcn401_dpp_dscl.c   | 93 ++-
  1 file changed, 30 insertions(+), 63 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c 
b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
index c20376083441..696ccf96b847 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
@@ -779,75 +779,42 @@ static void dpp401_dscl_program_isharp(struct dpp 
*dpp_base,
const struct scaler_data *scl_data)
  {
struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base);
+   const struct dscl_prog_data *data;
  
  	if (memcmp(>scl_data, scl_data, sizeof(*scl_data)) == 0)

return;
  
  	PERF_TRACE();

dpp->scl_data = *scl_data;
-   // ISHARP_EN
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_EN, scl_data->dscl_prog_data.isharp_en);
-   // ISHARP_NOISEDET_EN
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_NOISEDET_EN, 
scl_data->dscl_prog_data.isharp_noise_det.enable);
-   // ISHARP_NOISEDET_MODE
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_NOISEDET_MODE, 
scl_data->dscl_prog_data.isharp_noise_det.mode);
-   // ISHARP_NOISEDET_UTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_UTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.uthreshold);
-   // ISHARP_NOISEDET_DTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_DTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.dthreshold);
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_NOISEDET_MODE, 
scl_data->dscl_prog_data.isharp_noise_det.mode);
-   // ISHARP_NOISEDET_UTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_UTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.uthreshold);
-   // ISHARP_NOISEDET_DTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_DTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.dthreshold);
-   // ISHARP_NOISEDET_PWL_START_IN
-   REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-   ISHARP_NOISEDET_PWL_START_IN, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_start_in);
-   // ISHARP_NOISEDET_PWL_END_IN
-   REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-   ISHARP_NOISEDET_PWL_END_IN, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_end_in);
-   // ISHARP_NOISEDET_PWL_SLOPE
-   REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-   ISHARP_NOISEDET_PWL_SLOPE, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_slope);
-   // ISHARP_LBA_MODE
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_LBA_MODE, 
scl_data->dscl_prog_data.isharp_lba.mode);
-   // TODO: ISHARP_LBA: IN_SEG, BASE_SEG, SLOPE_SEG
-   // ISHARP_FMT_MODE
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_FMT_MODE, 
scl_data->dscl_prog_data.isharp_fmt.mode);
-   // ISHARP_FMT_NORM
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_FMT_NORM, 
scl_data->dscl_prog_data.isharp_fmt.norm);
-   // ISHARP_DELTA_LUT
-   dpp401_dscl_set_isharp_filter(dpp, 
scl_data->dscl_prog_data.isharp_delta);
-   // ISHARP_NLDELTA_SCLIP_EN_P
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_EN_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.enable_p);
-   // ISHARP_NLDELTA_SCLIP_PIVOT_P
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_PIVOT_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.pivot_p);
-   // ISHARP_NLDELTA_SCLIP_SLOPE_P
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_SLOPE_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.slope_p);
-   // ISHARP_NLDELTA_SCLIP_EN_N
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-

[PATCH] drm/amd/display: re-indent dpp401_dscl_program_isharp()

2024-04-28 Thread Dan Carpenter 
Smatch complains because some lines are indented more than they should
be.  I went a bit crazy re-indenting this.  ;)

The comments were not useful except as a marker of things which are left
to implement so I deleted most of them except for the TODO.

I introduced a "data" pointer so that I could replace
"scl_data->dscl_prog_data." with just "data->" and shorten the lines a
bit.  It's more readable without the line breaks.

I also tried to align it so you can see what is changing on each line.

Signed-off-by: Dan Carpenter 
---
 .../display/dc/dpp/dcn401/dcn401_dpp_dscl.c   | 93 ++-
 1 file changed, 30 insertions(+), 63 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c 
b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
index c20376083441..696ccf96b847 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
@@ -779,75 +779,42 @@ static void dpp401_dscl_program_isharp(struct dpp 
*dpp_base,
const struct scaler_data *scl_data)
 {
struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base);
+   const struct dscl_prog_data *data;
 
if (memcmp(>scl_data, scl_data, sizeof(*scl_data)) == 0)
return;
 
PERF_TRACE();
dpp->scl_data = *scl_data;
-   // ISHARP_EN
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_EN, scl_data->dscl_prog_data.isharp_en);
-   // ISHARP_NOISEDET_EN
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_NOISEDET_EN, 
scl_data->dscl_prog_data.isharp_noise_det.enable);
-   // ISHARP_NOISEDET_MODE
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_NOISEDET_MODE, 
scl_data->dscl_prog_data.isharp_noise_det.mode);
-   // ISHARP_NOISEDET_UTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_UTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.uthreshold);
-   // ISHARP_NOISEDET_DTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_DTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.dthreshold);
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_NOISEDET_MODE, 
scl_data->dscl_prog_data.isharp_noise_det.mode);
-   // ISHARP_NOISEDET_UTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_UTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.uthreshold);
-   // ISHARP_NOISEDET_DTHRE
-   REG_SET(ISHARP_NOISEDET_THRESHOLD, 0,
-   ISHARP_NOISEDET_DTHRE, 
scl_data->dscl_prog_data.isharp_noise_det.dthreshold);
-   // ISHARP_NOISEDET_PWL_START_IN
-   REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-   ISHARP_NOISEDET_PWL_START_IN, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_start_in);
-   // ISHARP_NOISEDET_PWL_END_IN
-   REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-   ISHARP_NOISEDET_PWL_END_IN, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_end_in);
-   // ISHARP_NOISEDET_PWL_SLOPE
-   REG_SET(ISHARP_NOISE_GAIN_PWL, 0,
-   ISHARP_NOISEDET_PWL_SLOPE, 
scl_data->dscl_prog_data.isharp_noise_det.pwl_slope);
-   // ISHARP_LBA_MODE
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_LBA_MODE, 
scl_data->dscl_prog_data.isharp_lba.mode);
-   // TODO: ISHARP_LBA: IN_SEG, BASE_SEG, SLOPE_SEG
-   // ISHARP_FMT_MODE
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_FMT_MODE, 
scl_data->dscl_prog_data.isharp_fmt.mode);
-   // ISHARP_FMT_NORM
-   REG_SET(ISHARP_MODE, 0,
-   ISHARP_FMT_NORM, 
scl_data->dscl_prog_data.isharp_fmt.norm);
-   // ISHARP_DELTA_LUT
-   dpp401_dscl_set_isharp_filter(dpp, 
scl_data->dscl_prog_data.isharp_delta);
-   // ISHARP_NLDELTA_SCLIP_EN_P
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_EN_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.enable_p);
-   // ISHARP_NLDELTA_SCLIP_PIVOT_P
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_PIVOT_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.pivot_p);
-   // ISHARP_NLDELTA_SCLIP_SLOPE_P
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_SLOPE_P, 
scl_data->dscl_prog_data.isharp_nldelta_sclip.slope_p);
-   // ISHARP_NLDELTA_SCLIP_EN_N
-   REG_SET(ISHARP_NLDELTA_SOFT_CLIP, 0,
-   ISHARP_NLDELTA_SCLIP_EN_N,