Re: [PATCH] drm/i915/display/lspcon: Increase LSPCON mode settle timeout
On Tue, Oct 4, 2022 at 10:38 AM Jani Nikula wrote: > Got any bug report with more info, or any other details to back this up? > This is kind of thin. What's the 800 ms based on? This issue affected several different CometLake-based Chrome OS device designs. The details of the original report are in the Google partner issue tracker (issue # 178169843), but I believe this requires a Google partner account to access: https://partnerissuetracker.corp.google.com/issues/178169843 The summary is that we were seeing these "*ERROR* LSPCON mode hasn't settled" messages in the kernel logs followed by the display not working at all. We increased the timeout to 500ms while investigation continued and this reduced the number of occurrences of this issue: https://chromium.googlesource.com/chromiumos/third_party/kernel/+/7b2899fc1a6f9409e8075b3153baaf02c4d1fc75 The problem continued to occur on about 2% of devices even after increasing the timeout to 500ms. The investigation continued in issue # 188035814, with engineers from Parade and Intel involved. Ultimately, the recommendation from Intel engineers was to increase the timeout further: https://partnerissuetracker.corp.google.com/issues/188035814 The timeout was then increased to 1000ms: https://chromium.googlesource.com/chromiumos/third_party/kernel/+/a16cfc2062e768c8e5ad8fa09b8ca127aa1ead9a I recently ran 100 reboot trials on one device and found that the median time for the LSPCON mode to settle was 440ms and the max was 444ms. But we know from the original reports that even after we set the timeout to 500ms the issue continued to happen on some small percentage of devices. So this is why I picked the larger value of 800ms.
Re: [PATCH] drm/i915/display/lspcon: Increase LSPCON mode settle timeout
On Thu, 15 Sep 2022, Pablo Ceballos wrote: > On some devices the Parade PS175 takes more than 400ms to settle in PCON > mode. Got any bug report with more info, or any other details to back this up? This is kind of thin. What's the 800 ms based on? BR, Jani. > > Signed-off-by: Pablo Ceballos > --- > drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c > b/drivers/gpu/drm/i915/display/intel_lspcon.c > index 15d59de8810e..b4cbade13ee5 100644 > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c > @@ -166,7 +166,7 @@ static enum drm_lspcon_mode lspcon_wait_mode(struct > intel_lspcon *lspcon, > drm_dbg_kms(>drm, "Waiting for LSPCON mode %s to settle\n", > lspcon_mode_name(mode)); > > - wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400); > + wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 800); > if (current_mode != mode) > drm_err(>drm, "LSPCON mode hasn't settled\n"); -- Jani Nikula, Intel Open Source Graphics Center
