Re: [PATCH] drm/v3d: Fix support for register debugging on the RPi 4

2024-01-09 Thread Maira Canal 

On 1/9/24 09:07, Iago Toral wrote:

Thanks Maíra!

Reviewed-by: Iago Toral Quiroga 


Applied to drm-misc/drm-misc-next-fixes!

Best Regards,
- Maíra



El mar, 09-01-2024 a las 08:30 -0300, Maíra Canal escribió:

RPi 4 uses V3D 4.2, which is currently not supported by the register
definition stated at `v3d_core_reg_defs`. We should be able to
support
V3D 4.2, therefore, change the maximum version of the register
definition to 42, not 41.

Fixes: 0ad5bc1ce463 ("drm/v3d: fix up register addresses for V3D
7.x")
Signed-off-by: Maíra Canal 
---
  drivers/gpu/drm/v3d/v3d_debugfs.c | 20 ++--
  1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c
b/drivers/gpu/drm/v3d/v3d_debugfs.c
index f843a50d5dce..94eafcecc65b 100644
--- a/drivers/gpu/drm/v3d/v3d_debugfs.c
+++ b/drivers/gpu/drm/v3d/v3d_debugfs.c
@@ -62,9 +62,9 @@ static const struct v3d_reg_def v3d_core_reg_defs[]
= {
    REGDEF(33, 71, V3D_PTB_BPCA),
    REGDEF(33, 71, V3D_PTB_BPCS),

-   REGDEF(33, 41, V3D_GMP_STATUS(33)),
-   REGDEF(33, 41, V3D_GMP_CFG(33)),
-   REGDEF(33, 41, V3D_GMP_VIO_ADDR(33)),
+   REGDEF(33, 42, V3D_GMP_STATUS(33)),
+   REGDEF(33, 42, V3D_GMP_CFG(33)),
+   REGDEF(33, 42, V3D_GMP_VIO_ADDR(33)),

    REGDEF(33, 71, V3D_ERR_FDBGO),
    REGDEF(33, 71, V3D_ERR_FDBGB),
@@ -74,13 +74,13 @@ static const struct v3d_reg_def
v3d_core_reg_defs[] = {

  static const struct v3d_reg_def v3d_csd_reg_defs[] = {
    REGDEF(41, 71, V3D_CSD_STATUS),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG0(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG1(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG2(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG3(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG4(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG5(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG6(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG0(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG1(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG2(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG3(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG4(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG5(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG6(41)),
    REGDEF(71, 71, V3D_CSD_CURRENT_CFG0(71)),
    REGDEF(71, 71, V3D_CSD_CURRENT_CFG1(71)),
    REGDEF(71, 71, V3D_CSD_CURRENT_CFG2(71)),
--
2.43.0

Re: [PATCH] drm/v3d: Fix support for register debugging on the RPi 4

2024-01-09 Thread Iago Toral 
Thanks Maíra!

Reviewed-by: Iago Toral Quiroga 

El mar, 09-01-2024 a las 08:30 -0300, Maíra Canal escribió:
> RPi 4 uses V3D 4.2, which is currently not supported by the register
> definition stated at `v3d_core_reg_defs`. We should be able to
> support
> V3D 4.2, therefore, change the maximum version of the register
> definition to 42, not 41.
> 
> Fixes: 0ad5bc1ce463 ("drm/v3d: fix up register addresses for V3D
> 7.x")
> Signed-off-by: Maíra Canal 
> ---
>  drivers/gpu/drm/v3d/v3d_debugfs.c | 20 ++--
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c
> b/drivers/gpu/drm/v3d/v3d_debugfs.c
> index f843a50d5dce..94eafcecc65b 100644
> --- a/drivers/gpu/drm/v3d/v3d_debugfs.c
> +++ b/drivers/gpu/drm/v3d/v3d_debugfs.c
> @@ -62,9 +62,9 @@ static const struct v3d_reg_def v3d_core_reg_defs[]
> = {
>   REGDEF(33, 71, V3D_PTB_BPCA),
>   REGDEF(33, 71, V3D_PTB_BPCS),
> 
> - REGDEF(33, 41, V3D_GMP_STATUS(33)),
> - REGDEF(33, 41, V3D_GMP_CFG(33)),
> - REGDEF(33, 41, V3D_GMP_VIO_ADDR(33)),
> + REGDEF(33, 42, V3D_GMP_STATUS(33)),
> + REGDEF(33, 42, V3D_GMP_CFG(33)),
> + REGDEF(33, 42, V3D_GMP_VIO_ADDR(33)),
> 
>   REGDEF(33, 71, V3D_ERR_FDBGO),
>   REGDEF(33, 71, V3D_ERR_FDBGB),
> @@ -74,13 +74,13 @@ static const struct v3d_reg_def
> v3d_core_reg_defs[] = {
> 
>  static const struct v3d_reg_def v3d_csd_reg_defs[] = {
>   REGDEF(41, 71, V3D_CSD_STATUS),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG0(41)),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG1(41)),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG2(41)),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG3(41)),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG4(41)),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG5(41)),
> - REGDEF(41, 41, V3D_CSD_CURRENT_CFG6(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG0(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG1(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG2(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG3(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG4(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG5(41)),
> + REGDEF(41, 42, V3D_CSD_CURRENT_CFG6(41)),
>   REGDEF(71, 71, V3D_CSD_CURRENT_CFG0(71)),
>   REGDEF(71, 71, V3D_CSD_CURRENT_CFG1(71)),
>   REGDEF(71, 71, V3D_CSD_CURRENT_CFG2(71)),
> --
> 2.43.0
> 
>

[PATCH] drm/v3d: Fix support for register debugging on the RPi 4

2024-01-09 Thread Maíra Canal 
RPi 4 uses V3D 4.2, which is currently not supported by the register
definition stated at `v3d_core_reg_defs`. We should be able to support
V3D 4.2, therefore, change the maximum version of the register
definition to 42, not 41.

Fixes: 0ad5bc1ce463 ("drm/v3d: fix up register addresses for V3D 7.x")
Signed-off-by: Maíra Canal 
---
 drivers/gpu/drm/v3d/v3d_debugfs.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c 
b/drivers/gpu/drm/v3d/v3d_debugfs.c
index f843a50d5dce..94eafcecc65b 100644
--- a/drivers/gpu/drm/v3d/v3d_debugfs.c
+++ b/drivers/gpu/drm/v3d/v3d_debugfs.c
@@ -62,9 +62,9 @@ static const struct v3d_reg_def v3d_core_reg_defs[] = {
REGDEF(33, 71, V3D_PTB_BPCA),
REGDEF(33, 71, V3D_PTB_BPCS),

-   REGDEF(33, 41, V3D_GMP_STATUS(33)),
-   REGDEF(33, 41, V3D_GMP_CFG(33)),
-   REGDEF(33, 41, V3D_GMP_VIO_ADDR(33)),
+   REGDEF(33, 42, V3D_GMP_STATUS(33)),
+   REGDEF(33, 42, V3D_GMP_CFG(33)),
+   REGDEF(33, 42, V3D_GMP_VIO_ADDR(33)),

REGDEF(33, 71, V3D_ERR_FDBGO),
REGDEF(33, 71, V3D_ERR_FDBGB),
@@ -74,13 +74,13 @@ static const struct v3d_reg_def v3d_core_reg_defs[] = {

 static const struct v3d_reg_def v3d_csd_reg_defs[] = {
REGDEF(41, 71, V3D_CSD_STATUS),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG0(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG1(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG2(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG3(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG4(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG5(41)),
-   REGDEF(41, 41, V3D_CSD_CURRENT_CFG6(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG0(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG1(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG2(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG3(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG4(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG5(41)),
+   REGDEF(41, 42, V3D_CSD_CURRENT_CFG6(41)),
REGDEF(71, 71, V3D_CSD_CURRENT_CFG0(71)),
REGDEF(71, 71, V3D_CSD_CURRENT_CFG1(71)),
REGDEF(71, 71, V3D_CSD_CURRENT_CFG2(71)),
--
2.43.0