[PATCH 04/72] ARM: i.MX6: use pll2_pfd0_352m as clock root of ipu_di
Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam: > AS pll5_video_div has already been used as clock root for ldb_di, > so use pll2_pfd0_352m as clock root of ipu_di for HDMI. > > Signed-off-by: Jiada Wang > Signed-off-by: Steve Longerbeam What about devices that don't use LVDS? It would be nice to let them use PLL5 for HDMI. > --- > arch/arm/mach-imx/clk-imx6q.c |8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c > index 4e79da7..86b58fc 100644 > --- a/arch/arm/mach-imx/clk-imx6q.c > +++ b/arch/arm/mach-imx/clk-imx6q.c > @@ -483,10 +483,10 @@ static void __init imx6q_clocks_init(struct device_node > *ccm_node) > clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], > clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); > } > > - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], > clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); > - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], > clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); > - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], > clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); > - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], > clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); > + clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], > clk[IMX6QDL_CLK_PLL2_PFD0_352M]); > + clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], > clk[IMX6QDL_CLK_PLL2_PFD0_352M]); > + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], > clk[IMX6QDL_CLK_PLL2_PFD0_352M]); > + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], > clk[IMX6QDL_CLK_PLL2_PFD0_352M]); > clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], > clk[IMX6QDL_CLK_IPU1_DI0_PRE]); > clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], > clk[IMX6QDL_CLK_IPU1_DI1_PRE]); > clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], > clk[IMX6QDL_CLK_IPU2_DI0_PRE]); regards Philipp
[PATCH 04/72] ARM: i.MX6: use pll2_pfd0_352m as clock root of ipu_di
On 11/03/2014 04:30 AM, Philipp Zabel wrote: > Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam: >> AS pll5_video_div has already been used as clock root for ldb_di, >> so use pll2_pfd0_352m as clock root of ipu_di for HDMI. >> >> Signed-off-by: Jiada Wang >> Signed-off-by: Steve Longerbeam > What about devices that don't use LVDS? It would be nice to let them use > PLL5 for HDMI. Yeah, I agree. Maybe the right approach is to move root PLL selection into the device tree hdmi and lvds nodes. Steve >> --- >> arch/arm/mach-imx/clk-imx6q.c |8 >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c >> index 4e79da7..86b58fc 100644 >> --- a/arch/arm/mach-imx/clk-imx6q.c >> +++ b/arch/arm/mach-imx/clk-imx6q.c >> @@ -483,10 +483,10 @@ static void __init imx6q_clocks_init(struct >> device_node *ccm_node) >> clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], >> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); >> } >> >> -clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], >> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); >> -clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], >> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); >> -clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], >> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); >> -clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], >> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); >> +clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], >> clk[IMX6QDL_CLK_PLL2_PFD0_352M]); >> +clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], >> clk[IMX6QDL_CLK_PLL2_PFD0_352M]); >> +clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], >> clk[IMX6QDL_CLK_PLL2_PFD0_352M]); >> +clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], >> clk[IMX6QDL_CLK_PLL2_PFD0_352M]); >> clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], >> clk[IMX6QDL_CLK_IPU1_DI0_PRE]); >> clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], >> clk[IMX6QDL_CLK_IPU1_DI1_PRE]); >> clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], >> clk[IMX6QDL_CLK_IPU2_DI0_PRE]); > regards > Philipp > > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel -- Steve Longerbeam | Senior Embedded Engineer, ESD Services Mentor Embedded(tm) | 46871 Bayside Parkway, Fremont, CA 94538 P 510.354.5838 | M 408.410.2735
[PATCH 04/72] ARM: i.MX6: use pll2_pfd0_352m as clock root of ipu_di
AS pll5_video_div has already been used as clock root for ldb_di, so use pll2_pfd0_352m as clock root of ipu_di for HDMI. Signed-off-by: Jiada Wang Signed-off-by: Steve Longerbeam --- arch/arm/mach-imx/clk-imx6q.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 4e79da7..86b58fc 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -483,10 +483,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); } - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL2_PFD0_352M]); + clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL2_PFD0_352M]); + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL2_PFD0_352M]); + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL2_PFD0_352M]); clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], clk[IMX6QDL_CLK_IPU1_DI0_PRE]); clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], clk[IMX6QDL_CLK_IPU1_DI1_PRE]); clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]); -- 1.7.9.5
