[PATCH 05/11] drm/radeon: fence PT updates manually v2

2014-11-19 Thread Christian König 
From: Christian König 

This allows us to add the real execution fence as shared.

v2: fix typo

Signed-off-by: Christian König 
---
 drivers/gpu/drm/radeon/radeon_object.c | 19 ++
 drivers/gpu/drm/radeon/radeon_object.h |  2 ++
 drivers/gpu/drm/radeon/radeon_vm.c | 65 +-
 3 files changed, 62 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c 
b/drivers/gpu/drm/radeon/radeon_object.c
index 33e6c7a..686e450 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -818,3 +818,22 @@ int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, 
bool no_wait)
ttm_bo_unreserve(>tbo);
return r;
 }
+
+/**
+ * radeon_bo_fence - add fence to buffer object
+ *
+ * @bo: buffer object in question
+ * @fence: fence to add
+ * @shared: true if fence should be added shared
+ *
+ */
+void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
+ bool shared)
+{
+   struct reservation_object *resv = bo->tbo.resv;
+
+   if (shared)
+   reservation_object_add_shared_fence(resv, >base);
+   else
+   reservation_object_add_excl_fence(resv, >base);
+}
diff --git a/drivers/gpu/drm/radeon/radeon_object.h 
b/drivers/gpu/drm/radeon/radeon_object.h
index 1b8ec79..3b0b377 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -155,6 +155,8 @@ extern void radeon_bo_move_notify(struct ttm_buffer_object 
*bo,
  struct ttm_mem_reg *new_mem);
 extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
+extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
+   bool shared);

 /*
  * sub allocation
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c 
b/drivers/gpu/drm/radeon/radeon_vm.c
index 20ef826..4ca2779 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -143,7 +143,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
radeon_device *rdev,
list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
list[0].tv.bo = >page_directory->tbo;
-   list[0].tv.shared = false;
+   list[0].tv.shared = true;
list[0].tiling_flags = 0;
list[0].handle = 0;
list_add([0].tv.head, head);
@@ -157,7 +157,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
radeon_device *rdev,
list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
list[idx].tv.bo = [idx].robj->tbo;
-   list[idx].tv.shared = false;
+   list[idx].tv.shared = true;
list[idx].tiling_flags = 0;
list[idx].handle = 0;
list_add([idx++].tv.head, head);
@@ -388,35 +388,25 @@ static void radeon_vm_set_pages(struct radeon_device 
*rdev,
 static int radeon_vm_clear_bo(struct radeon_device *rdev,
  struct radeon_bo *bo)
 {
-struct ttm_validate_buffer tv;
-struct ww_acquire_ctx ticket;
-struct list_head head;
struct radeon_ib ib;
unsigned entries;
uint64_t addr;
int r;

-memset(, 0, sizeof(tv));
-tv.bo = >tbo;
-   tv.shared = false;
-
-INIT_LIST_HEAD();
-list_add(, );
-
-r = ttm_eu_reserve_buffers(, , true);
-if (r)
+   r = radeon_bo_reserve(bo, false);
+   if (r)
return r;

-r = ttm_bo_validate(>tbo, >placement, true, false);
-if (r)
-goto error;
+   r = ttm_bo_validate(>tbo, >placement, true, false);
+   if (r)
+   goto error_unreserve;

addr = radeon_bo_gpu_offset(bo);
entries = radeon_bo_size(bo) / 8;

r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, , NULL, 256);
if (r)
-goto error;
+   goto error_unreserve;

ib.length_dw = 0;

@@ -426,15 +416,15 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev,

r = radeon_ib_schedule(rdev, , NULL, false);
if (r)
-goto error;
+   goto error_free;

-   ttm_eu_fence_buffer_objects(, , >base);
-   radeon_ib_free(rdev, );
+   radeon_bo_fence(bo, ib.fence, false);

-   return 0;
+error_free:
+   radeon_ib_free(rdev, );

-error:
-   ttm_eu_backoff_reservation(, );
+error_unreserve:
+   radeon_bo_unreserve(bo);
return r;
 }

@@ -707,6 +697,7 @@ int radeon_vm_update_page_directory(struct radeon_device 
*rdev,
radeon_ib_free(rdev, );
return r;
}
+   radeon_bo_fence(pd, ib.fence, false);

[PATCH 05/11] drm/radeon: fence PT updates manually v2

2014-10-13 Thread Christian König 
From: Christian K?nig 

This allows us to add the real execution fence as shared.

v2: fix typo

Signed-off-by: Christian K?nig 
---
 drivers/gpu/drm/radeon/radeon_object.c | 19 ++
 drivers/gpu/drm/radeon/radeon_object.h |  2 ++
 drivers/gpu/drm/radeon/radeon_vm.c | 65 +-
 3 files changed, 62 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c 
b/drivers/gpu/drm/radeon/radeon_object.c
index 99a960a..04980d8 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -792,3 +792,22 @@ int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, 
bool no_wait)
ttm_bo_unreserve(>tbo);
return r;
 }
+
+/**
+ * radeon_bo_fence - add fence to buffer object
+ *
+ * @bo: buffer object in question
+ * @fence: fence to add
+ * @shared: true if fence should be added shared
+ *
+ */
+void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
+ bool shared)
+{
+   struct reservation_object *resv = bo->tbo.resv;
+
+   if (shared)
+   reservation_object_add_shared_fence(resv, >base);
+   else
+   reservation_object_add_excl_fence(resv, >base);
+}
diff --git a/drivers/gpu/drm/radeon/radeon_object.h 
b/drivers/gpu/drm/radeon/radeon_object.h
index 1b8ec79..3b0b377 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -155,6 +155,8 @@ extern void radeon_bo_move_notify(struct ttm_buffer_object 
*bo,
  struct ttm_mem_reg *new_mem);
 extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
+extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
+   bool shared);

 /*
  * sub allocation
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c 
b/drivers/gpu/drm/radeon/radeon_vm.c
index bf4d41db..26986be 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -143,7 +143,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
radeon_device *rdev,
list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
list[0].tv.bo = >page_directory->tbo;
-   list[0].tv.shared = false;
+   list[0].tv.shared = true;
list[0].tiling_flags = 0;
list[0].handle = 0;
list_add([0].tv.head, head);
@@ -157,7 +157,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
radeon_device *rdev,
list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
list[idx].tv.bo = [idx].robj->tbo;
-   list[idx].tv.shared = false;
+   list[idx].tv.shared = true;
list[idx].tiling_flags = 0;
list[idx].handle = 0;
list_add([idx++].tv.head, head);
@@ -388,35 +388,25 @@ static void radeon_vm_set_pages(struct radeon_device 
*rdev,
 static int radeon_vm_clear_bo(struct radeon_device *rdev,
  struct radeon_bo *bo)
 {
-struct ttm_validate_buffer tv;
-struct ww_acquire_ctx ticket;
-struct list_head head;
struct radeon_ib ib;
unsigned entries;
uint64_t addr;
int r;

-memset(, 0, sizeof(tv));
-tv.bo = >tbo;
-   tv.shared = false;
-
-INIT_LIST_HEAD();
-list_add(, );
-
-r = ttm_eu_reserve_buffers(, , true);
-if (r)
+   r = radeon_bo_reserve(bo, false);
+   if (r)
return r;

-r = ttm_bo_validate(>tbo, >placement, true, false);
-if (r)
-goto error;
+   r = ttm_bo_validate(>tbo, >placement, true, false);
+   if (r)
+   goto error_unreserve;

addr = radeon_bo_gpu_offset(bo);
entries = radeon_bo_size(bo) / 8;

r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, , NULL, 256);
if (r)
-goto error;
+   goto error_unreserve;

ib.length_dw = 0;

@@ -426,15 +416,15 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev,

r = radeon_ib_schedule(rdev, , NULL, false);
if (r)
-goto error;
+   goto error_free;

-   ttm_eu_fence_buffer_objects(, , >base);
-   radeon_ib_free(rdev, );
+   radeon_bo_fence(bo, ib.fence, false);

-   return 0;
+error_free:
+   radeon_ib_free(rdev, );

-error:
-   ttm_eu_backoff_reservation(, );
+error_unreserve:
+   radeon_bo_unreserve(bo);
return r;
 }

@@ -707,6 +697,7 @@ int radeon_vm_update_page_directory(struct radeon_device 
*rdev,
radeon_ib_free(rdev, );
return r;
}
+   radeon_bo_fence(pd, ib.fence, false);

[PATCH 05/11] drm/radeon: fence PT updates manually

2014-09-17 Thread Alex Deucher 
On Fri, Sep 12, 2014 at 7:52 AM, Christian K?nig
 wrote:
> From: Christian K?nig 
>
> This allows us to add the real execution fence as shared.
>
> Signed-off-by: Christian K?nig 

Minor typo noted below.

> ---
>  drivers/gpu/drm/radeon/radeon_object.c | 19 ++
>  drivers/gpu/drm/radeon/radeon_object.h |  2 ++
>  drivers/gpu/drm/radeon/radeon_vm.c | 65 
> +-
>  3 files changed, 62 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_object.c 
> b/drivers/gpu/drm/radeon/radeon_object.c
> index 8abee5f..8714baf 100644
> --- a/drivers/gpu/drm/radeon/radeon_object.c
> +++ b/drivers/gpu/drm/radeon/radeon_object.c
> @@ -790,3 +790,22 @@ int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, 
> bool no_wait)
> ttm_bo_unreserve(>tbo);
> return r;
>  }
> +
> +/**
> + * radeon_bo_fence - add fence to buffer object
> + *
> + * @bo: buffer object in question
> + * @fence: fence to add
> + * @shared: true if fence should be added shared
> + *
> + */
> +void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
> + bool shared)
> +{
> +   struct reservation_object *resv = bo->tbo.resv;
> +
> +   if (shared)
> +   reservation_object_add_shared_fence(resv, >base);
> +   else
> +   reservation_object_add_excl_fence(resv, >base);
> +}
> diff --git a/drivers/gpu/drm/radeon/radeon_object.h 
> b/drivers/gpu/drm/radeon/radeon_object.h
> index 98a47fd..ec80b28 100644
> --- a/drivers/gpu/drm/radeon/radeon_object.h
> +++ b/drivers/gpu/drm/radeon/radeon_object.h
> @@ -154,6 +154,8 @@ extern void radeon_bo_move_notify(struct 
> ttm_buffer_object *bo,
>   struct ttm_mem_reg *new_mem);
>  extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
>  extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
> +extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
> +   bool shared);
>
>  /*
>   * sub allocation
> diff --git a/drivers/gpu/drm/radeon/radeon_vm.c 
> b/drivers/gpu/drm/radeon/radeon_vm.c
> index 411146a..84b2735 100644
> --- a/drivers/gpu/drm/radeon/radeon_vm.c
> +++ b/drivers/gpu/drm/radeon/radeon_vm.c
> @@ -143,7 +143,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
> radeon_device *rdev,
> list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
> list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
> list[0].tv.bo = >page_directory->tbo;
> -   list[0].tv.shared = false;
> +   list[0].tv.shared = true;
> list[0].tiling_flags = 0;
> list[0].handle = 0;
> list_add([0].tv.head, head);
> @@ -157,7 +157,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
> radeon_device *rdev,
> list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
> list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
> list[idx].tv.bo = [idx].robj->tbo;
> -   list[idx].tv.shared = false;
> +   list[idx].tv.shared = true;
> list[idx].tiling_flags = 0;
> list[idx].handle = 0;
> list_add([idx++].tv.head, head);
> @@ -388,35 +388,25 @@ static void radeon_vm_set_pages(struct radeon_device 
> *rdev,
>  static int radeon_vm_clear_bo(struct radeon_device *rdev,
>   struct radeon_bo *bo)
>  {
> -struct ttm_validate_buffer tv;
> -struct ww_acquire_ctx ticket;
> -struct list_head head;
> struct radeon_ib ib;
> unsigned entries;
> uint64_t addr;
> int r;
>
> -memset(, 0, sizeof(tv));
> -tv.bo = >tbo;
> -   tv.shared = false;
> -
> -INIT_LIST_HEAD();
> -list_add(, );
> -
> -r = ttm_eu_reserve_buffers(, , true);
> -if (r)
> +   r = radeon_bo_reserve(bo, false);
> +   if (r)
> return r;
>
> -r = ttm_bo_validate(>tbo, >placement, true, false);
> -if (r)
> -goto error;
> +   r = ttm_bo_validate(>tbo, >placement, true, false);
> +   if (r)
> +   goto error_unreserve;
>
> addr = radeon_bo_gpu_offset(bo);
> entries = radeon_bo_size(bo) / 8;
>
> r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, , NULL, 256);
> if (r)
> -goto error;
> +   goto error_unreserve;
>
> ib.length_dw = 0;
>
> @@ -426,15 +416,15 @@ static int radeon_vm_clear_bo(struct radeon_device 
> *rdev,
>
> r = radeon_ib_schedule(rdev, , NULL, false);
> if (r)
> -goto error;
> +   goto error_free;
>
> -   ttm_eu_fence_buffer_objects(, , >base);
> -   radeon_ib_free(rdev, );
> +   radeon_bo_fence(bo, ib.fence, false);
>
> -   return 0;
> +error_free:
> +   radeon_ib_free(rdev, );
>
> -error:
> -   ttm_eu_backoff_reservation(, );
> +error_unreserve:
> +

[PATCH 05/11] drm/radeon: fence PT updates manually

2014-09-12 Thread Christian König 
From: Christian K?nig 

This allows us to add the real execution fence as shared.

Signed-off-by: Christian K?nig 
---
 drivers/gpu/drm/radeon/radeon_object.c | 19 ++
 drivers/gpu/drm/radeon/radeon_object.h |  2 ++
 drivers/gpu/drm/radeon/radeon_vm.c | 65 +-
 3 files changed, 62 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c 
b/drivers/gpu/drm/radeon/radeon_object.c
index 8abee5f..8714baf 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -790,3 +790,22 @@ int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, 
bool no_wait)
ttm_bo_unreserve(>tbo);
return r;
 }
+
+/**
+ * radeon_bo_fence - add fence to buffer object
+ *
+ * @bo: buffer object in question
+ * @fence: fence to add
+ * @shared: true if fence should be added shared
+ *
+ */
+void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
+ bool shared)
+{
+   struct reservation_object *resv = bo->tbo.resv;
+
+   if (shared)
+   reservation_object_add_shared_fence(resv, >base);
+   else
+   reservation_object_add_excl_fence(resv, >base);
+}
diff --git a/drivers/gpu/drm/radeon/radeon_object.h 
b/drivers/gpu/drm/radeon/radeon_object.h
index 98a47fd..ec80b28 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -154,6 +154,8 @@ extern void radeon_bo_move_notify(struct ttm_buffer_object 
*bo,
  struct ttm_mem_reg *new_mem);
 extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
+extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
+   bool shared);

 /*
  * sub allocation
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c 
b/drivers/gpu/drm/radeon/radeon_vm.c
index 411146a..84b2735 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -143,7 +143,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
radeon_device *rdev,
list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
list[0].tv.bo = >page_directory->tbo;
-   list[0].tv.shared = false;
+   list[0].tv.shared = true;
list[0].tiling_flags = 0;
list[0].handle = 0;
list_add([0].tv.head, head);
@@ -157,7 +157,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct 
radeon_device *rdev,
list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
list[idx].tv.bo = [idx].robj->tbo;
-   list[idx].tv.shared = false;
+   list[idx].tv.shared = true;
list[idx].tiling_flags = 0;
list[idx].handle = 0;
list_add([idx++].tv.head, head);
@@ -388,35 +388,25 @@ static void radeon_vm_set_pages(struct radeon_device 
*rdev,
 static int radeon_vm_clear_bo(struct radeon_device *rdev,
  struct radeon_bo *bo)
 {
-struct ttm_validate_buffer tv;
-struct ww_acquire_ctx ticket;
-struct list_head head;
struct radeon_ib ib;
unsigned entries;
uint64_t addr;
int r;

-memset(, 0, sizeof(tv));
-tv.bo = >tbo;
-   tv.shared = false;
-
-INIT_LIST_HEAD();
-list_add(, );
-
-r = ttm_eu_reserve_buffers(, , true);
-if (r)
+   r = radeon_bo_reserve(bo, false);
+   if (r)
return r;

-r = ttm_bo_validate(>tbo, >placement, true, false);
-if (r)
-goto error;
+   r = ttm_bo_validate(>tbo, >placement, true, false);
+   if (r)
+   goto error_unreserve;

addr = radeon_bo_gpu_offset(bo);
entries = radeon_bo_size(bo) / 8;

r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, , NULL, 256);
if (r)
-goto error;
+   goto error_unreserve;

ib.length_dw = 0;

@@ -426,15 +416,15 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev,

r = radeon_ib_schedule(rdev, , NULL, false);
if (r)
-goto error;
+   goto error_free;

-   ttm_eu_fence_buffer_objects(, , >base);
-   radeon_ib_free(rdev, );
+   radeon_bo_fence(bo, ib.fence, false);

-   return 0;
+error_free:
+   radeon_ib_free(rdev, );

-error:
-   ttm_eu_backoff_reservation(, );
+error_unreserve:
+   radeon_bo_unreserve(bo);
return r;
 }

@@ -706,6 +696,7 @@ int radeon_vm_update_page_directory(struct radeon_device 
*rdev,
radeon_ib_free(rdev, );
return r;
}
+   radeon_bo_fence(pd, ib.fence, false);
radeon_fence_unref(>fence);