[PATCH 057/165] drm/radeon: add radeon_asic struct for CIK (v11)

2013-06-26 Thread alexdeuc...@gmail.com 
From: Alex Deucher 

v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_asic.c |  287 ++
 drivers/gpu/drm/radeon/radeon_asic.h |   47 ++
 2 files changed, 334 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c 
b/drivers/gpu/drm/radeon/radeon_asic.c
index 717b537..d60adb3 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1923,6 +1923,280 @@ static struct radeon_asic si_asic = {
},
 };

+static struct radeon_asic ci_asic = {
+   .init = _init,
+   .fini = _fini,
+   .suspend = _suspend,
+   .resume = _resume,
+   .asic_reset = _asic_reset,
+   .vga_set_state = _vga_set_state,
+   .ioctl_wait_idle = NULL,
+   .gui_idle = _gui_idle,
+   .mc_wait_for_idle = _mc_wait_for_idle,
+   .get_xclk = _get_xclk,
+   .get_gpu_clock_counter = _get_gpu_clock_counter,
+   .gart = {
+   .tlb_flush = _pcie_gart_tlb_flush,
+   .set_page = _gart_set_page,
+   },
+   .vm = {
+   .init = _vm_init,
+   .fini = _vm_fini,
+   .pt_ring_index = R600_RING_TYPE_DMA_INDEX,
+   .set_page = _vm_set_page,
+   },
+   .ring = {
+   [RADEON_RING_TYPE_GFX_INDEX] = {
+   .ib_execute = _ring_ib_execute,
+   .ib_parse = _ib_parse,
+   .emit_fence = _fence_gfx_ring_emit,
+   .emit_semaphore = _semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = _ring_test,
+   .ib_test = _ib_test,
+   .is_lockup = _gfx_is_lockup,
+   .vm_flush = _vm_flush,
+   },
+   [CAYMAN_RING_TYPE_CP1_INDEX] = {
+   .ib_execute = _ring_ib_execute,
+   .ib_parse = _ib_parse,
+   .emit_fence = _fence_compute_ring_emit,
+   .emit_semaphore = _semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = _ring_test,
+   .ib_test = _ib_test,
+   .is_lockup = _gfx_is_lockup,
+   .vm_flush = _vm_flush,
+   },
+   [CAYMAN_RING_TYPE_CP2_INDEX] = {
+   .ib_execute = _ring_ib_execute,
+   .ib_parse = _ib_parse,
+   .emit_fence = _fence_compute_ring_emit,
+   .emit_semaphore = _semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = _ring_test,
+   .ib_test = _ib_test,
+   .is_lockup = _gfx_is_lockup,
+   .vm_flush = _vm_flush,
+   },
+   [R600_RING_TYPE_DMA_INDEX] = {
+   .ib_execute = _sdma_ring_ib_execute,
+   .ib_parse = _ib_parse,
+   .emit_fence = _sdma_fence_ring_emit,
+   .emit_semaphore = _sdma_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = _sdma_ring_test,
+   .ib_test = _sdma_ib_test,
+   .is_lockup = _sdma_is_lockup,
+   .vm_flush = _dma_vm_flush,
+   },
+   [CAYMAN_RING_TYPE_DMA1_INDEX] = {
+   .ib_execute = _sdma_ring_ib_execute,
+   .ib_parse = _ib_parse,
+   .emit_fence = _sdma_fence_ring_emit,
+   .emit_semaphore = _sdma_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = _sdma_ring_test,
+   .ib_test = _sdma_ib_test,
+   .is_lockup = _sdma_is_lockup,
+   .vm_flush = _dma_vm_flush,
+   },
+   [R600_RING_TYPE_UVD_INDEX] = {
+   .ib_execute = _uvd_ib_execute,
+   .emit_fence = _uvd_fence_emit,
+   .emit_semaphore = _uvd_semaphore_emit,
+   .cs_parse = _uvd_cs_parse,
+   .ring_test = _uvd_ring_test,
+   .ib_test = _uvd_ib_test,
+   .is_lockup = _ring_test_lockup,
+   }
+   },
+   .irq = {
+   .set = _irq_set,
+   .process = _irq_process,
+   },
+   .display = {
+   .bandwidth_update = _bandwidth_update,
+   .get_vblank_counter =

[PATCH 057/165] drm/radeon: add radeon_asic struct for CIK (v11)

2013-06-26 Thread alexdeucher 
From: Alex Deucher alexander.deuc...@amd.com

v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release

Signed-off-by: Alex Deucher alexander.deuc...@amd.com
---
 drivers/gpu/drm/radeon/radeon_asic.c |  287 ++
 drivers/gpu/drm/radeon/radeon_asic.h |   47 ++
 2 files changed, 334 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c 
b/drivers/gpu/drm/radeon/radeon_asic.c
index 717b537..d60adb3 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1923,6 +1923,280 @@ static struct radeon_asic si_asic = {
},
 };
 
+static struct radeon_asic ci_asic = {
+   .init = cik_init,
+   .fini = cik_fini,
+   .suspend = cik_suspend,
+   .resume = cik_resume,
+   .asic_reset = cik_asic_reset,
+   .vga_set_state = r600_vga_set_state,
+   .ioctl_wait_idle = NULL,
+   .gui_idle = r600_gui_idle,
+   .mc_wait_for_idle = evergreen_mc_wait_for_idle,
+   .get_xclk = cik_get_xclk,
+   .get_gpu_clock_counter = cik_get_gpu_clock_counter,
+   .gart = {
+   .tlb_flush = cik_pcie_gart_tlb_flush,
+   .set_page = rs600_gart_set_page,
+   },
+   .vm = {
+   .init = cik_vm_init,
+   .fini = cik_vm_fini,
+   .pt_ring_index = R600_RING_TYPE_DMA_INDEX,
+   .set_page = cik_vm_set_page,
+   },
+   .ring = {
+   [RADEON_RING_TYPE_GFX_INDEX] = {
+   .ib_execute = cik_ring_ib_execute,
+   .ib_parse = cik_ib_parse,
+   .emit_fence = cik_fence_gfx_ring_emit,
+   .emit_semaphore = cik_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = cik_ring_test,
+   .ib_test = cik_ib_test,
+   .is_lockup = cik_gfx_is_lockup,
+   .vm_flush = cik_vm_flush,
+   },
+   [CAYMAN_RING_TYPE_CP1_INDEX] = {
+   .ib_execute = cik_ring_ib_execute,
+   .ib_parse = cik_ib_parse,
+   .emit_fence = cik_fence_compute_ring_emit,
+   .emit_semaphore = cik_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = cik_ring_test,
+   .ib_test = cik_ib_test,
+   .is_lockup = cik_gfx_is_lockup,
+   .vm_flush = cik_vm_flush,
+   },
+   [CAYMAN_RING_TYPE_CP2_INDEX] = {
+   .ib_execute = cik_ring_ib_execute,
+   .ib_parse = cik_ib_parse,
+   .emit_fence = cik_fence_compute_ring_emit,
+   .emit_semaphore = cik_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = cik_ring_test,
+   .ib_test = cik_ib_test,
+   .is_lockup = cik_gfx_is_lockup,
+   .vm_flush = cik_vm_flush,
+   },
+   [R600_RING_TYPE_DMA_INDEX] = {
+   .ib_execute = cik_sdma_ring_ib_execute,
+   .ib_parse = cik_ib_parse,
+   .emit_fence = cik_sdma_fence_ring_emit,
+   .emit_semaphore = cik_sdma_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = cik_sdma_ring_test,
+   .ib_test = cik_sdma_ib_test,
+   .is_lockup = cik_sdma_is_lockup,
+   .vm_flush = cik_dma_vm_flush,
+   },
+   [CAYMAN_RING_TYPE_DMA1_INDEX] = {
+   .ib_execute = cik_sdma_ring_ib_execute,
+   .ib_parse = cik_ib_parse,
+   .emit_fence = cik_sdma_fence_ring_emit,
+   .emit_semaphore = cik_sdma_semaphore_ring_emit,
+   .cs_parse = NULL,
+   .ring_test = cik_sdma_ring_test,
+   .ib_test = cik_sdma_ib_test,
+   .is_lockup = cik_sdma_is_lockup,
+   .vm_flush = cik_dma_vm_flush,
+   },
+   [R600_RING_TYPE_UVD_INDEX] = {
+   .ib_execute = r600_uvd_ib_execute,
+   .emit_fence = r600_uvd_fence_emit,
+   .emit_semaphore = cayman_uvd_semaphore_emit,
+   .cs_parse = radeon_uvd_cs_parse,
+   .ring_test = r600_uvd_ring_test,
+   .ib_test = r600_uvd_ib_test,
+   .is_lockup = radeon_ring_test_lockup,
+   }
+