Re: [PATCH 08/15] drm/vc4: hdmi: Introduce a CEC clock
Hi Dave,
On Fri, Dec 18, 2020 at 11:37:50AM +, Dave Stevenson wrote:
> Hi Maxime
>
> On Thu, 10 Dec 2020 at 13:47, Maxime Ripard wrote:
> >
> > While the BCM2835 had the CEC clock derived from the HSM clock, the
> > BCM2711 has a dedicated parent clock for it.
> >
> > Let's introduce a separate clock for it so that we can handle both
> > cases.
> >
> > Signed-off-by: Maxime Ripard
> > ---
> > drivers/gpu/drm/vc4/vc4_hdmi.c | 9 -
> > drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
> > 2 files changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> > index b93ee3e26e2b..0debd22bc992 100644
> > --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> > +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> > @@ -145,7 +145,7 @@ static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi
> > *vc4_hdmi)
> > * Set the clock divider: the hsm_clock rate and this divider
> > * setting will give a 40 kHz CEC clock.
> > */
> > - clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ;
> > + clk_cnt = clk_get_rate(vc4_hdmi->cec_clock) / CEC_CLOCK_FREQ;
> > value |= clk_cnt << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT;
> > HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
> > }
> > @@ -1740,6 +1740,7 @@ static int vc4_hdmi_init_resources(struct vc4_hdmi
> > *vc4_hdmi)
> > return PTR_ERR(vc4_hdmi->hsm_clock);
> > }
> > vc4_hdmi->audio_clock = vc4_hdmi->hsm_clock;
> > + vc4_hdmi->cec_clock = vc4_hdmi->hsm_clock;
> >
> > return 0;
> > }
> > @@ -1833,6 +1834,12 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi
> > *vc4_hdmi)
> > return PTR_ERR(vc4_hdmi->audio_clock);
> > }
> >
> > + vc4_hdmi->cec_clock = devm_clk_get(dev, "cec");
> > + if (IS_ERR(vc4_hdmi->cec_clock)) {
> > + DRM_ERROR("Failed to get CEC clock\n");
> > + return PTR_ERR(vc4_hdmi->cec_clock);
> > + }
>
> Aren't we adding to the DT binding here and breaking backwards compatibility?
> Admittedly CEC didn't work before (and was masked out) for vc5, but do
> we need to worry about those with existing DT files that currently
> work happily?
The DT compatibility is not a worry here: I made sure the CEC clock and
range were part of the binding since it's been introduced:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2e3725b05b785e73482a194b99bff3d5a1c85140
So we were not using it so far, but it was in the DT all along
Maxime
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Re: [PATCH 08/15] drm/vc4: hdmi: Introduce a CEC clock
On Fri, 18 Dec 2020 at 12:23, Maxime Ripard wrote:
>
> Hi Dave,
>
> On Fri, Dec 18, 2020 at 11:37:50AM +, Dave Stevenson wrote:
> > Hi Maxime
> >
> > On Thu, 10 Dec 2020 at 13:47, Maxime Ripard wrote:
> > >
> > > While the BCM2835 had the CEC clock derived from the HSM clock, the
> > > BCM2711 has a dedicated parent clock for it.
> > >
> > > Let's introduce a separate clock for it so that we can handle both
> > > cases.
> > >
> > > Signed-off-by: Maxime Ripard
> > > ---
> > > drivers/gpu/drm/vc4/vc4_hdmi.c | 9 -
> > > drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
> > > 2 files changed, 9 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c
> > > b/drivers/gpu/drm/vc4/vc4_hdmi.c
> > > index b93ee3e26e2b..0debd22bc992 100644
> > > --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> > > +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> > > @@ -145,7 +145,7 @@ static void vc4_hdmi_cec_update_clk_div(struct
> > > vc4_hdmi *vc4_hdmi)
> > > * Set the clock divider: the hsm_clock rate and this divider
> > > * setting will give a 40 kHz CEC clock.
> > > */
> > > - clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ;
> > > + clk_cnt = clk_get_rate(vc4_hdmi->cec_clock) / CEC_CLOCK_FREQ;
> > > value |= clk_cnt << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT;
> > > HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
> > > }
> > > @@ -1740,6 +1740,7 @@ static int vc4_hdmi_init_resources(struct vc4_hdmi
> > > *vc4_hdmi)
> > > return PTR_ERR(vc4_hdmi->hsm_clock);
> > > }
> > > vc4_hdmi->audio_clock = vc4_hdmi->hsm_clock;
> > > + vc4_hdmi->cec_clock = vc4_hdmi->hsm_clock;
> > >
> > > return 0;
> > > }
> > > @@ -1833,6 +1834,12 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi
> > > *vc4_hdmi)
> > > return PTR_ERR(vc4_hdmi->audio_clock);
> > > }
> > >
> > > + vc4_hdmi->cec_clock = devm_clk_get(dev, "cec");
> > > + if (IS_ERR(vc4_hdmi->cec_clock)) {
> > > + DRM_ERROR("Failed to get CEC clock\n");
> > > + return PTR_ERR(vc4_hdmi->cec_clock);
> > > + }
> >
> > Aren't we adding to the DT binding here and breaking backwards
> > compatibility?
> > Admittedly CEC didn't work before (and was masked out) for vc5, but do
> > we need to worry about those with existing DT files that currently
> > work happily?
>
> The DT compatibility is not a worry here: I made sure the CEC clock and
> range were part of the binding since it's been introduced:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2e3725b05b785e73482a194b99bff3d5a1c85140
>
> So we were not using it so far, but it was in the DT all along
I guess I should have read it then :-)
In which case
Reviewed-by: Dave Stevenson
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Re: [PATCH 08/15] drm/vc4: hdmi: Introduce a CEC clock
Hi Maxime
On Thu, 10 Dec 2020 at 13:47, Maxime Ripard wrote:
>
> While the BCM2835 had the CEC clock derived from the HSM clock, the
> BCM2711 has a dedicated parent clock for it.
>
> Let's introduce a separate clock for it so that we can handle both
> cases.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/vc4/vc4_hdmi.c | 9 -
> drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index b93ee3e26e2b..0debd22bc992 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -145,7 +145,7 @@ static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi
> *vc4_hdmi)
> * Set the clock divider: the hsm_clock rate and this divider
> * setting will give a 40 kHz CEC clock.
> */
> - clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ;
> + clk_cnt = clk_get_rate(vc4_hdmi->cec_clock) / CEC_CLOCK_FREQ;
> value |= clk_cnt << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT;
> HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
> }
> @@ -1740,6 +1740,7 @@ static int vc4_hdmi_init_resources(struct vc4_hdmi
> *vc4_hdmi)
> return PTR_ERR(vc4_hdmi->hsm_clock);
> }
> vc4_hdmi->audio_clock = vc4_hdmi->hsm_clock;
> + vc4_hdmi->cec_clock = vc4_hdmi->hsm_clock;
>
> return 0;
> }
> @@ -1833,6 +1834,12 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi
> *vc4_hdmi)
> return PTR_ERR(vc4_hdmi->audio_clock);
> }
>
> + vc4_hdmi->cec_clock = devm_clk_get(dev, "cec");
> + if (IS_ERR(vc4_hdmi->cec_clock)) {
> + DRM_ERROR("Failed to get CEC clock\n");
> + return PTR_ERR(vc4_hdmi->cec_clock);
> + }
Aren't we adding to the DT binding here and breaking backwards compatibility?
Admittedly CEC didn't work before (and was masked out) for vc5, but do
we need to worry about those with existing DT files that currently
work happily?
Otherwise I'm happy with the patch.
Dave
> +
> vc4_hdmi->reset = devm_reset_control_get(dev, NULL);
> if (IS_ERR(vc4_hdmi->reset)) {
> DRM_ERROR("Failed to get HDMI reset line\n");
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
> index 720914761261..adc4bf33ff15 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
> @@ -155,6 +155,7 @@ struct vc4_hdmi {
> bool cec_tx_ok;
> bool cec_irq_was_rx;
>
> + struct clk *cec_clock;
> struct clk *pixel_clock;
> struct clk *hsm_clock;
> struct clk *audio_clock;
> --
> 2.28.0
>
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[PATCH 08/15] drm/vc4: hdmi: Introduce a CEC clock
While the BCM2835 had the CEC clock derived from the HSM clock, the
BCM2711 has a dedicated parent clock for it.
Let's introduce a separate clock for it so that we can handle both
cases.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 9 -
drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index b93ee3e26e2b..0debd22bc992 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -145,7 +145,7 @@ static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi
*vc4_hdmi)
* Set the clock divider: the hsm_clock rate and this divider
* setting will give a 40 kHz CEC clock.
*/
- clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ;
+ clk_cnt = clk_get_rate(vc4_hdmi->cec_clock) / CEC_CLOCK_FREQ;
value |= clk_cnt << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT;
HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
}
@@ -1740,6 +1740,7 @@ static int vc4_hdmi_init_resources(struct vc4_hdmi
*vc4_hdmi)
return PTR_ERR(vc4_hdmi->hsm_clock);
}
vc4_hdmi->audio_clock = vc4_hdmi->hsm_clock;
+ vc4_hdmi->cec_clock = vc4_hdmi->hsm_clock;
return 0;
}
@@ -1833,6 +1834,12 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi
*vc4_hdmi)
return PTR_ERR(vc4_hdmi->audio_clock);
}
+ vc4_hdmi->cec_clock = devm_clk_get(dev, "cec");
+ if (IS_ERR(vc4_hdmi->cec_clock)) {
+ DRM_ERROR("Failed to get CEC clock\n");
+ return PTR_ERR(vc4_hdmi->cec_clock);
+ }
+
vc4_hdmi->reset = devm_reset_control_get(dev, NULL);
if (IS_ERR(vc4_hdmi->reset)) {
DRM_ERROR("Failed to get HDMI reset line\n");
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
index 720914761261..adc4bf33ff15 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -155,6 +155,7 @@ struct vc4_hdmi {
bool cec_tx_ok;
bool cec_irq_was_rx;
+ struct clk *cec_clock;
struct clk *pixel_clock;
struct clk *hsm_clock;
struct clk *audio_clock;
--
2.28.0
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