Re: [PATCH 1/8] dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml

[Rob Herring]

On Mon, 06 Feb 2023 02:27:27 +0200, Dmitry Baryshkov wrote:
> The GPU clock controller bindings for the Qualcomm sm8350 platform are
> not correct. The driver uses .fw_name instead of using indices to bind
> parent clocks, thus demanding the clock-names usage. With the proper
> clock-names in place, the bindings becomes equal to the bindings defined
> by qcom,gpucc.yaml, so it is impractical to keep them in a separate
> file.
> 
> Signed-off-by: Dmitry Baryshkov 
> ---
>  .../bindings/clock/qcom,gpucc-sm8350.yaml | 71 ---
>  .../devicetree/bindings/clock/qcom,gpucc.yaml |  2 +
>  2 files changed, 2 insertions(+), 71 deletions(-)
>  delete mode 100644 
> Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml
> 

Acked-by: Rob Herring 

[PATCH 1/8] dt-bindings: clock: Merge qcom, gpucc-sm8350 into qcom, gpucc.yaml

[Dmitry Baryshkov]

The GPU clock controller bindings for the Qualcomm sm8350 platform are
not correct. The driver uses .fw_name instead of using indices to bind
parent clocks, thus demanding the clock-names usage. With the proper
clock-names in place, the bindings becomes equal to the bindings defined
by qcom,gpucc.yaml, so it is impractical to keep them in a separate
file.

Signed-off-by: Dmitry Baryshkov 
---
 .../bindings/clock/qcom,gpucc-sm8350.yaml | 71 ---
 .../devicetree/bindings/clock/qcom,gpucc.yaml |  2 +
 2 files changed, 2 insertions(+), 71 deletions(-)
 delete mode 100644 
Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml

diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml 
b/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml
deleted file mode 100644
index fb7ae3d18503..
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml
+++ /dev/null
@@ -1,71 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2

-$id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Graphics Clock & Reset Controller on SM8350
-
-maintainers:
-  - Robert Foss 
-
-description: |
-  Qualcomm graphics clock control module provides the clocks, resets and power
-  domains on Qualcomm SoCs.
-
-  See also:: include/dt-bindings/clock/qcom,gpucc-sm8350.h
-
-properties:
-  compatible:
-enum:
-  - qcom,sm8350-gpucc
-
-  clocks:
-items:
-  - description: Board XO source
-  - description: GPLL0 main branch source
-  - description: GPLL0 div branch source
-
-  '#clock-cells':
-const: 1
-
-  '#reset-cells':
-const: 1
-
-  '#power-domain-cells':
-const: 1
-
-  reg:
-maxItems: 1
-
-required:
-  - compatible
-  - reg
-  - clocks
-  - '#clock-cells'
-  - '#reset-cells'
-  - '#power-domain-cells'
-
-additionalProperties: false
-
-examples:
-  - |
-#include 
-#include 
-
-soc {
-#address-cells = <2>;
-#size-cells = <2>;
-
-clock-controller@3d9 {
-compatible = "qcom,sm8350-gpucc";
-reg = <0 0x03d9 0 0x9000>;
-clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_GPU_GPLL0_CLK_SRC>,
- <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
-#clock-cells = <1>;
-#reset-cells = <1>;
-#power-domain-cells = <1>;
-};
-};
-...
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml 
b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index 7256c438a4cf..db53eb288995 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
@@ -21,6 +21,7 @@ description: |
 include/dt-bindings/clock/qcom,gpucc-sm6350.h
 include/dt-bindings/clock/qcom,gpucc-sm8150.h
 include/dt-bindings/clock/qcom,gpucc-sm8250.h
+include/dt-bindings/clock/qcom,gpucc-sm8350.h
 
 properties:
   compatible:
@@ -33,6 +34,7 @@ properties:
   - qcom,sm6350-gpucc
   - qcom,sm8150-gpucc
   - qcom,sm8250-gpucc
+  - qcom,sm8350-gpucc
 
   clocks:
 items:
-- 
2.39.1