Re: [PATCH 10/21] drm: mxsfb: Stop using DRM simple display pipeline helper
On 2020-03-09 20:52, Laurent Pinchart wrote:
> The DRM simple display pipeline helper only supports a single plane. In
> order to prepare for support of the alpha plane on i.MX6SX and i.MX7,
> move away from the helper. No new feature is added.
>
> Signed-off-by: Laurent Pinchart
I actually would prefer if we order this patch a bit later, especially
after the mxsfb_crtc -> mxsfb_kms rename. It will make git log -p easier
later.
Looks quite straight forward otherwise. One small comment below.
> ---
> drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 184 ++---
> drivers/gpu/drm/mxsfb/mxsfb_drv.c | 108 ++---
> drivers/gpu/drm/mxsfb/mxsfb_drv.h | 23 ++--
> 3 files changed, 197 insertions(+), 118 deletions(-)
>
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> index c4f1575b4210..8f339adb8d04 100644
> --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> @@ -9,15 +9,21 @@
> */
>
> #include
> +#include
> #include
> +#include
> #include
>
> +#include
> +#include
> #include
> #include
> +#include
> #include
> #include
> #include
> -#include
> +#include
> +#include
> #include
>
> #include "mxsfb_drv.h"
> @@ -26,6 +32,10 @@
> /* 1 second delay should be plenty of time for block reset */
> #define RESET_TIMEOUT100
>
> +/*
> -
> + * CRTC
> + */
> +
> static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val)
> {
> return (val & mxsfb->devdata->hs_wdth_mask) <<
> @@ -35,9 +45,8 @@ static u32 set_hsync_pulse_width(struct
> mxsfb_drm_private *mxsfb, u32 val)
> /* Setup the MXSFB registers for decoding the pixels out of the framebuffer
> */
> static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private *mxsfb)
> {
> - struct drm_crtc *crtc = >pipe.crtc;
> - struct drm_device *drm = crtc->dev;
> - const u32 format = crtc->primary->state->fb->format->format;
> + struct drm_device *drm = mxsfb->drm;
> + const u32 format = mxsfb->crtc.primary->state->fb->format->format;
> u32 ctrl, ctrl1;
>
> ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER;
> @@ -71,8 +80,7 @@ static int mxsfb_set_pixel_fmt(struct
> mxsfb_drm_private *mxsfb)
>
> static void mxsfb_set_bus_fmt(struct mxsfb_drm_private *mxsfb)
> {
> - struct drm_crtc *crtc = >pipe.crtc;
> - struct drm_device *drm = crtc->dev;
> + struct drm_device *drm = mxsfb->drm;
> u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
> u32 reg;
>
> @@ -175,7 +183,7 @@ static int mxsfb_reset_block(struct
> mxsfb_drm_private *mxsfb)
>
> static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb)
> {
> - struct drm_framebuffer *fb = mxsfb->pipe.plane.state->fb;
> + struct drm_framebuffer *fb = mxsfb->plane.state->fb;
> struct drm_gem_cma_object *gem;
>
> if (!fb)
> @@ -190,8 +198,8 @@ static dma_addr_t mxsfb_get_fb_paddr(struct
> mxsfb_drm_private *mxsfb)
>
> static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
> {
> - struct drm_device *drm = mxsfb->pipe.crtc.dev;
> - struct drm_display_mode *m = >pipe.crtc.state->adjusted_mode;
> + struct drm_device *drm = mxsfb->crtc.dev;
> + struct drm_display_mode *m = >crtc.state->adjusted_mode;
> u32 bus_flags = mxsfb->connector->display_info.bus_flags;
> u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
> int err;
> @@ -273,10 +281,29 @@ static void mxsfb_crtc_mode_set_nofb(struct
> mxsfb_drm_private *mxsfb)
> mxsfb->base + LCDC_VDCTRL4);
> }
>
> -void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb)
> +static int mxsfb_crtc_atomic_check(struct drm_crtc *crtc,
> +struct drm_crtc_state *state)
> {
> + bool has_primary = state->plane_mask &
> +drm_plane_mask(crtc->primary);
> +
> + /* The primary plane has to be enabled when the CRTC is active. */
> + if (has_primary != state->active)
> + return -EINVAL;
> +
> + /* TODO: Is this needed ? */
Did you come to a conclusion? I guess since drm_simple_kms_crtc_check()
is using it is the safe choice to keep it.
--
Stefan
> + return drm_atomic_add_affected_planes(state->state, crtc);
> +}
> +
> +static void mxsfb_crtc_atomic_enable(struct drm_crtc *crtc,
> + struct drm_crtc_state *old_state)
> +{
> + struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);
> + struct drm_device *drm = mxsfb->drm;
> dma_addr_t paddr;
>
> + pm_runtime_get_sync(drm->dev);
> +
> mxsfb_enable_axi_clk(mxsfb);
> mxsfb_crtc_mode_set_nofb(mxsfb);
>
> @@ -290,17 +317,100 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb)
> mxsfb_enable_controller(mxsfb);
> }
>
> -void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb)
> +static void
[PATCH 10/21] drm: mxsfb: Stop using DRM simple display pipeline helper
The DRM simple display pipeline helper only supports a single plane. In
order to prepare for support of the alpha plane on i.MX6SX and i.MX7,
move away from the helper. No new feature is added.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 184 ++---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 108 ++---
drivers/gpu/drm/mxsfb/mxsfb_drv.h | 23 ++--
3 files changed, 197 insertions(+), 118 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
index c4f1575b4210..8f339adb8d04 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
@@ -9,15 +9,21 @@
*/
#include
+#include
#include
+#include
#include
+#include
+#include
#include
#include
+#include
#include
#include
#include
-#include
+#include
+#include
#include
#include "mxsfb_drv.h"
@@ -26,6 +32,10 @@
/* 1 second delay should be plenty of time for block reset */
#define RESET_TIMEOUT 100
+/*
-
+ * CRTC
+ */
+
static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val)
{
return (val & mxsfb->devdata->hs_wdth_mask) <<
@@ -35,9 +45,8 @@ static u32 set_hsync_pulse_width(struct mxsfb_drm_private
*mxsfb, u32 val)
/* Setup the MXSFB registers for decoding the pixels out of the framebuffer */
static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private *mxsfb)
{
- struct drm_crtc *crtc = >pipe.crtc;
- struct drm_device *drm = crtc->dev;
- const u32 format = crtc->primary->state->fb->format->format;
+ struct drm_device *drm = mxsfb->drm;
+ const u32 format = mxsfb->crtc.primary->state->fb->format->format;
u32 ctrl, ctrl1;
ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER;
@@ -71,8 +80,7 @@ static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private
*mxsfb)
static void mxsfb_set_bus_fmt(struct mxsfb_drm_private *mxsfb)
{
- struct drm_crtc *crtc = >pipe.crtc;
- struct drm_device *drm = crtc->dev;
+ struct drm_device *drm = mxsfb->drm;
u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
u32 reg;
@@ -175,7 +183,7 @@ static int mxsfb_reset_block(struct mxsfb_drm_private
*mxsfb)
static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb)
{
- struct drm_framebuffer *fb = mxsfb->pipe.plane.state->fb;
+ struct drm_framebuffer *fb = mxsfb->plane.state->fb;
struct drm_gem_cma_object *gem;
if (!fb)
@@ -190,8 +198,8 @@ static dma_addr_t mxsfb_get_fb_paddr(struct
mxsfb_drm_private *mxsfb)
static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
{
- struct drm_device *drm = mxsfb->pipe.crtc.dev;
- struct drm_display_mode *m = >pipe.crtc.state->adjusted_mode;
+ struct drm_device *drm = mxsfb->crtc.dev;
+ struct drm_display_mode *m = >crtc.state->adjusted_mode;
u32 bus_flags = mxsfb->connector->display_info.bus_flags;
u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
int err;
@@ -273,10 +281,29 @@ static void mxsfb_crtc_mode_set_nofb(struct
mxsfb_drm_private *mxsfb)
mxsfb->base + LCDC_VDCTRL4);
}
-void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb)
+static int mxsfb_crtc_atomic_check(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
{
+ bool has_primary = state->plane_mask &
+ drm_plane_mask(crtc->primary);
+
+ /* The primary plane has to be enabled when the CRTC is active. */
+ if (has_primary != state->active)
+ return -EINVAL;
+
+ /* TODO: Is this needed ? */
+ return drm_atomic_add_affected_planes(state->state, crtc);
+}
+
+static void mxsfb_crtc_atomic_enable(struct drm_crtc *crtc,
+struct drm_crtc_state *old_state)
+{
+ struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);
+ struct drm_device *drm = mxsfb->drm;
dma_addr_t paddr;
+ pm_runtime_get_sync(drm->dev);
+
mxsfb_enable_axi_clk(mxsfb);
mxsfb_crtc_mode_set_nofb(mxsfb);
@@ -290,17 +317,100 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb)
mxsfb_enable_controller(mxsfb);
}
-void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb)
+static void mxsfb_crtc_atomic_disable(struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state)
{
+ struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);
+ struct drm_device *drm = mxsfb->drm;
+ struct drm_pending_vblank_event *event;
+
mxsfb_disable_controller(mxsfb);
mxsfb_disable_axi_clk(mxsfb);
+
+ pm_runtime_put_sync(drm->dev);
+
+ spin_lock_irq(>event_lock);
+ event = crtc->state->event;
+ if (event) {
+ crtc->state->event = NULL;
+
