[PATCH 14/18] drm/panel: add S6E3FA0 driver
On 05/14/2014 08:27 AM, YoungJun Cho wrote: > This patch adds MIPI-DSI command mode based S6E3FA0 AMOLED LCD Panel driver. > > Signed-off-by: YoungJun Cho > Acked-by: Inki Dae > Acked-by: Kyungmin Park Few nitpicks, beside them. Reviewed-by: Andrzej Hajda > --- > drivers/gpu/drm/panel/Kconfig |7 + > drivers/gpu/drm/panel/Makefile|1 + > drivers/gpu/drm/panel/panel-s6e3fa0.c | 570 > + > 3 files changed, 578 insertions(+) > create mode 100644 drivers/gpu/drm/panel/panel-s6e3fa0.c > > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig > index 4ec874d..fa51237 100644 > --- a/drivers/gpu/drm/panel/Kconfig > +++ b/drivers/gpu/drm/panel/Kconfig > @@ -30,4 +30,11 @@ config DRM_PANEL_S6E8AA0 > select DRM_MIPI_DSI > select VIDEOMODE_HELPERS > > +config DRM_PANEL_S6E3FA0 > + tristate "S6E3FA0 DSI command mode panel" > + depends on DRM && DRM_PANEL > + depends on OF > + select DRM_MIPI_DSI > + select CMDMODE_HELPERS > + > endmenu > diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile > index 8b92921..85c6738 100644 > --- a/drivers/gpu/drm/panel/Makefile > +++ b/drivers/gpu/drm/panel/Makefile > @@ -1,3 +1,4 @@ > obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o > obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o > obj-$(CONFIG_DRM_PANEL_S6E8AA0) += panel-s6e8aa0.o > +obj-$(CONFIG_DRM_PANEL_S6E3FA0) += panel-s6e3fa0.o > diff --git a/drivers/gpu/drm/panel/panel-s6e3fa0.c > b/drivers/gpu/drm/panel/panel-s6e3fa0.c > new file mode 100644 > index 000..a3b2d7e > --- /dev/null > +++ b/drivers/gpu/drm/panel/panel-s6e3fa0.c > @@ -0,0 +1,570 @@ > +/* > + * MIPI-DSI based s6e3fa0 AMOLED LCD 5.7 inch panel driver. > + * > + * Copyright (c) 2014 Samsung Electronics Co., Ltd > + * > + * YoungJun Cho > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +#include > +#include > +#include > + > +#include > +#include > + > +#include > +#include > +#include > + > +/* Manufacturer Command Set */ > +#define MCS_GLOBAL_PARAMETER 0xb0 > +#define MCS_AID 0xb2 > +#define MCS_ELVSSOPT 0xb6 > +#define MCS_TEMPERATURE_SET 0xb8 > +#define MCS_PENTILE_CTRL 0xc0 > +#define MCS_GAMMA_MODE 0xca > +#define MCS_VDDM 0xd7 > +#define MCS_ALS 0xe3 > +#define MCS_ERR_FG 0xed > +#define MCS_KEY_LEV1 0xf0 > +#define MCS_PANEL_UPDATE 0xf7 > +#define MCS_KEY_LEV2 0xfc > +#define MCS_RE 0xfe > +#define MCS_TOUT2_HSYNC 0xff > + > +/* Content Adaptive Brightness Control */ > +#define DCS_WRITE_CABC 0x55 > + > +#define MTP_ID_LEN 3 > +#define GAMMA_LEVEL_NUM 30 > + > +#define DEFAULT_VDDM_VAL 0x15 > + > +struct s6e3fa0 { > + struct device *dev; > + struct drm_panelpanel; > + > + struct regulator_bulk_data supplies[2]; > + struct gpio_desc*reset_gpio; > + struct gpio_desc*det_gpio; > + struct gpio_desc*te_gpio; > + struct cmdmode cm; > + > + unsigned intpower_on_delay; > + unsigned intreset_delay; > + unsigned intinit_delay; > + unsigned intwidth_mm; > + unsigned intheight_mm; > + > + unsigned char id; > + unsigned char vddm; > + unsigned intbrightness; > +}; > + > +#define panel_to_s6e3fa0(p) container_of(p, struct s6e3fa0, panel) > + > +/* VDD Memory Lookup Table contains paires of {ReadValue, WriteValue} */ s/paires/pairs/ > +static const unsigned char s6e3fa0_vddm_lut[][2] = { > + {0x00, 0x0d}, {0x01, 0x0d}, {0x02, 0x0e}, {0x03, 0x0f}, {0x04, 0x10}, > + {0x05, 0x11}, {0x06, 0x12}, {0x07, 0x13}, {0x08, 0x14}, {0x09, 0x15}, > + {0x0a, 0x16}, {0x0b, 0x17}, {0x0c, 0x18}, {0x0d, 0x19}, {0x0e, 0x1a}, > + {0x0f, 0x1b}, {0x10, 0x1c}, {0x11, 0x1d}, {0x12, 0x1e}, {0x13, 0x1f}, > + {0x14, 0x20}, {0x15, 0x21}, {0x16, 0x22}, {0x17, 0x23}, {0x18, 0x24}, > + {0x19, 0x25}, {0x1a, 0x26}, {0x1b, 0x27}, {0x1c, 0x28}, {0x1d, 0x29}, > + {0x1e, 0x2a}, {0x1f, 0x2b}, {0x20, 0x2c}, {0x21, 0x2d}, {0x22, 0x2e}, > + {0x23, 0x2f}, {0x24, 0x30}, {0x25, 0x31}, {0x26, 0x32}, {0x27, 0x33}, > + {0x28, 0x34}, {0x29, 0x35}, {0x2a, 0x36}, {0x2b, 0x37}, {0x2c, 0x38}, > + {0x2d, 0x39}, {0x2e, 0x3a}, {0x2f, 0x3b}, {0x30, 0x3c}, {0x31, 0x3d}, > + {0x32, 0x3e}, {0x33, 0x3f}, {0x34, 0x3f}, {0x35, 0x3f}, {0x36, 0x3f}, > +
[PATCH 14/18] drm/panel: add S6E3FA0 driver
This patch adds MIPI-DSI command mode based S6E3FA0 AMOLED LCD Panel driver. Signed-off-by: YoungJun Cho Acked-by: Inki Dae Acked-by: Kyungmin Park --- drivers/gpu/drm/panel/Kconfig |7 + drivers/gpu/drm/panel/Makefile|1 + drivers/gpu/drm/panel/panel-s6e3fa0.c | 570 + 3 files changed, 578 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-s6e3fa0.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 4ec874d..fa51237 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -30,4 +30,11 @@ config DRM_PANEL_S6E8AA0 select DRM_MIPI_DSI select VIDEOMODE_HELPERS +config DRM_PANEL_S6E3FA0 + tristate "S6E3FA0 DSI command mode panel" + depends on DRM && DRM_PANEL + depends on OF + select DRM_MIPI_DSI + select CMDMODE_HELPERS + endmenu diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 8b92921..85c6738 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o obj-$(CONFIG_DRM_PANEL_S6E8AA0) += panel-s6e8aa0.o +obj-$(CONFIG_DRM_PANEL_S6E3FA0) += panel-s6e3fa0.o diff --git a/drivers/gpu/drm/panel/panel-s6e3fa0.c b/drivers/gpu/drm/panel/panel-s6e3fa0.c new file mode 100644 index 000..a3b2d7e --- /dev/null +++ b/drivers/gpu/drm/panel/panel-s6e3fa0.c @@ -0,0 +1,570 @@ +/* + * MIPI-DSI based s6e3fa0 AMOLED LCD 5.7 inch panel driver. + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd + * + * YoungJun Cho + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include + +#include +#include + +#include +#include +#include + +/* Manufacturer Command Set */ +#define MCS_GLOBAL_PARAMETER 0xb0 +#define MCS_AID0xb2 +#define MCS_ELVSSOPT 0xb6 +#define MCS_TEMPERATURE_SET0xb8 +#define MCS_PENTILE_CTRL 0xc0 +#define MCS_GAMMA_MODE 0xca +#define MCS_VDDM 0xd7 +#define MCS_ALS0xe3 +#define MCS_ERR_FG 0xed +#define MCS_KEY_LEV1 0xf0 +#define MCS_PANEL_UPDATE 0xf7 +#define MCS_KEY_LEV2 0xfc +#define MCS_RE 0xfe +#define MCS_TOUT2_HSYNC0xff + +/* Content Adaptive Brightness Control */ +#define DCS_WRITE_CABC 0x55 + +#define MTP_ID_LEN 3 +#define GAMMA_LEVEL_NUM30 + +#define DEFAULT_VDDM_VAL 0x15 + +struct s6e3fa0 { + struct device *dev; + struct drm_panelpanel; + + struct regulator_bulk_data supplies[2]; + struct gpio_desc*reset_gpio; + struct gpio_desc*det_gpio; + struct gpio_desc*te_gpio; + struct cmdmode cm; + + unsigned intpower_on_delay; + unsigned intreset_delay; + unsigned intinit_delay; + unsigned intwidth_mm; + unsigned intheight_mm; + + unsigned char id; + unsigned char vddm; + unsigned intbrightness; +}; + +#define panel_to_s6e3fa0(p) container_of(p, struct s6e3fa0, panel) + +/* VDD Memory Lookup Table contains paires of {ReadValue, WriteValue} */ +static const unsigned char s6e3fa0_vddm_lut[][2] = { + {0x00, 0x0d}, {0x01, 0x0d}, {0x02, 0x0e}, {0x03, 0x0f}, {0x04, 0x10}, + {0x05, 0x11}, {0x06, 0x12}, {0x07, 0x13}, {0x08, 0x14}, {0x09, 0x15}, + {0x0a, 0x16}, {0x0b, 0x17}, {0x0c, 0x18}, {0x0d, 0x19}, {0x0e, 0x1a}, + {0x0f, 0x1b}, {0x10, 0x1c}, {0x11, 0x1d}, {0x12, 0x1e}, {0x13, 0x1f}, + {0x14, 0x20}, {0x15, 0x21}, {0x16, 0x22}, {0x17, 0x23}, {0x18, 0x24}, + {0x19, 0x25}, {0x1a, 0x26}, {0x1b, 0x27}, {0x1c, 0x28}, {0x1d, 0x29}, + {0x1e, 0x2a}, {0x1f, 0x2b}, {0x20, 0x2c}, {0x21, 0x2d}, {0x22, 0x2e}, + {0x23, 0x2f}, {0x24, 0x30}, {0x25, 0x31}, {0x26, 0x32}, {0x27, 0x33}, + {0x28, 0x34}, {0x29, 0x35}, {0x2a, 0x36}, {0x2b, 0x37}, {0x2c, 0x38}, + {0x2d, 0x39}, {0x2e, 0x3a}, {0x2f, 0x3b}, {0x30, 0x3c}, {0x31, 0x3d}, + {0x32, 0x3e}, {0x33, 0x3f}, {0x34, 0x3f}, {0x35, 0x3f}, {0x36, 0x3f}, + {0x37, 0x3f}, {0x38, 0x3f}, {0x39, 0x3f}, {0x3a, 0x3f}, {0x3b, 0x3f}, + {0x3c, 0x3f}, {0x3d, 0x3f}, {0x3e, 0x3f}, {0x3f, 0x3f}, {0x40, 0x0c}, + {0x41, 0x0b}, {0x42, 0x0a}, {0x43, 0x09}, {0x44, 0x08}, {0x45, 0x07}, + {0x46, 0x06}, {0x47, 0x05}, {0x48, 0x04}, {0x49, 0x03}, {0x4a,