Re: [PATCH 18/23] arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs

2019-03-05 Thread Krzysztof Kozlowski
On Tue, 5 Mar 2019 at 10:36, Andrzej Hajda  wrote:
>
> On 05.03.2019 10:28, Krzysztof Kozlowski wrote:
> > On Fri, 1 Mar 2019 at 13:24, Andrzej Hajda  wrote:
> >> To support local paths both DECON and GSCALER should enable respective
> >> Smart Deck clocks DSD and GSD.
> >>
> >> Signed-off-by: Andrzej Hajda 
> >> ---
> >>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 25 +-
> >>  1 file changed, 15 insertions(+), 10 deletions(-)
> > Hi Andrzej,
> >
> > You did not CC me on DTS patches. The DTS should go through arm-soc DT
> > branch, not through drivers/subsystem.
> >
> > Any dependencies here and in next patch?
>
>
> Ups, forgive me my distraction. DTS patches should be applied before
> following driver changes.

I can take them after merge window and either prepare a separate
branch+tag or the following driver changes will wait till next
release.

Best regards,
Krzysztof
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Re: [PATCH 18/23] arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs

2019-03-05 Thread Andrzej Hajda
On 05.03.2019 10:28, Krzysztof Kozlowski wrote:
> On Fri, 1 Mar 2019 at 13:24, Andrzej Hajda  wrote:
>> To support local paths both DECON and GSCALER should enable respective
>> Smart Deck clocks DSD and GSD.
>>
>> Signed-off-by: Andrzej Hajda 
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 25 +-
>>  1 file changed, 15 insertions(+), 10 deletions(-)
> Hi Andrzej,
>
> You did not CC me on DTS patches. The DTS should go through arm-soc DT
> branch, not through drivers/subsystem.
>
> Any dependencies here and in next patch?


Ups, forgive me my distraction. DTS patches should be applied before
following driver changes.


Regards

Andrzej


>
> Best regards,
> Krzysztof
>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
>> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> index e7cd3b67d818..e6d32b2fb3c0 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -848,12 +848,13 @@
>> <_disp CLK_ACLK_XIU_DECON1X>,
>> <_disp CLK_PCLK_SMMU_DECON1X>,
>> <_disp CLK_SCLK_DECON_VCLK>,
>> -   <_disp CLK_SCLK_DECON_ECLK>;
>> +   <_disp CLK_SCLK_DECON_ECLK>,
>> +   <_disp CLK_SCLK_DSD>;
>> clock-names = "pclk", "aclk_decon", 
>> "aclk_smmu_decon0x",
>> "aclk_xiu_decon0x", "pclk_smmu_decon0x",
>> "aclk_smmu_decon1x", "aclk_xiu_decon1x",
>> "pclk_smmu_decon1x", "sclk_decon_vclk",
>> -   "sclk_decon_eclk";
>> +   "sclk_decon_eclk", "dsd";
>> power-domains = <_disp>;
>> interrupt-names = "fifo", "vsync", "lcd_sys";
>> interrupts = ,
>> @@ -890,12 +891,13 @@
>>  <_disp CLK_ACLK_XIU_TV1X>,
>>  <_disp CLK_PCLK_SMMU_TV1X>,
>>  <_disp CLK_SCLK_DECON_TV_VCLK>,
>> -<_disp CLK_SCLK_DECON_TV_ECLK>;
>> +<_disp CLK_SCLK_DECON_TV_ECLK>,
>> +<_disp CLK_SCLK_DSD>;
>> clock-names = "pclk", "aclk_decon", 
>> "aclk_smmu_decon0x",
>>   "aclk_xiu_decon0x", 
>> "pclk_smmu_decon0x",
>>   "aclk_smmu_decon1x", 
>> "aclk_xiu_decon1x",
>>   "pclk_smmu_decon1x", "sclk_decon_vclk",
>> - "sclk_decon_eclk";
>> + "sclk_decon_eclk", "dsd";
>> samsung,disp-sysreg = <_disp>;
>> power-domains = <_disp>;
>> interrupt-names = "fifo", "vsync", "lcd_sys";
>> @@ -1022,11 +1024,12 @@
>> reg = <0x13c0 0x1000>;
>> interrupts = ;
>> clock-names = "pclk", "aclk", "aclk_xiu",
>> - "aclk_gsclbend";
>> + "aclk_gsclbend", "gsd";
>> clocks = <_gscl CLK_PCLK_GSCL0>,
>>  <_gscl CLK_ACLK_GSCL0>,
>>  <_gscl CLK_ACLK_XIU_GSCLX>,
>> -<_gscl CLK_ACLK_GSCLBEND_333>;
>> +<_gscl CLK_ACLK_GSCLBEND_333>,
>> +<_gscl CLK_ACLK_GSD>;
>> iommus = <_gscl0>;
>> power-domains = <_gscl>;
>> };
>> @@ -1036,11 +1039,12 @@
>> reg = <0x13c1 0x1000>;
>> interrupts = ;
>> clock-names = "pclk", "aclk", "aclk_xiu",
>> - "aclk_gsclbend";
>> + "aclk_gsclbend", "gsd";
>> clocks = <_gscl CLK_PCLK_GSCL1>,
>>  <_gscl CLK_ACLK_GSCL1>,
>>  <_gscl CLK_ACLK_XIU_GSCLX>,
>> -<_gscl CLK_ACLK_GSCLBEND_333>;
>> +<_gscl CLK_ACLK_GSCLBEND_333>,
>> +<_gscl CLK_ACLK_GSD>;
>> iommus = <_gscl1>;
>> power-domains = <_gscl>;
>> };
>> @@ -1050,11 +1054,12 @@
>> reg = <0x13c2 0x1000>;
>> interrupts = ;
>> clock-names = "pclk", "aclk", "aclk_xiu",
>> - "aclk_gsclbend";
>> + "aclk_gsclbend", "gsd";
>> clocks 

Re: [PATCH 18/23] arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs

2019-03-05 Thread Krzysztof Kozlowski
On Fri, 1 Mar 2019 at 13:24, Andrzej Hajda  wrote:
>
> To support local paths both DECON and GSCALER should enable respective
> Smart Deck clocks DSD and GSD.
>
> Signed-off-by: Andrzej Hajda 
> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 25 +-
>  1 file changed, 15 insertions(+), 10 deletions(-)

Hi Andrzej,

You did not CC me on DTS patches. The DTS should go through arm-soc DT
branch, not through drivers/subsystem.

Any dependencies here and in next patch?

Best regards,
Krzysztof

>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index e7cd3b67d818..e6d32b2fb3c0 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -848,12 +848,13 @@
> <_disp CLK_ACLK_XIU_DECON1X>,
> <_disp CLK_PCLK_SMMU_DECON1X>,
> <_disp CLK_SCLK_DECON_VCLK>,
> -   <_disp CLK_SCLK_DECON_ECLK>;
> +   <_disp CLK_SCLK_DECON_ECLK>,
> +   <_disp CLK_SCLK_DSD>;
> clock-names = "pclk", "aclk_decon", 
> "aclk_smmu_decon0x",
> "aclk_xiu_decon0x", "pclk_smmu_decon0x",
> "aclk_smmu_decon1x", "aclk_xiu_decon1x",
> "pclk_smmu_decon1x", "sclk_decon_vclk",
> -   "sclk_decon_eclk";
> +   "sclk_decon_eclk", "dsd";
> power-domains = <_disp>;
> interrupt-names = "fifo", "vsync", "lcd_sys";
> interrupts = ,
> @@ -890,12 +891,13 @@
>  <_disp CLK_ACLK_XIU_TV1X>,
>  <_disp CLK_PCLK_SMMU_TV1X>,
>  <_disp CLK_SCLK_DECON_TV_VCLK>,
> -<_disp CLK_SCLK_DECON_TV_ECLK>;
> +<_disp CLK_SCLK_DECON_TV_ECLK>,
> +<_disp CLK_SCLK_DSD>;
> clock-names = "pclk", "aclk_decon", 
> "aclk_smmu_decon0x",
>   "aclk_xiu_decon0x", "pclk_smmu_decon0x",
>   "aclk_smmu_decon1x", "aclk_xiu_decon1x",
>   "pclk_smmu_decon1x", "sclk_decon_vclk",
> - "sclk_decon_eclk";
> + "sclk_decon_eclk", "dsd";
> samsung,disp-sysreg = <_disp>;
> power-domains = <_disp>;
> interrupt-names = "fifo", "vsync", "lcd_sys";
> @@ -1022,11 +1024,12 @@
> reg = <0x13c0 0x1000>;
> interrupts = ;
> clock-names = "pclk", "aclk", "aclk_xiu",
> - "aclk_gsclbend";
> + "aclk_gsclbend", "gsd";
> clocks = <_gscl CLK_PCLK_GSCL0>,
>  <_gscl CLK_ACLK_GSCL0>,
>  <_gscl CLK_ACLK_XIU_GSCLX>,
> -<_gscl CLK_ACLK_GSCLBEND_333>;
> +<_gscl CLK_ACLK_GSCLBEND_333>,
> +<_gscl CLK_ACLK_GSD>;
> iommus = <_gscl0>;
> power-domains = <_gscl>;
> };
> @@ -1036,11 +1039,12 @@
> reg = <0x13c1 0x1000>;
> interrupts = ;
> clock-names = "pclk", "aclk", "aclk_xiu",
> - "aclk_gsclbend";
> + "aclk_gsclbend", "gsd";
> clocks = <_gscl CLK_PCLK_GSCL1>,
>  <_gscl CLK_ACLK_GSCL1>,
>  <_gscl CLK_ACLK_XIU_GSCLX>,
> -<_gscl CLK_ACLK_GSCLBEND_333>;
> +<_gscl CLK_ACLK_GSCLBEND_333>,
> +<_gscl CLK_ACLK_GSD>;
> iommus = <_gscl1>;
> power-domains = <_gscl>;
> };
> @@ -1050,11 +1054,12 @@
> reg = <0x13c2 0x1000>;
> interrupts = ;
> clock-names = "pclk", "aclk", "aclk_xiu",
> - "aclk_gsclbend";
> + "aclk_gsclbend", "gsd";
> clocks = <_gscl CLK_PCLK_GSCL2>,
>  <_gscl CLK_ACLK_GSCL2>,
>  <_gscl CLK_ACLK_XIU_GSCLX>,
> -<_gscl CLK_ACLK_GSCLBEND_333>;
> +<_gscl 

[PATCH 18/23] arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs

2019-03-01 Thread Andrzej Hajda
To support local paths both DECON and GSCALER should enable respective
Smart Deck clocks DSD and GSD.

Signed-off-by: Andrzej Hajda 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 25 +-
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index e7cd3b67d818..e6d32b2fb3c0 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -848,12 +848,13 @@
<_disp CLK_ACLK_XIU_DECON1X>,
<_disp CLK_PCLK_SMMU_DECON1X>,
<_disp CLK_SCLK_DECON_VCLK>,
-   <_disp CLK_SCLK_DECON_ECLK>;
+   <_disp CLK_SCLK_DECON_ECLK>,
+   <_disp CLK_SCLK_DSD>;
clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
"aclk_xiu_decon0x", "pclk_smmu_decon0x",
"aclk_smmu_decon1x", "aclk_xiu_decon1x",
"pclk_smmu_decon1x", "sclk_decon_vclk",
-   "sclk_decon_eclk";
+   "sclk_decon_eclk", "dsd";
power-domains = <_disp>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = ,
@@ -890,12 +891,13 @@
 <_disp CLK_ACLK_XIU_TV1X>,
 <_disp CLK_PCLK_SMMU_TV1X>,
 <_disp CLK_SCLK_DECON_TV_VCLK>,
-<_disp CLK_SCLK_DECON_TV_ECLK>;
+<_disp CLK_SCLK_DECON_TV_ECLK>,
+<_disp CLK_SCLK_DSD>;
clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
  "aclk_xiu_decon0x", "pclk_smmu_decon0x",
  "aclk_smmu_decon1x", "aclk_xiu_decon1x",
  "pclk_smmu_decon1x", "sclk_decon_vclk",
- "sclk_decon_eclk";
+ "sclk_decon_eclk", "dsd";
samsung,disp-sysreg = <_disp>;
power-domains = <_disp>;
interrupt-names = "fifo", "vsync", "lcd_sys";
@@ -1022,11 +1024,12 @@
reg = <0x13c0 0x1000>;
interrupts = ;
clock-names = "pclk", "aclk", "aclk_xiu",
- "aclk_gsclbend";
+ "aclk_gsclbend", "gsd";
clocks = <_gscl CLK_PCLK_GSCL0>,
 <_gscl CLK_ACLK_GSCL0>,
 <_gscl CLK_ACLK_XIU_GSCLX>,
-<_gscl CLK_ACLK_GSCLBEND_333>;
+<_gscl CLK_ACLK_GSCLBEND_333>,
+<_gscl CLK_ACLK_GSD>;
iommus = <_gscl0>;
power-domains = <_gscl>;
};
@@ -1036,11 +1039,12 @@
reg = <0x13c1 0x1000>;
interrupts = ;
clock-names = "pclk", "aclk", "aclk_xiu",
- "aclk_gsclbend";
+ "aclk_gsclbend", "gsd";
clocks = <_gscl CLK_PCLK_GSCL1>,
 <_gscl CLK_ACLK_GSCL1>,
 <_gscl CLK_ACLK_XIU_GSCLX>,
-<_gscl CLK_ACLK_GSCLBEND_333>;
+<_gscl CLK_ACLK_GSCLBEND_333>,
+<_gscl CLK_ACLK_GSD>;
iommus = <_gscl1>;
power-domains = <_gscl>;
};
@@ -1050,11 +1054,12 @@
reg = <0x13c2 0x1000>;
interrupts = ;
clock-names = "pclk", "aclk", "aclk_xiu",
- "aclk_gsclbend";
+ "aclk_gsclbend", "gsd";
clocks = <_gscl CLK_PCLK_GSCL2>,
 <_gscl CLK_ACLK_GSCL2>,
 <_gscl CLK_ACLK_XIU_GSCLX>,
-<_gscl CLK_ACLK_GSCLBEND_333>;
+<_gscl CLK_ACLK_GSCLBEND_333>,
+<_gscl CLK_ACLK_GSD>;
iommus = <_gscl2>;
power-domains = <_gscl>;
};
-- 
2.17.1

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