[PATCH 2/2] drm/bridge: Add IT6151 bridge driver

2015-03-12 Thread Heiko Stuebner
Am Donnerstag, 12. März 2015, 10:00:47 schrieb Paul Bolle:
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/it6151.c
> > 
> > +#include 
> 
> This file can only be built-in. So I couldn't help but notice this
> include. And if I remove it
> make drivers/gpu/drm/bridge/it6151.o
> 
> still runs without warning or errors. Unless I've missed something
> non-obvious I'd say it is not needed.

I think the more interesting question would be, why can it only be built in 
:-) .

The drm/bridge series from Ajay Kumar [0] made it into 4.0-rc that enables 
drm-bridges to be regular platform/i2c devices, see [1] for example.

So I think any new bridge driver should use this approach and can thus also be 
build as module.


Heiko


[0] http://www.spinics.net/lists/linux-samsung-soc/msg41403.html
[1] http://www.spinics.net/lists/linux-samsung-soc/msg41406.html



[PATCH 2/2] drm/bridge: Add IT6151 bridge driver

2015-03-12 Thread Paul Bolle
Just a few nits, I'm afraid.

On Wed, 2015-03-11 at 14:18 +0800, CK Hu wrote:
>  drivers/gpu/drm/bridge/Kconfig  |  10 +
>  drivers/gpu/drm/bridge/Makefile |   1 +

I applied 1/2 and 2/2 on top of next-20150312 to check a trivial issue.
The chunks for these two files needed context changes to git this patch
applied.

>  drivers/gpu/drm/bridge/it6151.c | 601 
> 
>  include/drm/bridge/it6151.h |  34 +++
>  4 files changed, 646 insertions(+)
>  create mode 100644 drivers/gpu/drm/bridge/it6151.c
>  create mode 100644 include/drm/bridge/it6151.h

> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index f38bbcd..2b3a78e 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -11,3 +11,13 @@ config DRM_PTN3460
>   select DRM_PANEL
>   ---help---
> ptn3460 eDP-LVDS bridge chip driver.
> +
> +config DRM_IT6151
> + bool "Enable IT6151FN : MIPI to eDP Converter"
> + depends on DRM
> + select DRM_KMS_HELPER
> + help
> +   Choose this option if you have IT6151 for display
> +   The IT6151 is a high-performance and low-power
> +   MIPI to eDP converter
> +

(This empty line makes git am whine: "new blank line at EOF.".)

> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/it6151.c

> +#include 

This file can only be built-in. So I couldn't help but notice this
include. And if I remove it
make drivers/gpu/drm/bridge/it6151.o

still runs without warning or errors. Unless I've missed something
non-obvious I'd say it is not needed.

> +

(Empty line at end of file.)

> --- /dev/null
> +++ b/include/drm/bridge/it6151.h

> +

(Another empty line at end of file.)


Paul Bolle



[PATCH 2/2] drm/bridge: Add IT6151 bridge driver

2015-03-11 Thread CK Hu
This patch adds a drm_bridge driver for the IT6151 MIPI to eDP
bridge chip.

Signed-off-by: CK Hu 
Signed-off-by: Jitao Shi 
---
 drivers/gpu/drm/bridge/Kconfig  |  10 +
 drivers/gpu/drm/bridge/Makefile |   1 +
 drivers/gpu/drm/bridge/it6151.c | 601 
 include/drm/bridge/it6151.h |  34 +++
 4 files changed, 646 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/it6151.c
 create mode 100644 include/drm/bridge/it6151.h

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index f38bbcd..2b3a78e 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -11,3 +11,13 @@ config DRM_PTN3460
select DRM_PANEL
---help---
  ptn3460 eDP-LVDS bridge chip driver.
+
+config DRM_IT6151
+   bool "Enable IT6151FN : MIPI to eDP Converter"
+   depends on DRM
+   select DRM_KMS_HELPER
+   help
+ Choose this option if you have IT6151 for display
+ The IT6151 is a high-performance and low-power
+ MIPI to eDP converter
+
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index d8a8cfd..98edb74 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -2,3 +2,4 @@ ccflags-y := -Iinclude/drm

 obj-$(CONFIG_DRM_PTN3460) += ptn3460.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_DRM_IT6151) += it6151.o
diff --git a/drivers/gpu/drm/bridge/it6151.c b/drivers/gpu/drm/bridge/it6151.c
new file mode 100644
index 000..039fe4b
--- /dev/null
+++ b/drivers/gpu/drm/bridge/it6151.c
@@ -0,0 +1,601 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+
+#define MIPI_RX_SW_RST0x05
+#define MIPI_RX_INT_MASK  0x09
+#define MIPI_RX_SYS_CFG   0x0c
+#define MIPI_RX_MCLK  0x11
+#define MIPI_RX_PHY_IF_1  0x19
+#define MIPI_RX_PKT_DEC   0x27
+#define MIPI_RX_UFO_BLK_HIGH  0x28
+#define MIPI_RX_UFO_BLK_LOW   0x29
+#define MIPI_RX_UFO_HDE_DELAY 0x2e
+#define MIPI_RX_UFO_RESYNC0x2f
+#define MIPI_RX_RESYNC_POL0x4e
+#define MIPI_RX_PCLK_HSCLK0x80
+#define MIPI_RX_AMP_TERM  0x84
+#define MIPI_RX_TIMER_INT_CNT 0x92
+
+#define DP_TX_VEN_ID_LOW0x00
+#define DP_TX_VEN_ID_HIGH   0x01
+#define DP_TX_DEV_ID_LOW0x02
+#define DP_TX_DEV_ID_HIGH   0x03
+#define DP_TX_REV_ID0x04
+#define DP_TX_SW_RST0x05
+#define DP_TX_INT_STA_0 0x06
+#define DP_TX_INT_STA_1 0x07
+#define DP_TX_INT_STA_2 0x08
+#define DP_TX_INT_MASK_00x09
+#define DP_TX_INT_MASK_10x0a
+#define DP_TX_INT_MASK_20x0b
+#define DP_TX_SYS_CFG   0x0c
+#define DP_TX_SYS_DBG   0x0f
+#define DP_TX_LANE  0x16
+#define DP_TX_TRAIN 0x17
+#define DP_TX_AUX_CH_FIFO   0x21
+#define DP_TX_AUX_CLK   0x22
+#define DP_TX_PC_REQ_FIFO   0x23
+#define DP_TX_PC_REQ_OFST_0 0x24
+#define DP_TX_PC_REQ_OFST_1 0x25
+#define DP_TX_PC_REQ_OFST_2 0x26
+#define DP_TX_PC_REQ_WD_0   0x27
+#define DP_TX_PC_REQ_SEL0x2b
+#define DP_TX_HDP   0x3a
+#define DP_TX_LNPWDB0x5c
+#define DP_TX_EQ0x5f
+#define DP_TX_COL_CONV_19   0x76
+#define DP_TX_COL_CONV_20   0x77
+#define DP_TX_PG_H_DE_END_L 0x7e
+#define DP_TX_PG_H_DE_END_H 0x7f
+#define DP_TX_PG_H_SYNC_START_L 0x80
+#define DP_TX_PG_H_SYNC_START_H 0x81
+#define DP_TX_PG_H_SYNC_END_L   0x82
+#define DP_TX_PG_H_SYNC_END_H   0x83
+#define DP_TX_PG_V_DE_END_L 0x88
+#define DP_TX_PG_V_DE_END_H 0x89
+#define DP_TX_PG_V_DE_START_L   0x8a
+#define DP_TX_IN_VDO_TM_15  0xb5
+#define DP_TX_IN_VDO_TM_17  0xb7
+#define DP_TX_PSR_CTRL_00xc4
+#define DP_TX_PSR_CTRL_10xc5
+#define DP_TX_HDP_IRQ_TM0xc9
+#define DP_TX_AUX_DBG   0xca
+#define DP_TX_AUX_MASTER0xcb
+#define DP_TX_PKT_OPT   0xce
+#define DP_TX_VDO_FIFO  0xd3
+#define DP_TX_VDO_STMP  0xd4
+#define DP_TX_PKT   0xe8
+#define DP_TX_PKT_AVI_VIC   0xec
+#define DP_TX_MIPI_PORT 0xfd
+
+enum {
+   MIPI_1_LANE = 0,
+   MIPI_2_LANE = 1,
+   MIPI_3_LANE = 2,
+   MIPI_4_LANE = 3,
+};
+
+enum {
+   RGB_24b = 0x3E,
+   RGB_30b = 0x0D,
+   RGB_36b = 0x1D,
+   RGB_18b_P   = 0x1E,
+   

[PATCH 2/2] drm/bridge: Add IT6151 bridge driver

2015-03-11 Thread CK Hu
This patch adds a drm_bridge driver for the IT6151 MIPI to eDP
bridge chip.

Signed-off-by: CK Hu 
Signed-off-by: Jitao Shi 
---
 drivers/gpu/drm/bridge/Kconfig  |  10 +
 drivers/gpu/drm/bridge/Makefile |   1 +
 drivers/gpu/drm/bridge/it6151.c | 601 
 include/drm/bridge/it6151.h |  34 +++
 4 files changed, 646 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/it6151.c
 create mode 100644 include/drm/bridge/it6151.h

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index f38bbcd..2b3a78e 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -11,3 +11,13 @@ config DRM_PTN3460
select DRM_PANEL
---help---
  ptn3460 eDP-LVDS bridge chip driver.
+
+config DRM_IT6151
+   bool "Enable IT6151FN : MIPI to eDP Converter"
+   depends on DRM
+   select DRM_KMS_HELPER
+   help
+ Choose this option if you have IT6151 for display
+ The IT6151 is a high-performance and low-power
+ MIPI to eDP converter
+
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index d8a8cfd..98edb74 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -2,3 +2,4 @@ ccflags-y := -Iinclude/drm

 obj-$(CONFIG_DRM_PTN3460) += ptn3460.o
 obj-$(CONFIG_DRM_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_DRM_IT6151) += it6151.o
diff --git a/drivers/gpu/drm/bridge/it6151.c b/drivers/gpu/drm/bridge/it6151.c
new file mode 100644
index 000..039fe4b
--- /dev/null
+++ b/drivers/gpu/drm/bridge/it6151.c
@@ -0,0 +1,601 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+
+#define MIPI_RX_SW_RST0x05
+#define MIPI_RX_INT_MASK  0x09
+#define MIPI_RX_SYS_CFG   0x0c
+#define MIPI_RX_MCLK  0x11
+#define MIPI_RX_PHY_IF_1  0x19
+#define MIPI_RX_PKT_DEC   0x27
+#define MIPI_RX_UFO_BLK_HIGH  0x28
+#define MIPI_RX_UFO_BLK_LOW   0x29
+#define MIPI_RX_UFO_HDE_DELAY 0x2e
+#define MIPI_RX_UFO_RESYNC0x2f
+#define MIPI_RX_RESYNC_POL0x4e
+#define MIPI_RX_PCLK_HSCLK0x80
+#define MIPI_RX_AMP_TERM  0x84
+#define MIPI_RX_TIMER_INT_CNT 0x92
+
+#define DP_TX_VEN_ID_LOW0x00
+#define DP_TX_VEN_ID_HIGH   0x01
+#define DP_TX_DEV_ID_LOW0x02
+#define DP_TX_DEV_ID_HIGH   0x03
+#define DP_TX_REV_ID0x04
+#define DP_TX_SW_RST0x05
+#define DP_TX_INT_STA_0 0x06
+#define DP_TX_INT_STA_1 0x07
+#define DP_TX_INT_STA_2 0x08
+#define DP_TX_INT_MASK_00x09
+#define DP_TX_INT_MASK_10x0a
+#define DP_TX_INT_MASK_20x0b
+#define DP_TX_SYS_CFG   0x0c
+#define DP_TX_SYS_DBG   0x0f
+#define DP_TX_LANE  0x16
+#define DP_TX_TRAIN 0x17
+#define DP_TX_AUX_CH_FIFO   0x21
+#define DP_TX_AUX_CLK   0x22
+#define DP_TX_PC_REQ_FIFO   0x23
+#define DP_TX_PC_REQ_OFST_0 0x24
+#define DP_TX_PC_REQ_OFST_1 0x25
+#define DP_TX_PC_REQ_OFST_2 0x26
+#define DP_TX_PC_REQ_WD_0   0x27
+#define DP_TX_PC_REQ_SEL0x2b
+#define DP_TX_HDP   0x3a
+#define DP_TX_LNPWDB0x5c
+#define DP_TX_EQ0x5f
+#define DP_TX_COL_CONV_19   0x76
+#define DP_TX_COL_CONV_20   0x77
+#define DP_TX_PG_H_DE_END_L 0x7e
+#define DP_TX_PG_H_DE_END_H 0x7f
+#define DP_TX_PG_H_SYNC_START_L 0x80
+#define DP_TX_PG_H_SYNC_START_H 0x81
+#define DP_TX_PG_H_SYNC_END_L   0x82
+#define DP_TX_PG_H_SYNC_END_H   0x83
+#define DP_TX_PG_V_DE_END_L 0x88
+#define DP_TX_PG_V_DE_END_H 0x89
+#define DP_TX_PG_V_DE_START_L   0x8a
+#define DP_TX_IN_VDO_TM_15  0xb5
+#define DP_TX_IN_VDO_TM_17  0xb7
+#define DP_TX_PSR_CTRL_00xc4
+#define DP_TX_PSR_CTRL_10xc5
+#define DP_TX_HDP_IRQ_TM0xc9
+#define DP_TX_AUX_DBG   0xca
+#define DP_TX_AUX_MASTER0xcb
+#define DP_TX_PKT_OPT   0xce
+#define DP_TX_VDO_FIFO  0xd3
+#define DP_TX_VDO_STMP  0xd4
+#define DP_TX_PKT   0xe8
+#define DP_TX_PKT_AVI_VIC   0xec
+#define DP_TX_MIPI_PORT 0xfd
+
+enum {
+   MIPI_1_LANE = 0,
+   MIPI_2_LANE = 1,
+   MIPI_3_LANE = 2,
+   MIPI_4_LANE = 3,
+};
+
+enum {
+   RGB_24b = 0x3E,
+   RGB_30b = 0x0D,
+   RGB_36b = 0x1D,
+   RGB_18b_P   = 0x1E,
+