Re: [PATCH 2/2] drm/ttm: merge offset and base in ttm_bus_placement

2020-09-07 Thread Dave Airlie 
I'd written something similar but didn't finish it!

For the series,

Reviewed-by: Dave Airlie 

On Mon, 7 Sep 2020 at 23:29, Christian König
 wrote:
>
> This is used by TTM to communicate the physical address
> which should be used with ioremap(), ioremap_wc(). We don't
> need to separate the base and offset in any way here.
>
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c|  7 ---
>  drivers/gpu/drm/drm_gem_ttm_helper.c   |  5 +
>  drivers/gpu/drm/drm_gem_vram_helper.c  |  3 +--
>  drivers/gpu/drm/nouveau/nouveau_bo.c   |  9 -
>  drivers/gpu/drm/nouveau/nouveau_fbcon.c|  3 +--
>  drivers/gpu/drm/qxl/qxl_ttm.c  |  7 +++
>  drivers/gpu/drm/radeon/radeon_ttm.c| 14 ++
>  drivers/gpu/drm/ttm/ttm_bo.c   |  3 ---
>  drivers/gpu/drm/ttm/ttm_bo_util.c  | 17 ++---
>  drivers/gpu/drm/ttm/ttm_bo_vm.c|  3 +--
>  drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c |  4 ++--
>  include/drm/ttm/ttm_resource.h |  6 ++
>  12 files changed, 31 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 46d620817482..b39d2a834340 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -773,7 +773,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device 
> *bdev, struct ttm_reso
> mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr +
> mem->bus.offset;
>
> -   mem->bus.base = adev->gmc.aper_base;
> +   mem->bus.offset += adev->gmc.aper_base;
> mem->bus.is_iomem = true;
> break;
> default:
> @@ -785,12 +785,13 @@ static int amdgpu_ttm_io_mem_reserve(struct 
> ttm_bo_device *bdev, struct ttm_reso
>  static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
>unsigned long page_offset)
>  {
> +   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
> uint64_t offset = (page_offset << PAGE_SHIFT);
> struct drm_mm_node *mm;
>
> mm = amdgpu_find_mm_node(&bo->mem, &offset);
> -   return (bo->mem.bus.base >> PAGE_SHIFT) + mm->start +
> -   (offset >> PAGE_SHIFT);
> +   offset += adev->gmc.aper_base;
> +   return mm->start + (offset >> PAGE_SHIFT);
>  }
>
>  /**
> diff --git a/drivers/gpu/drm/drm_gem_ttm_helper.c 
> b/drivers/gpu/drm/drm_gem_ttm_helper.c
> index 892b2288a104..0e4fb9ba43ad 100644
> --- a/drivers/gpu/drm/drm_gem_ttm_helper.c
> +++ b/drivers/gpu/drm/drm_gem_ttm_helper.c
> @@ -43,12 +43,9 @@ void drm_gem_ttm_print_info(struct drm_printer *p, 
> unsigned int indent,
> drm_print_bits(p, bo->mem.placement, plname, ARRAY_SIZE(plname));
> drm_printf(p, "\n");
>
> -   if (bo->mem.bus.is_iomem) {
> -   drm_printf_indent(p, indent, "bus.base=%lx\n",
> - (unsigned long)bo->mem.bus.base);
> +   if (bo->mem.bus.is_iomem)
> drm_printf_indent(p, indent, "bus.offset=%lx\n",
>   (unsigned long)bo->mem.bus.offset);
> -   }
>  }
>  EXPORT_SYMBOL(drm_gem_ttm_print_info);
>
> diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c 
> b/drivers/gpu/drm/drm_gem_vram_helper.c
> index 545a877406f4..255560591916 100644
> --- a/drivers/gpu/drm/drm_gem_vram_helper.c
> +++ b/drivers/gpu/drm/drm_gem_vram_helper.c
> @@ -1042,8 +1042,7 @@ static int bo_driver_io_mem_reserve(struct 
> ttm_bo_device *bdev,
> case TTM_PL_SYSTEM: /* nothing to do */
> break;
> case TTM_PL_VRAM:
> -   mem->bus.offset = mem->start << PAGE_SHIFT;
> -   mem->bus.base = vmm->vram_base;
> +   mem->bus.offset = (mem->start << PAGE_SHIFT) + vmm->vram_base;
> mem->bus.is_iomem = true;
> break;
> default:
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c 
> b/drivers/gpu/drm/nouveau/nouveau_bo.c
> index f74988771ed8..4c2cc862eb19 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
> @@ -1081,8 +1081,8 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, 
> struct ttm_resource *reg)
> case TTM_PL_TT:
>  #if IS_ENABLED(CONFIG_AGP)
> if (drm->agp.bridge) {
> -   reg->bus.offset = reg->start << PAGE_SHIFT;
> -   reg->bus.base = drm->agp.base;
> +   reg->bus.offset = (reg->start << PAGE_SHIFT) +
> +   drm->agp.base;
> reg->bus.is_iomem = !drm->agp.cma;
> }
>  #endif
> @@ -1094,8 +1094,8 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, 
> struct ttm_resource *reg)
> }
> fallthrough;/* tiled memo

[PATCH 2/2] drm/ttm: merge offset and base in ttm_bus_placement

2020-09-07 Thread Christian König 
This is used by TTM to communicate the physical address
which should be used with ioremap(), ioremap_wc(). We don't
need to separate the base and offset in any way here.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c|  7 ---
 drivers/gpu/drm/drm_gem_ttm_helper.c   |  5 +
 drivers/gpu/drm/drm_gem_vram_helper.c  |  3 +--
 drivers/gpu/drm/nouveau/nouveau_bo.c   |  9 -
 drivers/gpu/drm/nouveau/nouveau_fbcon.c|  3 +--
 drivers/gpu/drm/qxl/qxl_ttm.c  |  7 +++
 drivers/gpu/drm/radeon/radeon_ttm.c| 14 ++
 drivers/gpu/drm/ttm/ttm_bo.c   |  3 ---
 drivers/gpu/drm/ttm/ttm_bo_util.c  | 17 ++---
 drivers/gpu/drm/ttm/ttm_bo_vm.c|  3 +--
 drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c |  4 ++--
 include/drm/ttm/ttm_resource.h |  6 ++
 12 files changed, 31 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 46d620817482..b39d2a834340 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -773,7 +773,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device 
*bdev, struct ttm_reso
mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr +
mem->bus.offset;
 
-   mem->bus.base = adev->gmc.aper_base;
+   mem->bus.offset += adev->gmc.aper_base;
mem->bus.is_iomem = true;
break;
default:
@@ -785,12 +785,13 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device 
*bdev, struct ttm_reso
 static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
   unsigned long page_offset)
 {
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
uint64_t offset = (page_offset << PAGE_SHIFT);
struct drm_mm_node *mm;
 
mm = amdgpu_find_mm_node(&bo->mem, &offset);
-   return (bo->mem.bus.base >> PAGE_SHIFT) + mm->start +
-   (offset >> PAGE_SHIFT);
+   offset += adev->gmc.aper_base;
+   return mm->start + (offset >> PAGE_SHIFT);
 }
 
 /**
diff --git a/drivers/gpu/drm/drm_gem_ttm_helper.c 
b/drivers/gpu/drm/drm_gem_ttm_helper.c
index 892b2288a104..0e4fb9ba43ad 100644
--- a/drivers/gpu/drm/drm_gem_ttm_helper.c
+++ b/drivers/gpu/drm/drm_gem_ttm_helper.c
@@ -43,12 +43,9 @@ void drm_gem_ttm_print_info(struct drm_printer *p, unsigned 
int indent,
drm_print_bits(p, bo->mem.placement, plname, ARRAY_SIZE(plname));
drm_printf(p, "\n");
 
-   if (bo->mem.bus.is_iomem) {
-   drm_printf_indent(p, indent, "bus.base=%lx\n",
- (unsigned long)bo->mem.bus.base);
+   if (bo->mem.bus.is_iomem)
drm_printf_indent(p, indent, "bus.offset=%lx\n",
  (unsigned long)bo->mem.bus.offset);
-   }
 }
 EXPORT_SYMBOL(drm_gem_ttm_print_info);
 
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c 
b/drivers/gpu/drm/drm_gem_vram_helper.c
index 545a877406f4..255560591916 100644
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -1042,8 +1042,7 @@ static int bo_driver_io_mem_reserve(struct ttm_bo_device 
*bdev,
case TTM_PL_SYSTEM: /* nothing to do */
break;
case TTM_PL_VRAM:
-   mem->bus.offset = mem->start << PAGE_SHIFT;
-   mem->bus.base = vmm->vram_base;
+   mem->bus.offset = (mem->start << PAGE_SHIFT) + vmm->vram_base;
mem->bus.is_iomem = true;
break;
default:
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c 
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index f74988771ed8..4c2cc862eb19 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1081,8 +1081,8 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, 
struct ttm_resource *reg)
case TTM_PL_TT:
 #if IS_ENABLED(CONFIG_AGP)
if (drm->agp.bridge) {
-   reg->bus.offset = reg->start << PAGE_SHIFT;
-   reg->bus.base = drm->agp.base;
+   reg->bus.offset = (reg->start << PAGE_SHIFT) +
+   drm->agp.base;
reg->bus.is_iomem = !drm->agp.cma;
}
 #endif
@@ -1094,8 +1094,8 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, 
struct ttm_resource *reg)
}
fallthrough;/* tiled memory */
case TTM_PL_VRAM:
-   reg->bus.offset = reg->start << PAGE_SHIFT;
-   reg->bus.base = device->func->resource_addr(device, 1);
+   reg->bus.offset = (reg->start << PAGE_SHIFT) +
+   device->func->resource_addr(device, 1);
reg->bus.is_iomem = true;
if (drm->