[PATCH 2/3] drm/gma500: Code cleanup - style fixes
Code cleanup by following i915 constant/variable names and ordering
Code cleanup by following directions from kernel doc: Codingstyle
Code cleanup by following directions from kernel doc: DRM
Signed-off-by: Arthur Borsboom
---
drivers/gpu/drm/gma500/psb_drv.c | 135 +++
drivers/gpu/drm/gma500/psb_drv.h | 22 +++
2 files changed, 77 insertions(+), 80 deletions(-)
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index a10db3d..1708cca 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -37,9 +37,11 @@
#include
#include
+static struct drm_driver driver;
+
static int drm_psb_trap_pagefaults;
-static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
+static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id
*ent);
MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
@@ -49,44 +51,44 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
#if defined(CONFIG_DRM_GMA600)
- { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
/* Atom E620 */
- { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
+ { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
#endif
#if defined(CONFIG_DRM_MEDFIELD)
- {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
+ { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
#endif
#if defined(CONFIG_DRM_GMA3600)
- { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
[PATCH 2/3] drm/gma500: Code cleanup - style fixes
On Thu, Mar 13, 2014 at 10:49 PM, Arthur Borsboom
wrote:
> Cleanup of code by following i915 constant/variable names and ordering
> Cleanup of code by following directions from kernel documentation: Codingstyle
> Cleanup of code by following directions from kernel documentation: DRM
~72 col lines are preferred for commit messages. It makes git log look better.
Run "git log" and you'll see when it's ok to make exceptions.
>
> Signed-off-by: Arthur Borsboom
> ---
> drivers/gpu/drm/gma500/psb_drv.c | 132
> +++
> drivers/gpu/drm/gma500/psb_drv.h | 39
> 2 files changed, 77 insertions(+), 94 deletions(-)
>
> diff --git a/drivers/gpu/drm/gma500/psb_drv.c
> b/drivers/gpu/drm/gma500/psb_drv.c
> index 5c6cdd0..ae95e31 100644
> --- a/drivers/gpu/drm/gma500/psb_drv.c
> +++ b/drivers/gpu/drm/gma500/psb_drv.c
> @@ -37,9 +37,11 @@
> #include
> #include
>
> +static struct drm_driver driver;
> +
> static int drm_psb_trap_pagefaults;
>
> -static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
> +static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id
> *ent);
>
> MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
> module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
> @@ -62,44 +64,43 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
> { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops
> },
> { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops
> },
> #if defined(CONFIG_DRM_GMA600)
> - { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - /* Atom E620 */
> - { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> + { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> #endif
> #if defined(CONFIG_DRM_MEDFIELD)
> - {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> + { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> #endif
> #if defined(CONFIG_DRM_GMA3600)
> - { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
[PATCH 2/3] drm/gma500: Code cleanup - style fixes
Cleanup of code by following i915 constant/variable names and ordering
Cleanup of code by following directions from kernel documentation: Codingstyle
Cleanup of code by following directions from kernel documentation: DRM
Signed-off-by: Arthur Borsboom
---
drivers/gpu/drm/gma500/psb_drv.c | 132 +++
drivers/gpu/drm/gma500/psb_drv.h | 39
2 files changed, 77 insertions(+), 94 deletions(-)
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index 5c6cdd0..ae95e31 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -37,9 +37,11 @@
#include
#include
+static struct drm_driver driver;
+
static int drm_psb_trap_pagefaults;
-static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
+static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id
*ent);
MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
@@ -62,44 +64,43 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
#if defined(CONFIG_DRM_GMA600)
- { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
- /* Atom E620 */
- { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops},
+ { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
+ { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
&oaktrail_chip_ops },
#endif
#if defined(CONFIG_DRM_MEDFIELD)
- {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
- {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
+ { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
+ { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops
},
#endif
#if defined(CONFIG_DRM_GMA3600)
- { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
- { 0x8086, 0x0b
