[PATCH 2/5 v4] drm: Add DT bindings documentation for ARC PGU display controller

[Rob Herring]

On Thu, Mar 24, 2016 at 07:48:33PM +0300, Alexey Brodkin wrote:
> This add DT bindings documentation for ARC PGU display controller.
> 
> Signed-off-by: Alexey Brodkin 
> Cc: Rob Herring 
> Cc: Pawel Moll 
> Cc: Mark Rutland 
> Cc: Ian Campbell 
> Cc: Kumar Gala 
> Cc: devicetree at vger.kernel.org
> Cc: linux-snps-arc at lists.infradead.org
> ---
> 
> Changes v3 -> v4: (addressing Rob's comments)
>  * Removed "encoder-slave" from required properties
>  * Removed "0x" from node names
> 
> Changes v2 -> v3:
>  * Reverted back to initial larger version of example
>with minor fixes (thanks Rob for spotting those).
> 
> Changes v1 -> v2:
>  * Removed everything except PGU node itself.
> 
>  .../devicetree/bindings/display/snps,arcpgu.txt| 71 
> ++
>  1 file changed, 71 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/snps,arcpgu.txt
> 
> diff --git a/Documentation/devicetree/bindings/display/snps,arcpgu.txt 
> b/Documentation/devicetree/bindings/display/snps,arcpgu.txt
> new file mode 100644
> index 000..b126577
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/snps,arcpgu.txt
> @@ -0,0 +1,71 @@
> +ARC PGU
> +
> +This is a display controller found on several development boards produced
> +by Synopsys. The ARC PGU is an RGB streamer that reads the data from a
> +framebuffer and sends it to a single digital encoder (usually HDMI).
> +
> +Required properties:
> +  - compatible: "snps,arcpgu"
> +  - reg: Physical base address and length of the controller's registers.
> +  - clocks: A list of phandle + clock-specifier pairs, one for each
> +entry in 'clock-names'.
> +  - clock-names: A list of clock names. For ARC PGU it should contain:
> +  - "pxlclk" for the clock feeding the output PLL of the controller.
> +
> +Required sub-nodes:
> +  - port: The PGU connection to an encoder chip.
> +
> +Example:
> +
> +/ {
> + ...
> +
> + pgu at  {
> + compatible = "snps,arcpgu";
> + reg = <0x 0x400>;
> + clocks = <_node>;
> + clock-names = "pxlclk";
> + encoder-slave = <_node>;

Still in the example...

Otherwise,

Acked-by: Rob Herring 

[PATCH 2/5 v4] drm: Add DT bindings documentation for ARC PGU display controller

[Alexey Brodkin]

This add DT bindings documentation for ARC PGU display controller.

Signed-off-by: Alexey Brodkin 
Cc: Rob Herring 
Cc: Pawel Moll 
Cc: Mark Rutland 
Cc: Ian Campbell 
Cc: Kumar Gala 
Cc: devicetree at vger.kernel.org
Cc: linux-snps-arc at lists.infradead.org
---

Changes v3 -> v4: (addressing Rob's comments)
 * Removed "encoder-slave" from required properties
 * Removed "0x" from node names

Changes v2 -> v3:
 * Reverted back to initial larger version of example
   with minor fixes (thanks Rob for spotting those).

Changes v1 -> v2:
 * Removed everything except PGU node itself.

 .../devicetree/bindings/display/snps,arcpgu.txt| 71 ++
 1 file changed, 71 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/snps,arcpgu.txt

diff --git a/Documentation/devicetree/bindings/display/snps,arcpgu.txt 
b/Documentation/devicetree/bindings/display/snps,arcpgu.txt
new file mode 100644
index 000..b126577
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/snps,arcpgu.txt
@@ -0,0 +1,71 @@
+ARC PGU
+
+This is a display controller found on several development boards produced
+by Synopsys. The ARC PGU is an RGB streamer that reads the data from a
+framebuffer and sends it to a single digital encoder (usually HDMI).
+
+Required properties:
+  - compatible: "snps,arcpgu"
+  - reg: Physical base address and length of the controller's registers.
+  - clocks: A list of phandle + clock-specifier pairs, one for each
+entry in 'clock-names'.
+  - clock-names: A list of clock names. For ARC PGU it should contain:
+  - "pxlclk" for the clock feeding the output PLL of the controller.
+
+Required sub-nodes:
+  - port: The PGU connection to an encoder chip.
+
+Example:
+
+/ {
+   ...
+
+   pgu at  {
+   compatible = "snps,arcpgu";
+   reg = <0x 0x400>;
+   clocks = <_node>;
+   clock-names = "pxlclk";
+   encoder-slave = <_node>;
+
+   port {
+   pgu_output: endpoint {
+   remote-endpoint = <_enc_input>;
+   };
+   };
+   };
+
+   /* HDMI encoder on I2C bus */
+   i2c at  {
+   compatible = "...";
+
+   encoder_node:hdmi at XX{
+   compatible="...";
+
+   ports {
+   port at 0 {
+   reg = <0>;
+   hdmi_enc_input:endpoint {
+   remote-endpoint = <_output>;
+   };
+   };
+
+   port at 1 {
+   reg = <1>;
+   hdmi_enc_output:endpoint {
+   remote-endpoint = 
<_connector_in>;
+   };
+   };
+   };
+   };
+   }
+
+   hdmi0: connector {
+   compatible = "hdmi-connector";
+
+   port {
+   hdmi_connector_in: endpoint {
+   remote-endpoint = <_enc_output>;
+   };
+   };
+   };
+};
-- 
2.5.0