Re: [PATCH 3/4] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains

[Matthias Kaehlcke]

On Tue, Jun 30, 2020 at 05:26:15PM +0530, Rajendra Nayak wrote:
> Add the OPP tables for DSI and MDP based on the perf state/clk
> requirements, and add the power-domains property to specify the
> scalable power domain.
> 
> Signed-off-by: Rajendra Nayak 
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 
> 
>  1 file changed, 59 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 8eb5a31..b6afeb2 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -3296,6 +3296,35 @@
>   #power-domain-cells = <1>;
>   };
>  
> + dsi_opp_table: dsi-opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-1920 {
> + opp-hz = /bits/ 64 <1920>;
> + required-opps = <_opp_min_svs>;
> + };
> +
> + opp-18000 {
> + opp-hz = /bits/ 64 <18000>;
> + required-opps = <_opp_low_svs>;
> + };
> +
> + opp-27500 {
> + opp-hz = /bits/ 64 <27500>;
> + required-opps = <_opp_svs>;
> + };
> +
> + opp-32858 {
> + opp-hz = /bits/ 64 <32858>;
> + required-opps = <_opp_svs_l1>;
> + };
> +
> + opp-35800 {
> + opp-hz = /bits/ 64 <35800>;
> + required-opps = <_opp_nom>;
> + };
> + };
> +

I still don't like the shared OPP tables to be positioned inmidst of the
device nodes, but it seems we currently don't have a better convention.

>   mdss: mdss@ae0 {
>   compatible = "qcom,sdm845-mdss";
>   reg = <0 0x0ae0 0 0x1000>;
> @@ -3340,6 +3369,8 @@
> < 
> DISP_CC_MDSS_VSYNC_CLK>;
>   assigned-clock-rates = <3>,
>  <1920>;
> + operating-points-v2 = <_opp_table>;
> + power-domains = < SDM845_CX>;
>  
>   interrupt-parent = <>;
>   interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> @@ -3364,6 +3395,30 @@
>   };
>   };
>   };
> +
> + mdp_opp_table: mdp-opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-1920 {
> + opp-hz = /bits/ 64 <1920>;
> + required-opps = 
> <_opp_min_svs>;
> + };
> +
> + opp-171428571 {
> + opp-hz = /bits/ 64 <171428571>;
> + required-opps = 
> <_opp_low_svs>;
> + };
> +
> + opp-34400 {
> + opp-hz = /bits/ 64 <34400>;
> + required-opps = 
> <_opp_svs_l1>;
> + };
> +
> + opp-43000 {
> + opp-hz = /bits/ 64 <43000>;
> + required-opps = 
> <_opp_nom>;
> + };
> + };
>   };
>  
>   dsi0: dsi@ae94000 {
> @@ -3386,6 +3441,8 @@
> "core",
> "iface",
> "bus";
> + operating-points-v2 = <_opp_table>;
> + power-domains = < SDM845_CX>;
>  
>   phys = <_phy>;
>   phy-names = "dsi";
> @@ -3450,6 +3507,8 @@
> "core",
> "iface",
> "bus";
> + operating-points-v2 = <_opp_table>;
> + power-domains = < SDM845_CX>;
>  
>   phys = <_phy>;
>   phy-names = "dsi";

Reviewed-by: Matthias Kaehlcke 
___

[PATCH 3/4] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains

[Rajendra Nayak]

Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.

Signed-off-by: Rajendra Nayak 
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 
 1 file changed, 59 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 8eb5a31..b6afeb2 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3296,6 +3296,35 @@
#power-domain-cells = <1>;
};
 
+   dsi_opp_table: dsi-opp-table {
+   compatible = "operating-points-v2";
+
+   opp-1920 {
+   opp-hz = /bits/ 64 <1920>;
+   required-opps = <_opp_min_svs>;
+   };
+
+   opp-18000 {
+   opp-hz = /bits/ 64 <18000>;
+   required-opps = <_opp_low_svs>;
+   };
+
+   opp-27500 {
+   opp-hz = /bits/ 64 <27500>;
+   required-opps = <_opp_svs>;
+   };
+
+   opp-32858 {
+   opp-hz = /bits/ 64 <32858>;
+   required-opps = <_opp_svs_l1>;
+   };
+
+   opp-35800 {
+   opp-hz = /bits/ 64 <35800>;
+   required-opps = <_opp_nom>;
+   };
+   };
+
mdss: mdss@ae0 {
compatible = "qcom,sdm845-mdss";
reg = <0 0x0ae0 0 0x1000>;
@@ -3340,6 +3369,8 @@
  < 
DISP_CC_MDSS_VSYNC_CLK>;
assigned-clock-rates = <3>,
   <1920>;
+   operating-points-v2 = <_opp_table>;
+   power-domains = < SDM845_CX>;
 
interrupt-parent = <>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
@@ -3364,6 +3395,30 @@
};
};
};
+
+   mdp_opp_table: mdp-opp-table {
+   compatible = "operating-points-v2";
+
+   opp-1920 {
+   opp-hz = /bits/ 64 <1920>;
+   required-opps = 
<_opp_min_svs>;
+   };
+
+   opp-171428571 {
+   opp-hz = /bits/ 64 <171428571>;
+   required-opps = 
<_opp_low_svs>;
+   };
+
+   opp-34400 {
+   opp-hz = /bits/ 64 <34400>;
+   required-opps = 
<_opp_svs_l1>;
+   };
+
+   opp-43000 {
+   opp-hz = /bits/ 64 <43000>;
+   required-opps = 
<_opp_nom>;
+   };
+   };
};
 
dsi0: dsi@ae94000 {
@@ -3386,6 +3441,8 @@
  "core",
  "iface",
  "bus";
+   operating-points-v2 = <_opp_table>;
+   power-domains = < SDM845_CX>;
 
phys = <_phy>;
phy-names = "dsi";
@@ -3450,6 +3507,8 @@
  "core",
  "iface",
  "bus";
+   operating-points-v2 = <_opp_table>;
+   power-domains = < SDM845_CX>;
 
phys = <_phy>;
phy-names = "dsi";
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel