[PATCH 4/4] drm/radeon: remove visible vram size limit on bo allocation (v3)

2014-07-22 Thread Michel Dänzer
On 19.07.2014 00:09, Alex Deucher wrote:
> Now that fallback to gtt is fixed for cpu access, we can
> remove this limit.
> 
> bug:
> https://bugs.freedesktop.org/show_bug.cgi?id=78717
> 
> v2: use new gart_pin_size to accurately track available gtt.
> v3: fix comment

[...]

> @@ -55,10 +55,14 @@ int radeon_gem_object_create(struct radeon_device *rdev, 
> int size,
>   alignment = PAGE_SIZE;
>   }
>  
> - /* maximun bo size is the minimun btw visible vram and gtt size */
> - max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
> + /* Maximum bo size is the unpinned gtt size since we use the gtt to
> +  * handle vram to system pool migrations.  We could probably remove
> +  * this check altogether with a little additional work to support
> +  * splitting vram <-> system transfers into multiple steps.
> +  */
> + max_size = rdev->mc.gtt_size - rdev->gart_pin_size;

Actually, the the check couldn't be removed even then, but would need to
be replaced by a check against the VRAM size or something like that.
Maybe just drop the second sentence of the comment?

Either way though, the series is

Reviewed-by: Michel D?nzer 


-- 
Earthling Michel D?nzer|  http://www.amd.com
Libre software enthusiast  |Mesa and X developer


[PATCH 4/4] drm/radeon: remove visible vram size limit on bo allocation (v3)

2014-07-22 Thread Alex Deucher
On Tue, Jul 22, 2014 at 5:14 AM, Michel D?nzer  wrote:
> On 19.07.2014 00:09, Alex Deucher wrote:
>> Now that fallback to gtt is fixed for cpu access, we can
>> remove this limit.
>>
>> bug:
>> https://bugs.freedesktop.org/show_bug.cgi?id=78717
>>
>> v2: use new gart_pin_size to accurately track available gtt.
>> v3: fix comment
>
> [...]
>
>> @@ -55,10 +55,14 @@ int radeon_gem_object_create(struct radeon_device *rdev, 
>> int size,
>>   alignment = PAGE_SIZE;
>>   }
>>
>> - /* maximun bo size is the minimun btw visible vram and gtt size */
>> - max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
>> + /* Maximum bo size is the unpinned gtt size since we use the gtt to
>> +  * handle vram to system pool migrations.  We could probably remove
>> +  * this check altogether with a little additional work to support
>> +  * splitting vram <-> system transfers into multiple steps.
>> +  */
>> + max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
>
> Actually, the the check couldn't be removed even then, but would need to
> be replaced by a check against the VRAM size or something like that.
> Maybe just drop the second sentence of the comment?

Done.

Thanks!

>
> Either way though, the series is
>
> Reviewed-by: Michel D?nzer 
>
>
> --
> Earthling Michel D?nzer|  http://www.amd.com
> Libre software enthusiast  |Mesa and X developer


[PATCH 4/4] drm/radeon: remove visible vram size limit on bo allocation (v3)

2014-07-18 Thread Alex Deucher
Now that fallback to gtt is fixed for cpu access, we can
remove this limit.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=78717

v2: use new gart_pin_size to accurately track available gtt.
v3: fix comment

Signed-off-by: Alex Deucher 
Reviewed-by: Christian K?nig 
---
 drivers/gpu/drm/radeon/radeon.h |  2 +-
 drivers/gpu/drm/radeon/radeon_gem.c | 14 +-
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d26c61c..e66f831 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -546,7 +546,7 @@ struct radeon_gem {

 int radeon_gem_init(struct radeon_device *rdev);
 void radeon_gem_fini(struct radeon_device *rdev);
-int radeon_gem_object_create(struct radeon_device *rdev, int size,
+int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
int alignment, int initial_domain,
u32 flags, bool discardable, bool kernel,
struct drm_gem_object **obj);
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c 
b/drivers/gpu/drm/radeon/radeon_gem.c
index 1ec6244..eafe316 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -40,7 +40,7 @@ void radeon_gem_object_free(struct drm_gem_object *gobj)
}
 }

-int radeon_gem_object_create(struct radeon_device *rdev, int size,
+int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
int alignment, int initial_domain,
u32 flags, bool discardable, bool kernel,
struct drm_gem_object **obj)
@@ -55,10 +55,14 @@ int radeon_gem_object_create(struct radeon_device *rdev, 
int size,
alignment = PAGE_SIZE;
}

-   /* maximun bo size is the minimun btw visible vram and gtt size */
-   max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
+   /* Maximum bo size is the unpinned gtt size since we use the gtt to
+* handle vram to system pool migrations.  We could probably remove
+* this check altogether with a little additional work to support
+* splitting vram <-> system transfers into multiple steps.
+*/
+   max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
if (size > max_size) {
-   DRM_DEBUG("Allocation size %dMb bigger than %ldMb limit\n",
+   DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
  size >> 20, max_size >> 20);
return -ENOMEM;
}
@@ -72,7 +76,7 @@ retry:
initial_domain |= RADEON_GEM_DOMAIN_GTT;
goto retry;
}
-   DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, 
%d)\n",
+   DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, 
%d)\n",
  size, initial_domain, alignment, r);
}
return r;
-- 
1.8.3.1