[PATCH RFC v2 05/14] ARM: imx6q: clk: Add the video_27m clock

[Liu Ying]

Hi Philipp,

On 12/18/2014 06:31 PM, Philipp Zabel wrote:
> Am Donnerstag, den 18.12.2014, 15:11 +0800 schrieb Liu Ying:
>> This patch supports the video_27m clock which is a fixed factor
>> clock of the pll3_pfd1_540m clock.
>>
>> Signed-off-by: Liu Ying 
>> ---
>> v1->v2:
>>   * None.
>>
>>   arch/arm/mach-imx/clk-imx6q.c | 1 +
>>   include/dt-bindings/clock/imx6qdl-clock.h | 3 ++-
>>   2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
>> index 4e79da7..9470df3 100644
>> --- a/arch/arm/mach-imx/clk-imx6q.c
>> +++ b/arch/arm/mach-imx/clk-imx6q.c
>> @@ -246,6 +246,7 @@ static void __init imx6q_clocks_init(struct device_node 
>> *ccm_node)
>>  clk[IMX6QDL_CLK_PLL3_60M]  = imx_clk_fixed_factor("pll3_60m",  
>> "pll3_usb_otg",   1, 8);
>>  clk[IMX6QDL_CLK_TWD]   = imx_clk_fixed_factor("twd",   "arm",   
>>  1, 2);
>>  clk[IMX6QDL_CLK_GPT_3M]= imx_clk_fixed_factor("gpt_3m","osc",   
>>  1, 8);
>> +clk[IMX6QDL_CLK_VIDEO_27M] = imx_clk_fixed_factor("video_27m", 
>> "pll3_pfd1_540m", 1, 20);
>
> The HDMI TX isfr clock input is sourced from video_27m, too, according
> to Table 33-1 "HDMI clocks".
> I think the parent of clk[IMX6QDL_CLK_HDMI_ISFR] should be changed from
> "pll3_pfd1_540m" to "video_27m", then.

I'll add a new patch in the next version to change the hdmi_isfr
clock's parent.

Thanks,
Liu Ying

>
> regards
> Philipp
>

[PATCH RFC v2 05/14] ARM: imx6q: clk: Add the video_27m clock

[Liu Ying]

This patch supports the video_27m clock which is a fixed factor
clock of the pll3_pfd1_540m clock.

Signed-off-by: Liu Ying 
---
v1->v2:
 * None.

 arch/arm/mach-imx/clk-imx6q.c | 1 +
 include/dt-bindings/clock/imx6qdl-clock.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 4e79da7..9470df3 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -246,6 +246,7 @@ static void __init imx6q_clocks_init(struct device_node 
*ccm_node)
clk[IMX6QDL_CLK_PLL3_60M]  = imx_clk_fixed_factor("pll3_60m",  
"pll3_usb_otg",   1, 8);
clk[IMX6QDL_CLK_TWD]   = imx_clk_fixed_factor("twd",   "arm",   
 1, 2);
clk[IMX6QDL_CLK_GPT_3M]= imx_clk_fixed_factor("gpt_3m","osc",   
 1, 8);
+   clk[IMX6QDL_CLK_VIDEO_27M] = imx_clk_fixed_factor("video_27m", 
"pll3_pfd1_540m", 1, 20);
if (cpu_is_imx6dl()) {
clk[IMX6QDL_CLK_GPU2D_AXI] = imx_clk_fixed_factor("gpu2d_axi", 
"mmdc_ch0_axi_podf", 1, 1);
clk[IMX6QDL_CLK_GPU3D_AXI] = imx_clk_fixed_factor("gpu3d_axi", 
"mmdc_ch0_axi_podf", 1, 1);
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h 
b/include/dt-bindings/clock/imx6qdl-clock.h
index b690cdb..25625bf 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -248,6 +248,7 @@
 #define IMX6QDL_PLL6_BYPASS235
 #define IMX6QDL_PLL7_BYPASS236
 #define IMX6QDL_CLK_GPT_3M 237
-#define IMX6QDL_CLK_END238
+#define IMX6QDL_CLK_VIDEO_27M  238
+#define IMX6QDL_CLK_END239

 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
-- 
2.1.0

[PATCH RFC v2 05/14] ARM: imx6q: clk: Add the video_27m clock

[Philipp Zabel]

Am Donnerstag, den 18.12.2014, 15:11 +0800 schrieb Liu Ying:
> This patch supports the video_27m clock which is a fixed factor
> clock of the pll3_pfd1_540m clock.
> 
> Signed-off-by: Liu Ying 
> ---
> v1->v2:
>  * None.
> 
>  arch/arm/mach-imx/clk-imx6q.c | 1 +
>  include/dt-bindings/clock/imx6qdl-clock.h | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index 4e79da7..9470df3 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -246,6 +246,7 @@ static void __init imx6q_clocks_init(struct device_node 
> *ccm_node)
>   clk[IMX6QDL_CLK_PLL3_60M]  = imx_clk_fixed_factor("pll3_60m",  
> "pll3_usb_otg",   1, 8);
>   clk[IMX6QDL_CLK_TWD]   = imx_clk_fixed_factor("twd",   "arm",   
>  1, 2);
>   clk[IMX6QDL_CLK_GPT_3M]= imx_clk_fixed_factor("gpt_3m","osc",   
>  1, 8);
> + clk[IMX6QDL_CLK_VIDEO_27M] = imx_clk_fixed_factor("video_27m", 
> "pll3_pfd1_540m", 1, 20);

The HDMI TX isfr clock input is sourced from video_27m, too, according
to Table 33-1 "HDMI clocks".
I think the parent of clk[IMX6QDL_CLK_HDMI_ISFR] should be changed from
"pll3_pfd1_540m" to "video_27m", then.

regards
Philipp