[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

2016-05-05 Thread Laxman Dewangan

On Thursday 05 May 2016 06:13 PM, Jon Hunter wrote:
> On 05/05/16 10:52, Laxman Dewangan wrote:
>> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
>>> On 04/05/16 12:39, Laxman Dewangan wrote:
 The function tegra_pmc_readl() returns the u32 type data and hence
 change the data type of variable where this data is stored to u32
 type.

 Signed-off-by: Laxman Dewangan 

 ---
 Changes from V1:
 -This is new in series as per discussion on V1 series to use u32 for
 tegra_pmc_readl.

 Changes from V2:
 - Make unsigned long to u32 for some missed variable from V1.
 ---
drivers/soc/tegra/pmc.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)

 diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
 index 2c3f1f9..eff9425 100644
 --- a/drivers/soc/tegra/pmc.c
 +++ b/drivers/soc/tegra/pmc.c
 @@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc
 *pmc)
static int tegra_io_rail_prepare(unsigned int id, unsigned long
 *request,
 unsigned long *status, unsigned int *bit)
{
 -unsigned long rate, value;
 +unsigned long rate;
 +u32 value;
  *bit = id % 32;
@@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int
 id, unsigned long *request,
tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
  /* must be at least 200 ns, in APB (PCLK) clock cycles */
 -value = DIV_ROUND_UP(10, rate);
 -value = DIV_ROUND_UP(200, value);
 +rate = DIV_ROUND_UP(10, rate);
 +rate = DIV_ROUND_UP(200, rate);
 +value = (u32)rate;
>>> Although it is unlikely, I think that we should check it is less
>>> than U32_MAX, return an error if it is not.
>> rate = DIV_ROUNC_UP(200, rate) means
>>
>> rate = (200 + rate -1)/rate
>>
>> and can not be more than 200 in any case (if rate =1).
>> So no need of the error check.
> OK, yes you are right. In that case there is no need to cast and so I
> would leave this code as-is and not change the type.
>

You mean keep value as unsigned long for value?

I think we can still say value as u32 and simply write
value = rate


Just remove the casting.


[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

2016-05-05 Thread Laxman Dewangan

On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
> On 04/05/16 12:39, Laxman Dewangan wrote:
>> The function tegra_pmc_readl() returns the u32 type data and hence
>> change the data type of variable where this data is stored to u32
>> type.
>>
>> Signed-off-by: Laxman Dewangan 
>>
>> ---
>> Changes from V1:
>> -This is new in series as per discussion on V1 series to use u32 for
>> tegra_pmc_readl.
>>
>> Changes from V2:
>> - Make unsigned long to u32 for some missed variable from V1.
>> ---
>>   drivers/soc/tegra/pmc.c | 24 ++--
>>   1 file changed, 14 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
>> index 2c3f1f9..eff9425 100644
>> --- a/drivers/soc/tegra/pmc.c
>> +++ b/drivers/soc/tegra/pmc.c
>> @@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc *pmc)
>>   static int tegra_io_rail_prepare(unsigned int id, unsigned long *request,
>>   unsigned long *status, unsigned int *bit)
>>   {
>> -unsigned long rate, value;
>> +unsigned long rate;
>> +u32 value;
>>   
>>  *bit = id % 32;
>>   
>> @@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int id, 
>> unsigned long *request,
>>  tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
>>   
>>  /* must be at least 200 ns, in APB (PCLK) clock cycles */
>> -value = DIV_ROUND_UP(10, rate);
>> -value = DIV_ROUND_UP(200, value);
>> +rate = DIV_ROUND_UP(10, rate);
>> +rate = DIV_ROUND_UP(200, rate);
>> +value = (u32)rate;
> Although it is unlikely, I think that we should check it is less
> than U32_MAX, return an error if it is not.

rate = DIV_ROUNC_UP(200, rate) means

rate = (200 + rate -1)/rate

and can not be more than 200 in any case (if rate =1).
So no need of the error check.





[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

2016-05-05 Thread Jon Hunter

On 05/05/16 13:35, Laxman Dewangan wrote:
> 
> On Thursday 05 May 2016 06:13 PM, Jon Hunter wrote:
>> On 05/05/16 10:52, Laxman Dewangan wrote:
>>> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
 On 04/05/16 12:39, Laxman Dewangan wrote:
> The function tegra_pmc_readl() returns the u32 type data and hence
> change the data type of variable where this data is stored to u32
> type.
>
> Signed-off-by: Laxman Dewangan 
>
> ---
> Changes from V1:
> -This is new in series as per discussion on V1 series to use u32 for
> tegra_pmc_readl.
>
> Changes from V2:
> - Make unsigned long to u32 for some missed variable from V1.
> ---
>drivers/soc/tegra/pmc.c | 24 ++--
>1 file changed, 14 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 2c3f1f9..eff9425 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc
> *pmc)
>static int tegra_io_rail_prepare(unsigned int id, unsigned long
> *request,
> unsigned long *status, unsigned int *bit)
>{
> -unsigned long rate, value;
> +unsigned long rate;
> +u32 value;
>  *bit = id % 32;
>@@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int
> id, unsigned long *request,
>tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
>  /* must be at least 200 ns, in APB (PCLK) clock cycles */
> -value = DIV_ROUND_UP(10, rate);
> -value = DIV_ROUND_UP(200, value);
> +rate = DIV_ROUND_UP(10, rate);
> +rate = DIV_ROUND_UP(200, rate);
> +value = (u32)rate;
 Although it is unlikely, I think that we should check it is less
 than U32_MAX, return an error if it is not.
>>> rate = DIV_ROUNC_UP(200, rate) means
>>>
>>> rate = (200 + rate -1)/rate
>>>
>>> and can not be more than 200 in any case (if rate =1).
>>> So no need of the error check.
>> OK, yes you are right. In that case there is no need to cast and so I
>> would leave this code as-is and not change the type.
>>
> 
> You mean keep value as unsigned long for value?

Yes.

> I think we can still say value as u32 and simply write
> value = rate
> 
> Just remove the casting.

I would not change this at all. I don't see any benefit.

Jon


[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

2016-05-05 Thread Jon Hunter

On 05/05/16 10:52, Laxman Dewangan wrote:
> 
> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
>> On 04/05/16 12:39, Laxman Dewangan wrote:
>>> The function tegra_pmc_readl() returns the u32 type data and hence
>>> change the data type of variable where this data is stored to u32
>>> type.
>>>
>>> Signed-off-by: Laxman Dewangan 
>>>
>>> ---
>>> Changes from V1:
>>> -This is new in series as per discussion on V1 series to use u32 for
>>> tegra_pmc_readl.
>>>
>>> Changes from V2:
>>> - Make unsigned long to u32 for some missed variable from V1.
>>> ---
>>>   drivers/soc/tegra/pmc.c | 24 ++--
>>>   1 file changed, 14 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
>>> index 2c3f1f9..eff9425 100644
>>> --- a/drivers/soc/tegra/pmc.c
>>> +++ b/drivers/soc/tegra/pmc.c
>>> @@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc
>>> *pmc)
>>>   static int tegra_io_rail_prepare(unsigned int id, unsigned long
>>> *request,
>>>unsigned long *status, unsigned int *bit)
>>>   {
>>> -unsigned long rate, value;
>>> +unsigned long rate;
>>> +u32 value;
>>> *bit = id % 32;
>>>   @@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int
>>> id, unsigned long *request,
>>>   tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
>>> /* must be at least 200 ns, in APB (PCLK) clock cycles */
>>> -value = DIV_ROUND_UP(10, rate);
>>> -value = DIV_ROUND_UP(200, value);
>>> +rate = DIV_ROUND_UP(10, rate);
>>> +rate = DIV_ROUND_UP(200, rate);
>>> +value = (u32)rate;
>> Although it is unlikely, I think that we should check it is less
>> than U32_MAX, return an error if it is not.
> 
> rate = DIV_ROUNC_UP(200, rate) means
> 
> rate = (200 + rate -1)/rate
> 
> and can not be more than 200 in any case (if rate =1).
> So no need of the error check.

OK, yes you are right. In that case there is no need to cast and so I
would leave this code as-is and not change the type.

Jon






[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

2016-05-05 Thread Jon Hunter

On 04/05/16 12:39, Laxman Dewangan wrote:
> The function tegra_pmc_readl() returns the u32 type data and hence
> change the data type of variable where this data is stored to u32
> type.
> 
> Signed-off-by: Laxman Dewangan 
> 
> ---
> Changes from V1:
> -This is new in series as per discussion on V1 series to use u32 for
> tegra_pmc_readl.
> 
> Changes from V2:
> - Make unsigned long to u32 for some missed variable from V1.
> ---
>  drivers/soc/tegra/pmc.c | 24 ++--
>  1 file changed, 14 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 2c3f1f9..eff9425 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc *pmc)
>  static int tegra_io_rail_prepare(unsigned int id, unsigned long *request,
>unsigned long *status, unsigned int *bit)
>  {
> - unsigned long rate, value;
> + unsigned long rate;
> + u32 value;
>  
>   *bit = id % 32;
>  
> @@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int id, 
> unsigned long *request,
>   tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
>  
>   /* must be at least 200 ns, in APB (PCLK) clock cycles */
> - value = DIV_ROUND_UP(10, rate);
> - value = DIV_ROUND_UP(200, value);
> + rate = DIV_ROUND_UP(10, rate);
> + rate = DIV_ROUND_UP(200, rate);
> + value = (u32)rate;

Although it is unlikely, I think that we should check it is less
than U32_MAX, return an error if it is not.

Cheers
Jon


[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

2016-05-04 Thread Laxman Dewangan
The function tegra_pmc_readl() returns the u32 type data and hence
change the data type of variable where this data is stored to u32
type.

Signed-off-by: Laxman Dewangan 

---
Changes from V1:
-This is new in series as per discussion on V1 series to use u32 for
tegra_pmc_readl.

Changes from V2:
- Make unsigned long to u32 for some missed variable from V1.
---
 drivers/soc/tegra/pmc.c | 24 ++--
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 2c3f1f9..eff9425 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc *pmc)
 static int tegra_io_rail_prepare(unsigned int id, unsigned long *request,
 unsigned long *status, unsigned int *bit)
 {
-   unsigned long rate, value;
+   unsigned long rate;
+   u32 value;

*bit = id % 32;

@@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int id, 
unsigned long *request,
tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);

/* must be at least 200 ns, in APB (PCLK) clock cycles */
-   value = DIV_ROUND_UP(10, rate);
-   value = DIV_ROUND_UP(200, value);
+   rate = DIV_ROUND_UP(10, rate);
+   rate = DIV_ROUND_UP(200, rate);
+   value = (u32)rate;
tegra_pmc_writel(value, SEL_DPD_TIM);

return 0;
 }

-static int tegra_io_rail_poll(unsigned long offset, unsigned long mask,
- unsigned long val, unsigned long timeout)
+static int tegra_io_rail_poll(unsigned long offset, u32 mask,
+ u32 val, unsigned long timeout)
 {
-   unsigned long value;
+   u32 value;

timeout = jiffies + msecs_to_jiffies(timeout);

@@ -900,8 +902,9 @@ static void tegra_io_rail_unprepare(void)

 int tegra_io_rail_power_on(unsigned int id)
 {
-   unsigned long request, status, value;
-   unsigned int bit, mask;
+   unsigned long request, status;
+   unsigned int bit;
+   u32 value, mask;
int err;

mutex_lock(>powergates_lock);
@@ -935,8 +938,9 @@ EXPORT_SYMBOL(tegra_io_rail_power_on);

 int tegra_io_rail_power_off(unsigned int id)
 {
-   unsigned long request, status, value;
-   unsigned int bit, mask;
+   unsigned long request, status;
+   unsigned int bit;
+   u32 value, mask;
int err;

mutex_lock(>powergates_lock);
-- 
2.1.4