Taken from the drm-next pull for 4.17-rc1 (694f54f680f7), and manually
reconciled:
core:
- Dropped DRM_MODE_TYPE_ALL and DRM_MODE_FLAG_ALL; these are purely
internal details of the bits accepted by the currently running
kernel, and can not be generally relied on by userspace
- Add HDCP flags
- Note CTM entry representation is sign-magnitude format, not
two's-complement
amdgpu:
- Add QUERY_STATE2 context op
- Add VCN firmware version query
etnaviv:
- Add more GPU feature flags
i915:
- Add caps, params and ioctls for PMU / perf-stream
- Add support for explicit fencing
nouveau:
- Add TILE_COMP layout
vc4:
- Add perfmon ioctls
virtgpu:
- Add capset-fix param
vmware:
- Add handle-close ioctl and explicit-fencing support
Signed-off-by: Daniel Stone
---
etnaviv/etnaviv_drm.h | 7 +
include/drm/amdgpu_drm.h | 11 ++
include/drm/drm_mode.h| 25 ++--
include/drm/i915_drm.h| 321 --
include/drm/nouveau_drm.h | 1 +
include/drm/vc4_drm.h | 76 +++
include/drm/virtgpu_drm.h | 1 +
include/drm/vmwgfx_drm.h | 35 -
8 files changed, 451 insertions(+), 26 deletions(-)
diff --git a/etnaviv/etnaviv_drm.h b/etnaviv/etnaviv_drm.h
index 110cc73b..0d5c49dc 100644
--- a/etnaviv/etnaviv_drm.h
+++ b/etnaviv/etnaviv_drm.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (C) 2015 Etnaviv Project
*
@@ -54,6 +55,12 @@ struct drm_etnaviv_timespec {
#define ETNAVIV_PARAM_GPU_FEATURES_40x07
#define ETNAVIV_PARAM_GPU_FEATURES_50x08
#define ETNAVIV_PARAM_GPU_FEATURES_60x09
+#define ETNAVIV_PARAM_GPU_FEATURES_70x0a
+#define ETNAVIV_PARAM_GPU_FEATURES_80x0b
+#define ETNAVIV_PARAM_GPU_FEATURES_90x0c
+#define ETNAVIV_PARAM_GPU_FEATURES_10 0x0d
+#define ETNAVIV_PARAM_GPU_FEATURES_11 0x0e
+#define ETNAVIV_PARAM_GPU_FEATURES_12 0x0f
#define ETNAVIV_PARAM_GPU_STREAM_COUNT 0x10
#define ETNAVIV_PARAM_GPU_REGISTER_MAX 0x11
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index f784f248..c363b67f 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -160,6 +160,7 @@ union drm_amdgpu_bo_list {
#define AMDGPU_CTX_OP_ALLOC_CTX1
#define AMDGPU_CTX_OP_FREE_CTX 2
#define AMDGPU_CTX_OP_QUERY_STATE 3
+#define AMDGPU_CTX_OP_QUERY_STATE2 4
/* GPU reset status */
#define AMDGPU_CTX_NO_RESET0
@@ -170,6 +171,13 @@ union drm_amdgpu_bo_list {
/* unknown cause */
#define AMDGPU_CTX_UNKNOWN_RESET 3
+/* indicate gpu reset occured after ctx created */
+#define AMDGPU_CTX_QUERY2_FLAGS_RESET(1<<0)
+/* indicate vram lost occured after ctx created */
+#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1)
+/* indicate some job from this context once cause gpu hang */
+#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY (1<<2)
+
/* Context priority level */
#define AMDGPU_CTX_PRIORITY_UNSET -2048
#define AMDGPU_CTX_PRIORITY_VERY_LOW-1023
@@ -610,6 +618,8 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_FW_SOS 0x0c
/* Subquery id: Query PSP ASD firmware version */
#define AMDGPU_INFO_FW_ASD 0x0d
+ /* Subquery id: Query VCN firmware version */
+ #define AMDGPU_INFO_FW_VCN 0x0e
/* number of bytes moved for TTM migration */
#define AMDGPU_INFO_NUM_BYTES_MOVED0x0f
/* the used VRAM size */
@@ -798,6 +808,7 @@ struct drm_amdgpu_info_firmware {
#define AMDGPU_VRAM_TYPE_GDDR5 5
#define AMDGPU_VRAM_TYPE_HBM 6
#define AMDGPU_VRAM_TYPE_DDR3 7
+#define AMDGPU_VRAM_TYPE_DDR4 8
struct drm_amdgpu_info_device {
/** PCI Device ID */
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 5597a871..5f9fadbd 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -38,11 +38,11 @@ extern "C" {
#define DRM_DISPLAY_MODE_LEN 32
#define DRM_PROP_NAME_LEN 32
-#define DRM_MODE_TYPE_BUILTIN (1<<0)
-#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_BUILTIN (1<<0) /* deprecated */
+#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated
*/
+#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated
*/
#define DRM_MODE_TYPE_PREFERRED(1<<3)
-#define DRM_MODE_TYPE_DEFAULT (1<<4)
+#define DRM_MODE_TYPE_DEFAULT (1<<4) /* deprecated */
#define DRM_MODE_TYPE_USERDEF (1<<5)
#define DRM_MODE_TYPE_DRIVER (1<<6)
@@ -66,8 +66,8 @@ extern "C" {
#define DRM_MODE_FLAG_PCSYNC (1<<7)
#define DRM_MODE_FLAG_NCSYNC (1<<8)
#define DRM_MODE_FLAG_HSKEW(1<<9) /* hskew provided */
-#define DRM_MODE_
