Re: [PATCH v1 02/29] dt-bindings: memory: tegra20: emc: Document new interconnect property
19.11.2019 09:21, Thierry Reding пишет: > On Mon, Nov 18, 2019 at 11:02:20PM +0300, Dmitry Osipenko wrote: >> External memory controller is interconnected with memory controller and >> with external memory. Document new interconnect property which designates >> external memory controller as interconnect provider. >> >> Signed-off-by: Dmitry Osipenko >> --- >> .../bindings/memory-controllers/nvidia,tegra20-emc.txt| 4 >> 1 file changed, 4 insertions(+) > > Do we really want to describe this particular connection? It's pretty > static and the only real connection here is the EMC frequency, so the > whole interconnect infrastructure seems a bit overkill. > > Sounds to me like we could piggyback on top of the existing > nvidia,memory-controller property of the EMC to make the connection. Ultimately each memory client talks to EMEM through MC and EMC, although it should be okay to ignore the EMEM from a driver's / software perspective. [snip] ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1 02/29] dt-bindings: memory: tegra20: emc: Document new interconnect property
External memory controller is interconnected with memory controller and
with external memory. Document new interconnect property which designates
external memory controller as interconnect provider.
Signed-off-by: Dmitry Osipenko
---
.../bindings/memory-controllers/nvidia,tegra20-emc.txt| 4
1 file changed, 4 insertions(+)
diff --git
a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
index add95367640b..7566d883f921 100644
---
a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
+++
b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
@@ -12,6 +12,9 @@ Properties:
irrespective of ram-code configuration.
- interrupts : Should contain EMC General interrupt.
- clocks : Should contain EMC clock.
+- #interconnect-cells : Should be 1. This cell represents external memory
+ interconnect. The assignments may be found in header file
+ .
Child device nodes describe the memory settings for different configurations
and clock rates.
@@ -20,6 +23,7 @@ Example:
memory-controller@7000f400 {
#address-cells = < 1 >;
#size-cells = < 0 >;
+ #interconnect-cells = < 1 >;
compatible = "nvidia,tegra20-emc";
reg = <0x7000f4000 0x200>;
interrupts = <0 78 0x04>;
--
2.23.0
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Re: [PATCH v1 02/29] dt-bindings: memory: tegra20: emc: Document new interconnect property
On Mon, Nov 18, 2019 at 11:02:20PM +0300, Dmitry Osipenko wrote:
> External memory controller is interconnected with memory controller and
> with external memory. Document new interconnect property which designates
> external memory controller as interconnect provider.
>
> Signed-off-by: Dmitry Osipenko
> ---
> .../bindings/memory-controllers/nvidia,tegra20-emc.txt| 4
> 1 file changed, 4 insertions(+)
Do we really want to describe this particular connection? It's pretty
static and the only real connection here is the EMC frequency, so the
whole interconnect infrastructure seems a bit overkill.
Sounds to me like we could piggyback on top of the existing
nvidia,memory-controller property of the EMC to make the connection.
Thierry
>
> diff --git
> a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> index add95367640b..7566d883f921 100644
> ---
> a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> +++
> b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
> @@ -12,6 +12,9 @@ Properties:
>irrespective of ram-code configuration.
> - interrupts : Should contain EMC General interrupt.
> - clocks : Should contain EMC clock.
> +- #interconnect-cells : Should be 1. This cell represents external memory
> + interconnect. The assignments may be found in header file
> + .
>
> Child device nodes describe the memory settings for different configurations
> and clock rates.
>
> @@ -20,6 +23,7 @@ Example:
> memory-controller@7000f400 {
> #address-cells = < 1 >;
> #size-cells = < 0 >;
> + #interconnect-cells = < 1 >;
> compatible = "nvidia,tegra20-emc";
> reg = <0x7000f4000 0x200>;
> interrupts = <0 78 0x04>;
> --
> 2.23.0
>
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