Re: [PATCH v1 6/8] ARM: dts: imx6dl-victgo: Add interrupt-counter nodes

2022-04-05 Thread Shawn Guo
On Mon, Feb 21, 2022 at 10:53:10AM +0100, Oleksij Rempel wrote:
> From: Robin van der Gracht 
> 
> Interrupt counter is mainlined, now we can add missing counter nodes.
> 
> Signed-off-by: Robin van der Gracht 
> Signed-off-by: Oleksij Rempel 

Applied, thanks!


[PATCH v1 6/8] ARM: dts: imx6dl-victgo: Add interrupt-counter nodes

2022-02-21 Thread Oleksij Rempel
From: Robin van der Gracht 

Interrupt counter is mainlined, now we can add missing counter nodes.

Signed-off-by: Robin van der Gracht 
Signed-off-by: Oleksij Rempel 
---
 arch/arm/boot/dts/imx6dl-victgo.dts | 41 -
 1 file changed, 40 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6dl-victgo.dts 
b/arch/arm/boot/dts/imx6dl-victgo.dts
index 20c7f80e5ec9..907682248aa7 100644
--- a/arch/arm/boot/dts/imx6dl-victgo.dts
+++ b/arch/arm/boot/dts/imx6dl-victgo.dts
@@ -54,6 +54,27 @@ comp0_out: endpoint {
};
};
 
+   counter-0 {
+   compatible = "interrupt-counter";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_counter0>;
+   gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+   };
+
+   counter-1 {
+   compatible = "interrupt-counter";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_counter1>;
+   gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+   };
+
+   counter-2 {
+   compatible = "interrupt-counter";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_counter2>;
+   gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+   };
+
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@@ -400,7 +421,7 @@ &gpio1 {
 
 &gpio2 {
gpio-line-names =
-   "", "", "", "", "", "", "", "",
+   "YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "",
"", "LED_PWM", "", "", "",
"", "", "",
"", "", "", "", "", "", "ISB_IN1", "ON_SWITCH",
@@ -706,6 +727,24 @@ MX6QDL_PAD_KEY_ROW3__GPIO4_IO130x13008
>;
};
 
+   pinctrl_counter0: counter0grp {
+   fsl,pins = <
+   MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b000
+   >;
+   };
+
+   pinctrl_counter1: counter1grp {
+   fsl,pins = <
+   MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b000
+   >;
+   };
+
+   pinctrl_counter2: counter2grp {
+   fsl,pins = <
+   MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b000
+   >;
+   };
+
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
-- 
2.30.2