Re: (subset) [PATCH v2 0/7] Add SMEM-based speedbin matching
On Wed, 05 Jun 2024 22:10:13 +0200, Konrad Dybcio wrote: > Newer (SM8550+) SoCs don't seem to have a nice speedbin fuse anymore, > but instead rely on a set of combinations of "feature code" (FC) and > "product code" (PC) identifiers to match the bins. This series adds > support for that. > > I suppose a qcom/for-soc immutable branch would be in order if we want > to land this in the upcoming cycle. > > [...] Applied, thanks! [1/7] soc: qcom: Move some socinfo defines to the header commit: 9267997fa7aa0b597e8b32cb3fdfe91be1d35a83 [2/7] soc: qcom: smem: Add a feature code getter commit: 81bbb2b891174da9301fc0d4fe9622bd4cb6a995 Best regards, -- Bjorn Andersson
[PATCH v2 0/7] Add SMEM-based speedbin matching
Newer (SM8550+) SoCs don't seem to have a nice speedbin fuse anymore,
but instead rely on a set of combinations of "feature code" (FC) and
"product code" (PC) identifiers to match the bins. This series adds
support for that.
I suppose a qcom/for-soc immutable branch would be in order if we want
to land this in the upcoming cycle.
FWIW I preferred the fuses myself..
Signed-off-by: Konrad Dybcio
---
Changes in v3:
- Wrap the argument usage in new preprocessor macros in braces (Bjorn)
- Make the SOCINFO_FC_INT_MAX define inclusive, adjust .h and .c (Bjorn)
- Pick up rbs
- Rebase on next-20240605
- Drop the already-applied ("Avoid a nullptr dereference when speedbin
setting fails")
Changes in v2:
- Separate moving existing and adding new defines
- Fix kerneldoc copypasta
- Remove some wrong comments and defines
- Remove assumed "max" values for PCs and external FCs
- Improve some commit messages
- Return -EOPNOTSUPP instead of -EINVAL when calling p/fcode getters
on socinfo older than v16
- Drop pcode getters and evaluation (doesn't matter for Adreno on
non-proto SoCs)
- Rework the speedbin logic to be hopefully saner
- Link to v1:
https://lore.kernel.org/r/20240405-topic-smem_speedbin-v1-0-ce2b86425...@linaro.org
---
Konrad Dybcio (7):
soc: qcom: Move some socinfo defines to the header
soc: qcom: smem: Add a feature code getter
drm/msm/adreno: Implement SMEM-based speed bin
drm/msm/adreno: Add speedbin data for SM8550 / A740
drm/msm/adreno: Define A530 speed bins explicitly
drm/msm/adreno: Redo the speedbin assignment
arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs
arch/arm64/boot/dts/qcom/sm8550.dtsi | 21 +++-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 34
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 54 ---
drivers/gpu/drm/msm/adreno/adreno_device.c | 12 +
drivers/gpu/drm/msm/adreno/adreno_gpu.c| 84 +++---
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 11 ++--
drivers/soc/qcom/smem.c| 33
drivers/soc/qcom/socinfo.c | 8 ---
include/linux/soc/qcom/smem.h | 1 +
include/linux/soc/qcom/socinfo.h | 34
10 files changed, 185 insertions(+), 107 deletions(-)
---
base-commit: 234cb065ad82915ff8d06ce01e01c3e640b674d2
change-id: 20240404-topic-smem_speedbin-8deecd0bef0e
Best regards,
--
Konrad Dybcio
[PATCH v2 0/7] Add SMEM-based speedbin matching
Newer (SM8550+) SoCs don't seem to have a nice speedbin fuse anymore, but instead rely on a set of combinations of "feature code" (FC) and "product code" (PC) identifiers to match the bins. This series adds support for that. I suppose a qcom/for-soc immutable branch would be in order if we want to land this in the upcoming cycle. FWIW I preferred the fuses myself.. Patches 5 and 6 culd be omitted, but I'd reaaally like them to land and soon at that. This would enable even more overdue and necessary cleanups/feature prepwork sooner than later. The dt patch can only be picked if the drm patches are there. Depends on: https://lore.kernel.org/linux-arm-msm/20240412-topic-adreno_nullptr_supphw-v1-1-eb30a1c12...@linaro.org/ Signed-off-by: Konrad Dybcio --- Changes in v2: - Separate moving existing and adding new defines - Fix kerneldoc copypasta - Remove some wrong comments and defines - Remove assumed "max" values for PCs and external FCs - Improve some commit messages - Return -EOPNOTSUPP instead of -EINVAL when calling p/fcode getters on socinfo older than v16 - Drop pcode getters and evaluation (doesn't matter for Adreno on non-proto SoCs, might matter in the future or w/ other peripherals) - Rework the speedbin logic to be hopefully saner (accidental support for A2xx-A4xx, I guess!) - Reorder some existing function calls to avoid crazy nullptrs - ""fix"" the smem dependency inconvenience - Link to v1: https://lore.kernel.org/r/20240405-topic-smem_speedbin-v1-0-ce2b86425...@linaro.org --- Konrad Dybcio (7): soc: qcom: Move some socinfo defines to the header soc: qcom: smem: Add a feature code getter drm/msm/adreno: Implement SMEM-based speed bin drm/msm/adreno: Add speedbin data for SM8550 / A740 drm/msm/adreno: Define A530 speed bins explicitly drm/msm/adreno: Redo the speedbin assignment arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs arch/arm64/boot/dts/qcom/sm8550.dtsi | 21 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 34 -- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 54 --- drivers/gpu/drm/msm/adreno/adreno_device.c | 13 drivers/gpu/drm/msm/adreno/adreno_gpu.c| 103 + drivers/gpu/drm/msm/adreno/adreno_gpu.h| 11 +-- drivers/gpu/drm/msm/msm_gpu.c | 3 - drivers/soc/qcom/smem.c| 33 + drivers/soc/qcom/socinfo.c | 8 --- include/linux/soc/qcom/smem.h | 1 + include/linux/soc/qcom/socinfo.h | 34 ++ 11 files changed, 198 insertions(+), 117 deletions(-) --- base-commit: b13768266bf3a129adf5bbd0bad28e23a74329a2 change-id: 20240404-topic-smem_speedbin-8deecd0bef0e Best regards, -- Konrad Dybcio
