Re: [PATCH v2 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes

2023-01-18 Thread AngeloGioacchino Del Regno

Il 18/01/23 10:18, Allen-KH Cheng ha scritto:

Add MTU3 nodes for MT8186 SoC.

Signed-off-by: Allen-KH Cheng 
Tested-by: Chen-Yu Tsai 
---
  arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75 
  1 file changed, 75 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c0a3afd55eaf..3d88480913eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -908,6 +908,43 @@
status = "disabled";
};
  
+		ssusb0: usb@11201000 {

+   compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";


78 columns; compatibles fit in one line.


+   reg = <0 0x11201000 0 0x2dff>,
+ <0 0x11203e00 0 0x0100>;


80 cols; regs fit in one line.


+   reg-names = "mac", "ippc";
+   clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+   interrupts = ;
+   phys = <&u2port0 PHY_TYPE_USB2>;
+   power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   status = "disabled";
+
+   usb_host0: usb@1120 {
+   compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";


90 cols; fits in one line.

...same comments for ssusb1 :-)


+   reg = <0 0x1120 0 0x1000>;
+   reg-names = "mac";
+   clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", 
"xhci_ck";
+   interrupts = ;
+   mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+   wakeup-source;
+   status = "disabled";
+   };
+   };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
 "mediatek,mt8183-mmc";
@@ -939,6 +976,44 @@
status = "disabled";
};
  
+		ssusb1: usb@11281000 {

+   compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+   reg = <0 0x11281000 0 0x2dff>,
+ <0 0x11283e00 0 0x0100>;
+   reg-names = "mac", "ippc";
+   clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+   interrupts = ;
+   phys = <&u2port1 PHY_TYPE_USB2>,
+  <&u3port1 PHY_TYPE_USB3>;


phys fit in one line.

Regards,
Angelo


[PATCH v2 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes

2023-01-18 Thread Allen-KH Cheng
Add MTU3 nodes for MT8186 SoC.

Signed-off-by: Allen-KH Cheng 
Tested-by: Chen-Yu Tsai 
---
 arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75 
 1 file changed, 75 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c0a3afd55eaf..3d88480913eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -908,6 +908,43 @@
status = "disabled";
};
 
+   ssusb0: usb@11201000 {
+   compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+   reg = <0 0x11201000 0 0x2dff>,
+ <0 0x11203e00 0 0x0100>;
+   reg-names = "mac", "ippc";
+   clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+   interrupts = ;
+   phys = <&u2port0 PHY_TYPE_USB2>;
+   power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   status = "disabled";
+
+   usb_host0: usb@1120 {
+   compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+   reg = <0 0x1120 0 0x1000>;
+   reg-names = "mac";
+   clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", 
"dma_ck", "xhci_ck";
+   interrupts = ;
+   mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+   wakeup-source;
+   status = "disabled";
+   };
+   };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
 "mediatek,mt8183-mmc";
@@ -939,6 +976,44 @@
status = "disabled";
};
 
+   ssusb1: usb@11281000 {
+   compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+   reg = <0 0x11281000 0 0x2dff>,
+ <0 0x11283e00 0 0x0100>;
+   reg-names = "mac", "ippc";
+   clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+   interrupts = ;
+   phys = <&u2port1 PHY_TYPE_USB2>,
+  <&u3port1 PHY_TYPE_USB3>;
+   power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   status = "disabled";
+
+   usb_host1: usb@1128 {
+   compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+   reg = <0 0x1128 0 0x1000>;
+   reg-names = "mac";
+   clocks = <&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>,
+<&infracfg_ao 
CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>;
+   clock-names = "sys_ck", "ref_ck", "mcu_ck", 
"dma_ck","xhci_ck";
+   interrupts = ;
+   mediatek,syscon-wakeup = <&pericfg 0x424 2>;
+   wakeup-source;
+   status = "disabled";
+   };
+   };
+