Re: [PATCH v2 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel

2024-01-02 Thread Manuel Traut 
On Tue, Dec 26, 2023 at 02:56:58PM -0800, Jessica Zhang wrote:
> 
> 
> On 12/23/2023 7:20 AM, Manuel Traut wrote:
> > From: Alexander Warnecke 
> > 
> > The BOE TH101MB31IG002-28A panel is a WXGA panel.
> > It is used in Pine64 Pinetab2 and PinetabV.
> > 

> Hi Manuel,

Hi Jessica,

> Sorry, I responded to the v1 instead of the latest version. Carrying my
> comment over to here:
> 
> If I remember correctly, commit d2aacaf07395bd798373cbec6af05fff4147aff3
> should have introduced prepared/enabled do the drm_panel struct.

thanks for the hint, I will update this in v3.

Regards
Manuel

Re: [PATCH v2 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel

2023-12-26 Thread Jessica Zhang 




On 12/23/2023 7:20 AM, Manuel Traut wrote:

From: Alexander Warnecke 

The BOE TH101MB31IG002-28A panel is a WXGA panel.
It is used in Pine64 Pinetab2 and PinetabV.

Signed-off-by: Alexander Warnecke 
Signed-off-by: Manuel Traut 
---
  drivers/gpu/drm/panel/Kconfig  |  11 +
  drivers/gpu/drm/panel/Makefile |   1 +
  .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c   | 348 +
  3 files changed, 360 insertions(+)

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..927ddd10e688 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
  24 bit RGB per pixel. It provides a MIPI DSI interface to
  the host and has a built-in LED backlight.
  
+config DRM_PANEL_BOE_TH101MB31UIG002_28A

+   tristate "Boe TH101MB31UIG002-28A panel"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for Boe
+ TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
+ resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
+ interface to the host and has a built-in LED backlight.
+
  config DRM_PANEL_BOE_TV101WUM_NL6
tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..dd6e1ac9d0a2 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += 
panel-asus-z00t-tm5p5-n35596.
  obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
  obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
  obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
+obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += 
panel-boe-th101mb31ig002-28a.o
  obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
  obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
  obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c 
b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
new file mode 100644
index ..ffe4047b7434
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Alexander Warnecke 
+ * Copyright (c) 2023 Manuel Traut 
+ * Copyright (c) 2023 Dang Huynh 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+struct boe_th101mb31ig002 {
+   struct drm_panel panel;
+   bool enabled;
+   bool prepared;


Hi Manuel,

Sorry, I responded to the v1 instead of the latest version. Carrying my 
comment over to here:


If I remember correctly, commit d2aacaf07395bd798373cbec6af05fff4147aff3 
should have introduced prepared/enabled do the drm_panel struct.


Thanks,

Jessica Zhang


+
+   struct mipi_dsi_device *dsi;
+
+   struct regulator *power;
+   struct gpio_desc *enable;
+   struct gpio_desc *reset;
+
+   enum drm_panel_orientation orientation;
+};
+
+static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
+{
+   gpiod_direction_output(ctx->reset, 0);
+   usleep_range(10, 100);
+   gpiod_direction_output(ctx->reset, 1);
+   usleep_range(10, 100);
+   gpiod_direction_output(ctx->reset, 0);
+   usleep_range(5000, 6000);
+}
+
+static int boe_th101mb31ig002_enable(struct drm_panel *panel)
+{
+   struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+   struct mipi_dsi_device *dsi = ctx->dsi;
+   struct device *dev = &dsi->dev;
+   int ret;
+
+   if (ctx->enabled)
+   return 0;
+
+   mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
+   mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
+   mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF);
+   mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14);
+   mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00);
+   mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04);
+   mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10,
+   0x00);
+   mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
+   0x00);
+   mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36,
+   0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C,
+   0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C,
+   0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24,
+

[PATCH v2 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel

2023-12-23 Thread Manuel Traut 
From: Alexander Warnecke 

The BOE TH101MB31IG002-28A panel is a WXGA panel.
It is used in Pine64 Pinetab2 and PinetabV.

Signed-off-by: Alexander Warnecke 
Signed-off-by: Manuel Traut 
---
 drivers/gpu/drm/panel/Kconfig  |  11 +
 drivers/gpu/drm/panel/Makefile |   1 +
 .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c   | 348 +
 3 files changed, 360 insertions(+)

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..927ddd10e688 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
  24 bit RGB per pixel. It provides a MIPI DSI interface to
  the host and has a built-in LED backlight.
 
+config DRM_PANEL_BOE_TH101MB31UIG002_28A
+   tristate "Boe TH101MB31UIG002-28A panel"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for Boe
+ TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
+ resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
+ interface to the host and has a built-in LED backlight.
+
 config DRM_PANEL_BOE_TV101WUM_NL6
tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..dd6e1ac9d0a2 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += 
panel-asus-z00t-tm5p5-n35596.
 obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
 obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
 obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
+obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += 
panel-boe-th101mb31ig002-28a.o
 obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
 obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
 obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c 
b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
new file mode 100644
index ..ffe4047b7434
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Alexander Warnecke 
+ * Copyright (c) 2023 Manuel Traut 
+ * Copyright (c) 2023 Dang Huynh 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+struct boe_th101mb31ig002 {
+   struct drm_panel panel;
+   bool enabled;
+   bool prepared;
+
+   struct mipi_dsi_device *dsi;
+
+   struct regulator *power;
+   struct gpio_desc *enable;
+   struct gpio_desc *reset;
+
+   enum drm_panel_orientation orientation;
+};
+
+static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
+{
+   gpiod_direction_output(ctx->reset, 0);
+   usleep_range(10, 100);
+   gpiod_direction_output(ctx->reset, 1);
+   usleep_range(10, 100);
+   gpiod_direction_output(ctx->reset, 0);
+   usleep_range(5000, 6000);
+}
+
+static int boe_th101mb31ig002_enable(struct drm_panel *panel)
+{
+   struct boe_th101mb31ig002 *ctx = container_of(panel,
+ struct boe_th101mb31ig002,
+ panel);
+   struct mipi_dsi_device *dsi = ctx->dsi;
+   struct device *dev = &dsi->dev;
+   int ret;
+
+   if (ctx->enabled)
+   return 0;
+
+   mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
+   mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
+   mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF);
+   mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14);
+   mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00);
+   mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04);
+   mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10,
+   0x00);
+   mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
+   0x00);
+   mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36,
+   0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C,
+   0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C,
+   0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24,
+   0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47,
+   0x46, 0x39, 0x26, 0x06);
+   mipi_dsi_dcs_write_seq(dsi, 0x00, 0xFF, 0x87, 0x12, 0x34, 0x44, 0x44,
+   0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0F,
+   0x00, 0x00