[PATCH v3 06/12] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
Hi Chris,
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.4-rc1 next-20151118]
[cannot apply to rockchip/for-next]
url:
https://github.com/0day-ci/linux/commits/Chris-Zhong/Add-mipi-dsi-support-for-rk3288/20151119-114228
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: xtensa-allmodconfig (attached as .config)
reproduce:
wget
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
-O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=xtensa
All warnings (new ones prefixed by >>):
In file included from arch/xtensa/include/generated/asm/div64.h:1:0,
from include/linux/kernel.h:136,
from include/linux/clk.h:16,
from drivers/gpu/drm/bridge/dw_mipi_dsi.c:10:
drivers/gpu/drm/bridge/dw_mipi_dsi.c: In function
'dw_mipi_dsi_get_hcomponent_lbcc':
include/asm-generic/div64.h:43:28: warning: comparison of distinct pointer
types lacks a cast
(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
^
>> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:9: note: in expansion of macro
>> 'do_div'
frac = do_div(lbcc, dsi->mode->clock);
^
drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:2: warning: right shift count >=
width of type
frac = do_div(lbcc, dsi->mode->clock);
^
In file included from arch/xtensa/include/generated/asm/div64.h:1:0,
from include/linux/kernel.h:136,
from include/linux/clk.h:16,
from drivers/gpu/drm/bridge/dw_mipi_dsi.c:10:
include/asm-generic/div64.h:48:11: warning: passing argument 1 of
'__div64_32' from incompatible pointer type
__rem = __div64_32(&(n), __base); \
^
>> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:9: note: in expansion of macro
>> 'do_div'
frac = do_div(lbcc, dsi->mode->clock);
^
include/asm-generic/div64.h:35:17: note: expected 'uint64_t *' but argument
is of type 'u32 *'
extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
^
vim +/do_div +819 drivers/gpu/drm/bridge/dw_mipi_dsi.c
803 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
804 {
805 dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) |
LPRX_TO_CNT(1000));
806 dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
807 dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
808 dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
809 }
810
811 /* Get lane byte clock cycles. */
812 static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
813 u32 hcomponent)
814 {
815 u32 frac, lbcc;
816
817 lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
818
> 819 frac = do_div(lbcc, dsi->mode->clock);
820 if (frac)
821 lbcc++;
822
823 return lbcc;
824 }
825
826 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
827 {
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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[PATCH v3 06/12] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
Hi Chris,
[auto build test WARNING on: drm/drm-next]
[also build test WARNING on: v4.4-rc1 next-20151118]
[cannot apply to: rockchip/for-next]
url:
https://github.com/0day-ci/linux/commits/Chris-Zhong/Add-mipi-dsi-support-for-rk3288/20151119-114228
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: sparc-allyesconfig (attached as .config)
reproduce:
wget
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
-O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=sparc
All warnings (new ones prefixed by >>):
drivers/gpu/drm/bridge/dw_mipi_dsi.c: In function
'dw_mipi_dsi_dcs_short_write':
>> drivers/gpu/drm/bridge/dw_mipi_dsi.c:525:4: warning: format '%d' expects
>> argument of type 'int', but argument 3 has type 'size_t' [-Wformat=]
msg->tx_len);
^
drivers/gpu/drm/bridge/dw_mipi_dsi.c: In function
'dw_mipi_dsi_dcs_long_write':
drivers/gpu/drm/bridge/dw_mipi_dsi.c:542:4: warning: format '%d' expects
argument of type 'int', but argument 3 has type 'size_t' [-Wformat=]
msg->tx_len);
^
vim +525 drivers/gpu/drm/bridge/dw_mipi_dsi.c
509 if (ret < 0) {
510 dev_err(dsi->dev, "failed to write command FIFO\n");
511 return ret;
512 }
513
514 return 0;
515 }
516
517 static int dw_mipi_dsi_dcs_short_write(struct dw_mipi_dsi *dsi,
518 const struct mipi_dsi_msg *msg)
519 {
520 const u16 *tx_buf = msg->tx_buf;
521 u32 val = GEN_HDATA(*tx_buf) | GEN_HTYPE(msg->type);
522
523 if (msg->tx_len > 2) {
524 dev_err(dsi->dev, "too long tx buf length %d for short
write\n",
> 525 msg->tx_len);
526 return -EINVAL;
527 }
528
529 return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
530 }
531
532 static int dw_mipi_dsi_dcs_long_write(struct dw_mipi_dsi *dsi,
533const struct mipi_dsi_msg *msg)
---
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[PATCH v3 06/12] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
Hi Chris,
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.4-rc1 next-20151118]
[cannot apply to rockchip/for-next]
url:
https://github.com/0day-ci/linux/commits/Chris-Zhong/Add-mipi-dsi-support-for-rk3288/20151119-114228
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: openrisc-allmodconfig (attached as .config)
reproduce:
wget
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
-O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=openrisc
All warnings (new ones prefixed by >>):
drivers/gpu/drm/bridge/dw_mipi_dsi.c: In function
'dw_mipi_dsi_get_hcomponent_lbcc':
>> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:9: warning: comparison of distinct
>> pointer types lacks a cast
>> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:2: warning: right shift count >=
>> width of type
>> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:2: warning: passing argument 1 of
>> '__div64_32' from incompatible pointer type
include/asm-generic/div64.h:35:17: note: expected 'uint64_t *' but argument
is of type 'u32 *'
vim +819 drivers/gpu/drm/bridge/dw_mipi_dsi.c
803 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
804 {
805 dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) |
LPRX_TO_CNT(1000));
806 dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
807 dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
808 dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
809 }
810
811 /* Get lane byte clock cycles. */
812 static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
813 u32 hcomponent)
814 {
815 u32 frac, lbcc;
816
817 lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
818
> 819 frac = do_div(lbcc, dsi->mode->clock);
820 if (frac)
821 lbcc++;
822
823 return lbcc;
824 }
825
826 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
827 {
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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URL:
[PATCH v3 06/12] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
add Synopsys DesignWare MIPI DSI host controller driver support. Signed-off-by: Chris Zhong --- Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/Kconfig | 11 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/dw_mipi_dsi.c | 1055 ++ include/drm/bridge/dw_mipi_dsi.h | 27 + 4 files changed, 1094 insertions(+) create mode 100644 drivers/gpu/drm/bridge/dw_mipi_dsi.c create mode 100644 include/drm/bridge/dw_mipi_dsi.h diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 639..c0900e0 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -22,6 +22,17 @@ config DRM_DW_HDMI_AHB_AUDIO Designware HDMI block. This is used in conjunction with the i.MX6 HDMI driver. +config DRM_DW_MIPI_DSI + tristate "Synopsys DesignWare MIPI DSI host controller bridge" + depends on DRM + select DRM_KMS_HELPER + select DRM_MIPI_DSI + select DRM_PANEL + help + Choose this if you want to use the Synopsys DesignWare MIPI DSI host + controller bridge. If M is selected, the module will be + called dw_mipi_dsi. DRM_MIPI_DSI support is required for this driver + to work. config DRM_NXP_PTN3460 tristate "NXP PTN3460 DP/LVDS bridge" diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index d4e28be..d908c4b 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -2,5 +2,6 @@ ccflags-y := -Iinclude/drm obj-$(CONFIG_DRM_DW_HDMI) += dw_hdmi.o obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw_hdmi-ahb-audio.o +obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw_mipi_dsi.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o diff --git a/drivers/gpu/drm/bridge/dw_mipi_dsi.c b/drivers/gpu/drm/bridge/dw_mipi_dsi.c new file mode 100644 index 000..442fc7c --- /dev/null +++ b/drivers/gpu/drm/bridge/dw_mipi_dsi.c @@ -0,0 +1,1055 @@ +/* + * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DSI_VERSION0x00 + +#define DSI_PWR_UP 0x04 +#define RESET 0 +#define POWERUPBIT(0) + +#define DSI_CLKMGR_CFG 0x08 +#define TO_CLK_DIVIDSION(div) (((div) & 0xff) << 8) +#define TX_ESC_CLK_DIVIDSION(div) (((div) & 0xff) << 0) + +#define DSI_DPI_VCID 0x0c +#define DPI_VID(vid) (((vid) & 0x3) << 0) + +#define DSI_DPI_COLOR_CODING 0x10 +#define EN18_LOOSELY BIT(8) +#define DPI_COLOR_CODING_16BIT_1 0x0 +#define DPI_COLOR_CODING_16BIT_2 0x1 +#define DPI_COLOR_CODING_16BIT_3 0x2 +#define DPI_COLOR_CODING_18BIT_1 0x3 +#define DPI_COLOR_CODING_18BIT_2 0x4 +#define DPI_COLOR_CODING_24BIT 0x5 + +#define DSI_DPI_CFG_POL0x14 +#define COLORM_ACTIVE_LOW BIT(4) +#define SHUTD_ACTIVE_LOW BIT(3) +#define HSYNC_ACTIVE_LOW BIT(2) +#define VSYNC_ACTIVE_LOW BIT(1) +#define DATAEN_ACTIVE_LOW BIT(0) + +#define DSI_DPI_LP_CMD_TIM 0x18 +#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16) +#define INVACT_LPCMD_TIME(p) ((p) & 0xff) + +#define DSI_DBI_CFG0x20 +#define DSI_DBI_CMDSIZE0x28 + +#define DSI_PCKHDL_CFG 0x2c +#define EN_CRC_RX BIT(4) +#define EN_ECC_RX BIT(3) +#define EN_BTA BIT(2) +#define EN_EOTP_RX BIT(1) +#define EN_EOTP_TX BIT(0) + +#define DSI_MODE_CFG 0x34 +#define ENABLE_VIDEO_MODE 0 +#define ENABLE_CMD_MODEBIT(0) + +#define DSI_VID_MODE_CFG 0x38 +#define FRAME_BTA_ACK BIT(14) +#define ENABLE_LOW_POWER (0x3f << 8) +#define ENABLE_LOW_POWER_MASK (0x3f << 8) +#define VID_MODE_TYPE_BURST_SYNC_PULSES0x2 +#define VID_MODE_TYPE_MASK 0x3 + +#define DSI_VID_PKT_SIZE 0x3c +#define VID_PKT_SIZE(p)(((p) & 0x3fff) << 0) +#define VID_PKT_MAX_SIZE 0x3fff + +#define DSI_VID_HSA_TIME 0x48 +#define DSI_VID_HBP_TIME 0x4c +#define DSI_VID_HLINE_TIME 0x50 +#define DSI_VID_VSA_LINES 0x54 +#define DSI_VID_VBP_LINES 0x58 +#define
