[PATCH v3 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP

[Gary Bisson]

Hi Thierry,

On Thu, Aug 13, 2015 at 2:32 PM, Thierry Reding
 wrote:
> On Wed, Jun 10, 2015 at 06:44:23PM +0200, Gary Bisson wrote:
>> Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
>> driver.
>>
>> The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
>> LCD interface. It supports pixel clocks in the range of 30-40 MHz.
>>
>> This panel details can be found at:
>> http://boundarydevices.com/product/7-800x480-display/
>>
>> Signed-off-by: Gary Bisson 
>> ---
>>  .../bindings/panel/okaya,rs800480t_7x0gp.txt   |  7 +
>>  drivers/gpu/drm/panel/panel-simple.c   | 33 
>> ++
>>  2 files changed, 40 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt 
>> b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> new file mode 100644
>> index 000..f7c729d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> @@ -0,0 +1,7 @@
>> +OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
>> +
>> +Required properties:
>> +- compatible: should be "okaya,rs800480t_7x0gp"
>
> Underscores are not typically used in compatible strings, so I've
> changed this to "okaya,rs800480t-7x0gp".

Thanks! I'll make sure not to use underscores for such names in the future.

Regards,
Gary

[PATCH v3 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP

[Thierry Reding]

On Wed, Jun 10, 2015 at 06:44:23PM +0200, Gary Bisson wrote:
> Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
> driver.
> 
> The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
> LCD interface. It supports pixel clocks in the range of 30-40 MHz.
> 
> This panel details can be found at:
> http://boundarydevices.com/product/7-800x480-display/
> 
> Signed-off-by: Gary Bisson 
> ---
>  .../bindings/panel/okaya,rs800480t_7x0gp.txt   |  7 +
>  drivers/gpu/drm/panel/panel-simple.c   | 33 
> ++
>  2 files changed, 40 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
> 
> diff --git 
> a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt 
> b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
> new file mode 100644
> index 000..f7c729d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
> @@ -0,0 +1,7 @@
> +OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
> +
> +Required properties:
> +- compatible: should be "okaya,rs800480t_7x0gp"

Underscores are not typically used in compatible strings, so I've
changed this to "okaya,rs800480t-7x0gp".

Thierry
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[PATCH v3 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP

[Gary Bisson]

Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
driver.

The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
LCD interface. It supports pixel clocks in the range of 30-40 MHz.

This panel details can be found at:
http://boundarydevices.com/product/7-800x480-display/

Signed-off-by: Gary Bisson 
---
 .../bindings/panel/okaya,rs800480t_7x0gp.txt   |  7 +
 drivers/gpu/drm/panel/panel-simple.c   | 33 ++
 2 files changed, 40 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt

diff --git a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt 
b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
new file mode 100644
index 000..f7c729d
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
@@ -0,0 +1,7 @@
+OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
+
+Required properties:
+- compatible: should be "okaya,rs800480t_7x0gp"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index f94201b..5262be1 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -943,6 +943,36 @@ static const struct panel_desc lg_lp129qe = {
},
 };

+static const struct display_timing okaya_rs800480t_7x0gp_timing = {
+   .pixelclock = { 3000, 3000, 4000 },
+   .hactive = { 800, 800, 800 },
+   .hfront_porch = { 40, 40, 40 },
+   .hback_porch = { 40, 40, 40 },
+   .hsync_len = { 1, 48, 48 },
+   .vactive = { 480, 480, 480 },
+   .vfront_porch = { 13, 13, 13 },
+   .vback_porch = { 29, 29, 29 },
+   .vsync_len = { 3, 3, 3 },
+   .flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc okaya_rs800480t_7x0gp = {
+   .timings = _rs800480t_7x0gp_timing,
+   .num_timings = 1,
+   .bpc = 6,
+   .size = {
+   .width = 154,
+   .height = 87,
+   },
+   .delay = {
+   .prepare = 41,
+   .enable = 50,
+   .unprepare = 41,
+   .disable = 50,
+   },
+   .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
 static const struct drm_display_mode ortustech_com43h4m85ulc_mode  = {
.clock = 25000,
.hdisplay = 480,
@@ -1113,6 +1143,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "lg,lp129qe",
.data = _lp129qe,
}, {
+   .compatible = "okaya,rs800480t_7x0gp",
+   .data = _rs800480t_7x0gp,
+   }, {
.compatible = "ortustech,com43h4m85ulc",
.data = _com43h4m85ulc,
}, {
-- 
2.1.4