[PATCH v4 07/11] drm: sun4i: Add composite output
Some Allwinner SoCs have an IP called the TV encoder that is used to output composite and VGA signals. In such a case, we need to use the second TCON channel. Add support for that TV encoder. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/Makefile | 2 + drivers/gpu/drm/sun4i/sun4i_tv.c | 621 +++ 2 files changed, 623 insertions(+) create mode 100644 drivers/gpu/drm/sun4i/sun4i_tv.c diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index 74f804b88ff5..58cd55149827 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -9,3 +9,5 @@ sun4i-tcon-y += sun4i_dotclock.o obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o sun4i-tcon.o obj-$(CONFIG_DRM_SUN4I)+= sun4i_backend.o + +obj-$(CONFIG_DRM_SUN4I)+= sun4i_tv.o diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c new file mode 100644 index ..78634dfc0f77 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -0,0 +1,621 @@ +/* + * Copyright (C) 2015 Free Electrons + * Copyright (C) 2015 NextThing Co + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sun4i_backend.h" +#include "sun4i_drv.h" +#include "sun4i_tcon.h" + +#define SUN4I_TVE_EN_REG 0x000 +#define SUN4I_TVE_EN_DAC_MAP_MASK GENMASK(19, 4) +#define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4) +#define SUN4I_TVE_EN_ENABLEBIT(0) + +#define SUN4I_TVE_CFG0_REG 0x004 +#define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26) +#define SUN4I_TVE_CFG0_CORE_DATAPATH_54M BIT(25) +#define SUN4I_TVE_CFG0_CORE_CONTROL_54MBIT(24) +#define SUN4I_TVE_CFG0_YC_EN BIT(17) +#define SUN4I_TVE_CFG0_COMP_EN BIT(16) +#define SUN4I_TVE_CFG0_RES(x) ((x) & 0xf) +#define SUN4I_TVE_CFG0_RES_480iSUN4I_TVE_CFG0_RES(0) +#define SUN4I_TVE_CFG0_RES_576iSUN4I_TVE_CFG0_RES(1) + +#define SUN4I_TVE_DAC0_REG 0x008 +#define SUN4I_TVE_DAC0_CLOCK_INVERTBIT(24) +#define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20) +#define SUN4I_TVE_DAC0_LUMA_0_4SUN4I_TVE_DAC0_LUMA(3) +#define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18) +#define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3) +#define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16) +#define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS SUN4I_TVE_DAC0_INTERNAL_DAC(3) +#define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac) + +#define SUN4I_TVE_NOTCH_REG0x00c +#define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x)((4 - (x)) << (dac * 3)) + +#define SUN4I_TVE_CHROMA_FREQ_REG 0x010 + +#define SUN4I_TVE_PORCH_REG0x014 +#define SUN4I_TVE_PORCH_BACK(x)((x) << 16) +#define SUN4I_TVE_PORCH_FRONT(x) (x) + +#define SUN4I_TVE_LINE_REG 0x01c +#define SUN4I_TVE_LINE_FIRST(x)((x) << 16) +#define SUN4I_TVE_LINE_NUMBER(x) (x) + +#define SUN4I_TVE_LEVEL_REG0x020 +#define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16) +#define SUN4I_TVE_LEVEL_BLACK(x) (x) + +#define SUN4I_TVE_DAC1_REG 0x024 +#define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8)) + +#define SUN4I_TVE_DETECT_STA_REG 0x038 +#define SUN4I_TVE_DETECT_STA_DAC(dac) BIT((dac * 8)) +#define SUN4I_TVE_DETECT_STA_UNCONNECTED 0 +#define SUN4I_TVE_DETECT_STA_CONNECTED 1 +#define SUN4I_TVE_DETECT_STA_GROUND2 + +#define SUN4I_TVE_CB_CR_LVL_REG0x10c +#define SUN4I_TVE_CB_CR_LVL_CR_BURST(x)((x) << 8) +#define SUN4I_TVE_CB_CR_LVL_CB_BURST(x)(x) + +#define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110 +#define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x) + +#define SUN4I_TVE_BURST_WIDTH_REG 0x114 +#define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16) +#define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8) +#define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x) + +#define SUN4I_TVE_CB_CR_GAIN_REG 0x118 +#define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8) +#define SUN4I_TVE_CB_CR_GAIN_CB(x) (x) + +#define SUN4I_TVE_SYNC_VBI_REG 0x11c +#define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16) +#define SUN4I_TVE_SYNC_VBI_VBLANK(x) (x) + +#define SUN4I_TVE_ACTIVE_LINE_REG 0x124 +#define SUN4I_TVE_ACTIVE_LINE(x) (x
[PATCH v4 07/11] drm: sun4i: Add composite output
On Mon, 25 Apr 2016 15:22:48 +0200 Maxime Ripard wrote: > Some Allwinner SoCs have an IP called the TV encoder that is used to output > composite and VGA signals. In such a case, we need to use the second TCON > channel. > > Add support for that TV encoder. > > Signed-off-by: Maxime Ripard Reviewed-by: Boris Brezillon > --- > drivers/gpu/drm/sun4i/Makefile | 2 + > drivers/gpu/drm/sun4i/sun4i_tv.c | 621 > +++ > 2 files changed, 623 insertions(+) > create mode 100644 drivers/gpu/drm/sun4i/sun4i_tv.c > > diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile > index 74f804b88ff5..58cd55149827 100644 > --- a/drivers/gpu/drm/sun4i/Makefile > +++ b/drivers/gpu/drm/sun4i/Makefile > @@ -9,3 +9,5 @@ sun4i-tcon-y += sun4i_dotclock.o > > obj-$(CONFIG_DRM_SUN4I) += sun4i-drm.o sun4i-tcon.o > obj-$(CONFIG_DRM_SUN4I) += sun4i_backend.o > + > +obj-$(CONFIG_DRM_SUN4I) += sun4i_tv.o > diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c > b/drivers/gpu/drm/sun4i/sun4i_tv.c > new file mode 100644 > index ..78634dfc0f77 > --- /dev/null > +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c > @@ -0,0 +1,621 @@ > +/* > + * Copyright (C) 2015 Free Electrons > + * Copyright (C) 2015 NextThing Co > + * > + * Maxime Ripard > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > + > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > + > +#include "sun4i_backend.h" > +#include "sun4i_drv.h" > +#include "sun4i_tcon.h" > + > +#define SUN4I_TVE_EN_REG 0x000 > +#define SUN4I_TVE_EN_DAC_MAP_MASKGENMASK(19, 4) > +#define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac > + 1) * 4) > +#define SUN4I_TVE_EN_ENABLE BIT(0) > + > +#define SUN4I_TVE_CFG0_REG 0x004 > +#define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26) > +#define SUN4I_TVE_CFG0_CORE_DATAPATH_54M BIT(25) > +#define SUN4I_TVE_CFG0_CORE_CONTROL_54M BIT(24) > +#define SUN4I_TVE_CFG0_YC_EN BIT(17) > +#define SUN4I_TVE_CFG0_COMP_EN BIT(16) > +#define SUN4I_TVE_CFG0_RES(x)((x) & 0xf) > +#define SUN4I_TVE_CFG0_RES_480i SUN4I_TVE_CFG0_RES(0) > +#define SUN4I_TVE_CFG0_RES_576i SUN4I_TVE_CFG0_RES(1) > + > +#define SUN4I_TVE_DAC0_REG 0x008 > +#define SUN4I_TVE_DAC0_CLOCK_INVERT BIT(24) > +#define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20) > +#define SUN4I_TVE_DAC0_LUMA_0_4 SUN4I_TVE_DAC0_LUMA(3) > +#define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18) > +#define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3) > +#define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16) > +#define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS > SUN4I_TVE_DAC0_INTERNAL_DAC(3) > +#define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac) > + > +#define SUN4I_TVE_NOTCH_REG 0x00c > +#define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3)) > + > +#define SUN4I_TVE_CHROMA_FREQ_REG0x010 > + > +#define SUN4I_TVE_PORCH_REG 0x014 > +#define SUN4I_TVE_PORCH_BACK(x) ((x) << 16) > +#define SUN4I_TVE_PORCH_FRONT(x) (x) > + > +#define SUN4I_TVE_LINE_REG 0x01c > +#define SUN4I_TVE_LINE_FIRST(x) ((x) << 16) > +#define SUN4I_TVE_LINE_NUMBER(x) (x) > + > +#define SUN4I_TVE_LEVEL_REG 0x020 > +#define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16) > +#define SUN4I_TVE_LEVEL_BLACK(x) (x) > + > +#define SUN4I_TVE_DAC1_REG 0x024 > +#define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8)) > + > +#define SUN4I_TVE_DETECT_STA_REG 0x038 > +#define SUN4I_TVE_DETECT_STA_DAC(dac)BIT((dac * 8)) > +#define SUN4I_TVE_DETECT_STA_UNCONNECTED 0 > +#define SUN4I_TVE_DETECT_STA_CONNECTED 1 > +#define SUN4I_TVE_DETECT_STA_GROUND 2 > + > +#define SUN4I_TVE_CB_CR_LVL_REG 0x10c > +#define SUN4I_TVE_CB_CR_LVL_CR_BURST(x) ((x) << 8) > +#define SUN4I_TVE_CB_CR_LVL_CB_BURST(x) (x) > + > +#define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110 > +#define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x) > + > +#define SUN4I_TVE_BURST_WIDTH_REG0x114 > +#define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16) > +#define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8) > +#define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x) > + > +#define SUN4I_TVE_CB_CR_GAIN_REG 0x118 > +#define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) <
