Re: [PATCH v4 14/15] drm/i915/huc: define gsc-compatible HuC fw for DG2

2022-09-09 Thread Teres Alexis, Alan Previn 
Nit: wish some of those macro param names were more descriptive, example : 
fw_def -> fw_namer or prefix -> gen
But that's irrelevant here, so

Reviewed-by: Alan Previn 


On Thu, 2022-09-08 at 17:16 -0700, Ceraolo Spurio, Daniele wrote:
> The fw name is different and we need to record the fact that the blob is
> gsc-loaded, so add a new macro to help.
> 
> Note: A-step DG2 G10 does not support HuC loading via GSC and would
> require a separate firmware to be loaded the legacy way, but that's
> not a production stepping so we're not going to bother.
> 
> v2: rebase on new fw fetch logic
> 
> Signed-off-by: Daniele Ceraolo Spurio 
> Cc: Tony Ye 
> Reviewed-by: Alan Previn  #v1
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 23 ---
>  1 file changed, 16 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 
> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 4792960d9c04..09e06ac8bcf1 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -91,7 +91,8 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
>   fw_def(BROXTON,  0, guc_mmp(bxt,  70, 1, 1)) \
>   fw_def(SKYLAKE,  0, guc_mmp(skl,  70, 1, 1))
>  
> -#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \
> +#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
> + fw_def(DG2,  0, huc_gsc(dg2)) \
>   fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
>   fw_def(ALDERLAKE_S,  0, huc_mmp(tgl,  7, 9, 3)) \
>   fw_def(DG1,  0, huc_mmp(dg1,  7, 9, 3)) \
> @@ -137,6 +138,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
>  #define MAKE_HUC_FW_PATH_BLANK(prefix_) \
>   __MAKE_UC_FW_PATH_BLANK(prefix_, "_huc")
>  
> +#define MAKE_HUC_FW_PATH_GSC(prefix_) \
> + __MAKE_UC_FW_PATH_BLANK(prefix_, "_huc_gsc")
> +
>  #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \
>   __MAKE_UC_FW_PATH_MMP(prefix_, "_huc_", major_, minor_, patch_)
>  
> @@ -149,7 +153,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
>   MODULE_FIRMWARE(uc_);
>  
>  INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, 
> MAKE_GUC_FW_PATH_MMP)
> -INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, 
> MAKE_HUC_FW_PATH_MMP)
> +INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, 
> MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC)
>  
>  /*
>   * The next expansion of the table macros (in __uc_fw_auto_select below) 
> provides
> @@ -164,6 +168,7 @@ struct __packed uc_fw_blob {
>   u8 major;
>   u8 minor;
>   u8 patch;
> + bool loaded_via_gsc;
>  };
>  
>  #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
> @@ -172,16 +177,16 @@ struct __packed uc_fw_blob {
>   .patch = patch_, \
>   .path = path_,
>  
> -#define UC_FW_BLOB_NEW(major_, minor_, patch_, path_) \
> +#define UC_FW_BLOB_NEW(major_, minor_, patch_, gsc_, path_) \
>   { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
> -   .legacy = false }
> +   .legacy = false, .loaded_via_gsc = gsc_ }
>  
>  #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \
>   { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
> .legacy = true }
>  
>  #define GUC_FW_BLOB(prefix_, major_, minor_) \
> - UC_FW_BLOB_NEW(major_, minor_, 0, \
> + UC_FW_BLOB_NEW(major_, minor_, 0, false, \
>  MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_))
>  
>  #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
> @@ -189,12 +194,15 @@ struct __packed uc_fw_blob {
>  MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
>  
>  #define HUC_FW_BLOB(prefix_) \
> - UC_FW_BLOB_NEW(0, 0, 0, MAKE_HUC_FW_PATH_BLANK(prefix_))
> + UC_FW_BLOB_NEW(0, 0, 0, false, MAKE_HUC_FW_PATH_BLANK(prefix_))
>  
>  #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
>   UC_FW_BLOB_OLD(major_, minor_, patch_, \
>  MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
>  
> +#define HUC_FW_BLOB_GSC(prefix_) \
> + UC_FW_BLOB_NEW(0, 0, 0, true, MAKE_HUC_FW_PATH_GSC(prefix_))
> +
>  struct __packed uc_fw_platform_requirement {
>   enum intel_platform p;
>   u8 rev; /* first platform rev using this FW */
> @@ -220,7 +228,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct 
> intel_uc_fw *uc_fw)
>   INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, 
> GUC_FW_BLOB_MMP)
>   };
>   static const struct uc_fw_platform_requirement blobs_huc[] = {
> - INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, 
> HUC_FW_BLOB_MMP)
> + INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, 
> HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC)
>   };
>   static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = 
> {
>   [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
> @@ -266,6 +274,7 @@ __uc_fw_auto_select(st

Re: [PATCH v4 14/15] drm/i915/huc: define gsc-compatible HuC fw for DG2

2022-09-09 Thread Ye, Tony 



On 9/8/2022 5:16 PM, Daniele Ceraolo Spurio wrote:

The fw name is different and we need to record the fact that the blob is
gsc-loaded, so add a new macro to help.

Note: A-step DG2 G10 does not support HuC loading via GSC and would
require a separate firmware to be loaded the legacy way, but that's
not a production stepping so we're not going to bother.

v2: rebase on new fw fetch logic

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Tony Ye 
Reviewed-by: Alan Previn  #v1
---
  drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 23 ---
  1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 4792960d9c04..09e06ac8bcf1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -91,7 +91,8 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
fw_def(BROXTON,  0, guc_mmp(bxt,  70, 1, 1)) \
fw_def(SKYLAKE,  0, guc_mmp(skl,  70, 1, 1))
  
-#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \

+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
+   fw_def(DG2,  0, huc_gsc(dg2)) \
fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
fw_def(ALDERLAKE_S,  0, huc_mmp(tgl,  7, 9, 3)) \
fw_def(DG1,  0, huc_mmp(dg1,  7, 9, 3)) \
@@ -137,6 +138,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
  #define MAKE_HUC_FW_PATH_BLANK(prefix_) \
__MAKE_UC_FW_PATH_BLANK(prefix_, "_huc")
  
+#define MAKE_HUC_FW_PATH_GSC(prefix_) \

+   __MAKE_UC_FW_PATH_BLANK(prefix_, "_huc_gsc")
+
  #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \
__MAKE_UC_FW_PATH_MMP(prefix_, "_huc_", major_, minor_, patch_)
  
@@ -149,7 +153,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,

MODULE_FIRMWARE(uc_);
  
  INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, MAKE_GUC_FW_PATH_MMP)

-INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, 
MAKE_HUC_FW_PATH_MMP)
+INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, 
MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC)
  
  /*

   * The next expansion of the table macros (in __uc_fw_auto_select below) 
provides
@@ -164,6 +168,7 @@ struct __packed uc_fw_blob {
u8 major;
u8 minor;
u8 patch;
+   bool loaded_via_gsc;
  };
  
  #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \

@@ -172,16 +177,16 @@ struct __packed uc_fw_blob {
.patch = patch_, \
.path = path_,
  
-#define UC_FW_BLOB_NEW(major_, minor_, patch_, path_) \

+#define UC_FW_BLOB_NEW(major_, minor_, patch_, gsc_, path_) \
{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
- .legacy = false }
+ .legacy = false, .loaded_via_gsc = gsc_ }
  
  #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \

{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
  .legacy = true }
  
  #define GUC_FW_BLOB(prefix_, major_, minor_) \

-   UC_FW_BLOB_NEW(major_, minor_, 0, \
+   UC_FW_BLOB_NEW(major_, minor_, 0, false, \
   MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_))
  
  #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \

@@ -189,12 +194,15 @@ struct __packed uc_fw_blob {
   MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
  
  #define HUC_FW_BLOB(prefix_) \

-   UC_FW_BLOB_NEW(0, 0, 0, MAKE_HUC_FW_PATH_BLANK(prefix_))
+   UC_FW_BLOB_NEW(0, 0, 0, false, MAKE_HUC_FW_PATH_BLANK(prefix_))
  
  #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \

UC_FW_BLOB_OLD(major_, minor_, patch_, \
   MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
  
+#define HUC_FW_BLOB_GSC(prefix_) \

+   UC_FW_BLOB_NEW(0, 0, 0, true, MAKE_HUC_FW_PATH_GSC(prefix_))
+
  struct __packed uc_fw_platform_requirement {
enum intel_platform p;
u8 rev; /* first platform rev using this FW */
@@ -220,7 +228,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct 
intel_uc_fw *uc_fw)
INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, 
GUC_FW_BLOB_MMP)
};
static const struct uc_fw_platform_requirement blobs_huc[] = {
-   INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, 
HUC_FW_BLOB_MMP)
+   INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, 
HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC)
};
static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = 
{
[INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
@@ -266,6 +274,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct 
intel_uc_fw *uc_fw)
uc_fw->file_wanted.path = blob->path;
uc_fw->file_wanted.major_ver = blob->major;
uc_fw->file_wanted.minor_ver = blob->minor;
+   uc_fw->loaded_via_gsc = blob->loaded_via_gsc

[PATCH v4 14/15] drm/i915/huc: define gsc-compatible HuC fw for DG2

2022-09-08 Thread Daniele Ceraolo Spurio 
The fw name is different and we need to record the fact that the blob is
gsc-loaded, so add a new macro to help.

Note: A-step DG2 G10 does not support HuC loading via GSC and would
require a separate firmware to be loaded the legacy way, but that's
not a production stepping so we're not going to bother.

v2: rebase on new fw fetch logic

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Tony Ye 
Reviewed-by: Alan Previn  #v1
---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 23 ---
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 4792960d9c04..09e06ac8bcf1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -91,7 +91,8 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
fw_def(BROXTON,  0, guc_mmp(bxt,  70, 1, 1)) \
fw_def(SKYLAKE,  0, guc_mmp(skl,  70, 1, 1))
 
-#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
+   fw_def(DG2,  0, huc_gsc(dg2)) \
fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
fw_def(ALDERLAKE_S,  0, huc_mmp(tgl,  7, 9, 3)) \
fw_def(DG1,  0, huc_mmp(dg1,  7, 9, 3)) \
@@ -137,6 +138,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
 #define MAKE_HUC_FW_PATH_BLANK(prefix_) \
__MAKE_UC_FW_PATH_BLANK(prefix_, "_huc")
 
+#define MAKE_HUC_FW_PATH_GSC(prefix_) \
+   __MAKE_UC_FW_PATH_BLANK(prefix_, "_huc_gsc")
+
 #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \
__MAKE_UC_FW_PATH_MMP(prefix_, "_huc_", major_, minor_, patch_)
 
@@ -149,7 +153,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
MODULE_FIRMWARE(uc_);
 
 INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, 
MAKE_GUC_FW_PATH_MMP)
-INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, 
MAKE_HUC_FW_PATH_MMP)
+INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, 
MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC)
 
 /*
  * The next expansion of the table macros (in __uc_fw_auto_select below) 
provides
@@ -164,6 +168,7 @@ struct __packed uc_fw_blob {
u8 major;
u8 minor;
u8 patch;
+   bool loaded_via_gsc;
 };
 
 #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
@@ -172,16 +177,16 @@ struct __packed uc_fw_blob {
.patch = patch_, \
.path = path_,
 
-#define UC_FW_BLOB_NEW(major_, minor_, patch_, path_) \
+#define UC_FW_BLOB_NEW(major_, minor_, patch_, gsc_, path_) \
{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
- .legacy = false }
+ .legacy = false, .loaded_via_gsc = gsc_ }
 
 #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \
{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
  .legacy = true }
 
 #define GUC_FW_BLOB(prefix_, major_, minor_) \
-   UC_FW_BLOB_NEW(major_, minor_, 0, \
+   UC_FW_BLOB_NEW(major_, minor_, 0, false, \
   MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_))
 
 #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
@@ -189,12 +194,15 @@ struct __packed uc_fw_blob {
   MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
 
 #define HUC_FW_BLOB(prefix_) \
-   UC_FW_BLOB_NEW(0, 0, 0, MAKE_HUC_FW_PATH_BLANK(prefix_))
+   UC_FW_BLOB_NEW(0, 0, 0, false, MAKE_HUC_FW_PATH_BLANK(prefix_))
 
 #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
UC_FW_BLOB_OLD(major_, minor_, patch_, \
   MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
 
+#define HUC_FW_BLOB_GSC(prefix_) \
+   UC_FW_BLOB_NEW(0, 0, 0, true, MAKE_HUC_FW_PATH_GSC(prefix_))
+
 struct __packed uc_fw_platform_requirement {
enum intel_platform p;
u8 rev; /* first platform rev using this FW */
@@ -220,7 +228,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct 
intel_uc_fw *uc_fw)
INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, 
GUC_FW_BLOB_MMP)
};
static const struct uc_fw_platform_requirement blobs_huc[] = {
-   INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, 
HUC_FW_BLOB_MMP)
+   INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, 
HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC)
};
static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = 
{
[INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
@@ -266,6 +274,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct 
intel_uc_fw *uc_fw)
uc_fw->file_wanted.path = blob->path;
uc_fw->file_wanted.major_ver = blob->major;
uc_fw->file_wanted.minor_ver = blob->minor;
+   uc_fw->loaded_via_gsc = blob->loaded_via_gsc;
break;
}
 
-- 
2.37.2