Re: [PATCH v4 72/78] drm/vc4: hdmi: Do the VID_CTL configuration at once

[Dave Stevenson]

Hi Maxime

On Wed, 8 Jul 2020 at 18:44, Maxime Ripard  wrote:
>
> The VID_CTL setup is done in several places in the driver even though it's
> not really required. Let's simplify it a bit to do the configuration in one
> go.
>
> Signed-off-by: Maxime Ripard 

Reviewed-by: Dave Stevenson 

> ---
>  drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++
>  1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index bbe521ab000b..f56a718a3643 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -428,10 +428,6 @@ static void vc4_hdmi_set_timings(struct vc4_hdmi 
> *vc4_hdmi,
>
> HDMI_WRITE(HDMI_VERTB0, vertb_even);
> HDMI_WRITE(HDMI_VERTB1, vertb);
> -
> -   HDMI_WRITE(HDMI_VID_CTL,
> -  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
> -  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
>  }
>
>  static void vc4_hdmi_recenter_fifo(struct vc4_hdmi *vc4_hdmi)
> @@ -520,8 +516,6 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct 
> drm_encoder *encoder)
> if (vc4_hdmi->variant->phy_init)
> vc4_hdmi->variant->phy_init(vc4_hdmi, mode);
>
> -   HDMI_WRITE(HDMI_VID_CTL, 0);
> -
> HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
>HDMI_READ(HDMI_SCHEDULER_CONTROL) |
>VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT |
> @@ -555,15 +549,19 @@ static void vc4_hdmi_encoder_pre_crtc_enable(struct 
> drm_encoder *encoder)
>
>  static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder)
>  {
> +   struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
> struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
> struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
> +   bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
> +   bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
> int ret;
>
> HDMI_WRITE(HDMI_VID_CTL,
> -  HDMI_READ(HDMI_VID_CTL) |
>VC4_HD_VID_CTL_ENABLE |
>VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
> -  VC4_HD_VID_CTL_FRAME_COUNTER_RESET);
> +  VC4_HD_VID_CTL_FRAME_COUNTER_RESET |
> +  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
> +  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
>
> if (vc4_encoder->hdmi_monitor) {
> HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
> --
> git-series 0.9.1
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[PATCH v4 72/78] drm/vc4: hdmi: Do the VID_CTL configuration at once

[Maxime Ripard]

The VID_CTL setup is done in several places in the driver even though it's
not really required. Let's simplify it a bit to do the configuration in one
go.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index bbe521ab000b..f56a718a3643 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -428,10 +428,6 @@ static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
-
-   HDMI_WRITE(HDMI_VID_CTL,
-  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
-  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
 }
 
 static void vc4_hdmi_recenter_fifo(struct vc4_hdmi *vc4_hdmi)
@@ -520,8 +516,6 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct 
drm_encoder *encoder)
if (vc4_hdmi->variant->phy_init)
vc4_hdmi->variant->phy_init(vc4_hdmi, mode);
 
-   HDMI_WRITE(HDMI_VID_CTL, 0);
-
HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
   HDMI_READ(HDMI_SCHEDULER_CONTROL) |
   VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT |
@@ -555,15 +549,19 @@ static void vc4_hdmi_encoder_pre_crtc_enable(struct 
drm_encoder *encoder)
 
 static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder)
 {
+   struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
+   bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
+   bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
int ret;
 
HDMI_WRITE(HDMI_VID_CTL,
-  HDMI_READ(HDMI_VID_CTL) |
   VC4_HD_VID_CTL_ENABLE |
   VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
-  VC4_HD_VID_CTL_FRAME_COUNTER_RESET);
+  VC4_HD_VID_CTL_FRAME_COUNTER_RESET |
+  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
+  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
 
if (vc4_encoder->hdmi_monitor) {
HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
-- 
git-series 0.9.1
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