Re: [PATCH v6 5/9] drm/meson: gate px_clk when setting rate

[Neil Armstrong]

On 30/06/2023 20:10, George Stark wrote:

Hello Neil

On 6/30/23 19:29, Neil Armstrong wrote:

Disable the px_clk when setting the rate to recover a fully
configured and correctly reset VCLK clock tree after the rate
is set.

Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
Signed-off-by: Neil Armstrong 
---
  drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c 
b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index 57447abf1a29..dc63d2d813a9 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -94,6 +94,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
  return ret;
  }
+    clk_disable_unprepare(mipi_dsi->px_clk);
  ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
  if (ret) {
@@ -102,6 +103,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
  return ret;
  }
+    clk_prepare_enable(mipi_dsi->px_clk);

probably should be:
ret = clk_prepare_enable(mipi_dsi->px_clk);


Indeed, thx for noticing :-)


+    if (ret) {
+    dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", 
ret);
+    return ret;
+    }
+
  switch (mipi_dsi->dsi_device->format) {
  case MIPI_DSI_FMT_RGB888:
  dpi_data_format = DPI_COLOR_24BIT;

Re: [PATCH v6 5/9] drm/meson: gate px_clk when setting rate

[George Stark]

Hello Neil

On 6/30/23 19:29, Neil Armstrong wrote:

Disable the px_clk when setting the rate to recover a fully
configured and correctly reset VCLK clock tree after the rate
is set.

Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
Signed-off-by: Neil Armstrong 
---
  drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c 
b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index 57447abf1a29..dc63d2d813a9 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -94,6 +94,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
return ret;
}
  
+	clk_disable_unprepare(mipi_dsi->px_clk);

ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
  
  	if (ret) {

@@ -102,6 +103,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
return ret;
}
  
+	clk_prepare_enable(mipi_dsi->px_clk);

probably should be:
ret = clk_prepare_enable(mipi_dsi->px_clk);

+   if (ret) {
+   dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret 
%d)\n", ret);
+   return ret;
+   }
+
switch (mipi_dsi->dsi_device->format) {
case MIPI_DSI_FMT_RGB888:
dpi_data_format = DPI_COLOR_24BIT;


--
Best regards
George

[PATCH v6 5/9] drm/meson: gate px_clk when setting rate

[Neil Armstrong]

Disable the px_clk when setting the rate to recover a fully
configured and correctly reset VCLK clock tree after the rate
is set.

Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
Signed-off-by: Neil Armstrong 
---
 drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c 
b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index 57447abf1a29..dc63d2d813a9 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -94,6 +94,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
return ret;
}
 
+   clk_disable_unprepare(mipi_dsi->px_clk);
ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
 
if (ret) {
@@ -102,6 +103,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
return ret;
}
 
+   clk_prepare_enable(mipi_dsi->px_clk);
+   if (ret) {
+   dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret 
%d)\n", ret);
+   return ret;
+   }
+
switch (mipi_dsi->dsi_device->format) {
case MIPI_DSI_FMT_RGB888:
dpi_data_format = DPI_COLOR_24BIT;

-- 
2.34.1