Re: [PATCH v7 08/14] drm/msm/dpu: don't use merge_3d if DSC merge topology is used

2022-04-19 Thread Abhinav Kumar 




On 4/6/2022 2:40 AM, Vinod Koul wrote:

From: Dmitry Baryshkov 

DPU supports different topologies for the case when multiple INTFs are
being driven by the single phys_enc. The driver defaults to using 3DMux
in such cases. Don't use it if DSC merge is used instead.

Suggested-by: Abhinav Kumar 
Signed-off-by: Dmitry Baryshkov 
Signed-off-by: Vinod Koul 


Thank you for making the change generic as suggested.

Reviewed-by: Abhinav Kumar 


---
  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c  | 16 
  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h  |  6 ++
  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h |  4 +++-
  3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 4052486f19d8..95d1588f3bb6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -511,6 +511,22 @@ void dpu_encoder_helper_split_config(
}
  }
  
+bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc)

+{
+   struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
+   int i, intf_count = 0, num_dsc = 0;
+
+   for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
+   if (dpu_enc->phys_encs[i])
+   intf_count++;
+
+   /* See dpu_encoder_get_topology, we only support 2:2:1 topology */
+   if (dpu_enc->dsc)
+   num_dsc = 2;
+
+   return (num_dsc > 0) && (num_dsc > intf_count);
+}
+
  static struct msm_display_topology dpu_encoder_get_topology(
struct dpu_encoder_virt *dpu_enc,
struct dpu_kms *dpu_kms,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index ef873e5285a0..084c5265d7e5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -172,4 +172,10 @@ int dpu_encoder_get_linecount(struct drm_encoder *drm_enc);
   */
  int dpu_encoder_get_vsync_count(struct drm_encoder *drm_enc);
  
+/**

+ * dpu_encoder_use_dsc_merge - returns true if the encoder uses DSC merge 
topology.
+ * @drm_enc:Pointer to previously created drm encoder structure
+ */
+bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc);
+
  #endif /* __DPU_ENCODER_H__ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index 4842070fdfa8..b5ad43b8a19b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -314,8 +314,10 @@ static inline enum dpu_3d_blend_mode 
dpu_encoder_helper_get_3d_blend_mode(
  
  	dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
  
+	/* Use merge_3d unless DSC MERGE topology is used */

if (phys_enc->split_role == ENC_ROLE_SOLO &&
-   dpu_cstate->num_mixers == CRTC_DUAL_MIXERS)
+   dpu_cstate->num_mixers == CRTC_DUAL_MIXERS &&
+   !dpu_encoder_use_dsc_merge(phys_enc->parent))
return BLEND_3D_H_ROW_INT;
  
  	return BLEND_3D_NONE;

[PATCH v7 08/14] drm/msm/dpu: don't use merge_3d if DSC merge topology is used

2022-04-06 Thread Vinod Koul 
From: Dmitry Baryshkov 

DPU supports different topologies for the case when multiple INTFs are
being driven by the single phys_enc. The driver defaults to using 3DMux
in such cases. Don't use it if DSC merge is used instead.

Suggested-by: Abhinav Kumar 
Signed-off-by: Dmitry Baryshkov 
Signed-off-by: Vinod Koul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c  | 16 
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h  |  6 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h |  4 +++-
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 4052486f19d8..95d1588f3bb6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -511,6 +511,22 @@ void dpu_encoder_helper_split_config(
}
 }
 
+bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc)
+{
+   struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
+   int i, intf_count = 0, num_dsc = 0;
+
+   for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
+   if (dpu_enc->phys_encs[i])
+   intf_count++;
+
+   /* See dpu_encoder_get_topology, we only support 2:2:1 topology */
+   if (dpu_enc->dsc)
+   num_dsc = 2;
+
+   return (num_dsc > 0) && (num_dsc > intf_count);
+}
+
 static struct msm_display_topology dpu_encoder_get_topology(
struct dpu_encoder_virt *dpu_enc,
struct dpu_kms *dpu_kms,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index ef873e5285a0..084c5265d7e5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -172,4 +172,10 @@ int dpu_encoder_get_linecount(struct drm_encoder *drm_enc);
  */
 int dpu_encoder_get_vsync_count(struct drm_encoder *drm_enc);
 
+/**
+ * dpu_encoder_use_dsc_merge - returns true if the encoder uses DSC merge 
topology.
+ * @drm_enc:Pointer to previously created drm encoder structure
+ */
+bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc);
+
 #endif /* __DPU_ENCODER_H__ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index 4842070fdfa8..b5ad43b8a19b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -314,8 +314,10 @@ static inline enum dpu_3d_blend_mode 
dpu_encoder_helper_get_3d_blend_mode(
 
dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
 
+   /* Use merge_3d unless DSC MERGE topology is used */
if (phys_enc->split_role == ENC_ROLE_SOLO &&
-   dpu_cstate->num_mixers == CRTC_DUAL_MIXERS)
+   dpu_cstate->num_mixers == CRTC_DUAL_MIXERS &&
+   !dpu_encoder_use_dsc_merge(phys_enc->parent))
return BLEND_3D_H_ROW_INT;
 
return BLEND_3D_NONE;
-- 
2.34.1