Re: [PATCH v9 15/22] drm/mediatek: dpi: Add dpintf support
On Tue, 29 Mar 2022 05:16, Rex-BC Chen wrote:
>On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote:
>> dpintf is the displayport interface hardware unit. This unit is
>> similar
>> to dpi and can reuse most of the code.
>>
>> This patch adds support for mt8195-dpintf to this dpi driver. Main
>> differences are:
>> - Some features/functional components are not available for dpintf
>>which are now excluded from code execution once is_dpintf is set
>> - dpintf can and needs to choose between different clockdividers
>> based
>>on the clockspeed. This is done by choosing a different clock
>> parent.
>> - There are two additional clocks that need to be managed. These are
>>only set for dpintf and will be set to NULL if not supplied. The
>>clk_* calls handle these as normal clocks then.
>> - Some register contents differ slightly between the two components.
>> To
>>work around this I added register bits/masks with a DPINTF_ prefix
>>and use them where different.
>>
>> Based on a separate driver for dpintf created by
>> Jason-JH.Lin .
>>
>> Signed-off-by: Markus Schneider-Pargmann
>> Signed-off-by: Guillaume Ranquet
>> Reviewed-by: AngeloGioacchino Del Regno <
>> angelogioacchino.delre...@collabora.com>
>> ---
>> drivers/gpu/drm/mediatek/mtk_dpi.c | 78 ++-
>> --
>> drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 38 ++
>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 8 +++
>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
>> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-
>> include/linux/soc/mediatek/mtk-mmsys.h | 2 +
>> 6 files changed, 120 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
>> b/drivers/gpu/drm/mediatek/mtk_dpi.c
>> index eb969c5c5c2e..8198d3cf23ac 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
>> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
>> @@ -126,6 +126,7 @@ struct mtk_dpi_conf {
>> const u32 *output_fmts;
>> u32 num_output_fmts;
>> bool is_ck_de_pol;
>> +bool is_dpintf;
>> bool swap_input_support;
>> /* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
>> (no shift) */
>> u32 dimension_mask;
>> @@ -498,11 +499,11 @@ static int mtk_dpi_set_display_mode(struct
>> mtk_dpi *dpi,
>>
>> vm.pixelclock = pll_rate / factor;
>> if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
>> -(dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE))
>> + (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) {
>> clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2);
>> -else
>> +} else {
>> clk_set_rate(dpi->pixel_clk, vm.pixelclock);
>> -
>> +}
>>
>> vm.pixelclock = clk_get_rate(dpi->pixel_clk);
>>
>> @@ -515,9 +516,15 @@ static int mtk_dpi_set_display_mode(struct
>> mtk_dpi *dpi,
>> MTK_DPI_POLARITY_FALLING :
>> MTK_DPI_POLARITY_RISING;
>> dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ?
>> MTK_DPI_POLARITY_FALLING :
>> MTK_DPI_POLARITY_RISING;
>> -hsync.sync_width = vm.hsync_len;
>> -hsync.back_porch = vm.hback_porch;
>> -hsync.front_porch = vm.hfront_porch;
>> +if (dpi->conf->is_dpintf) {
>> +hsync.sync_width = vm.hsync_len / 4;
>> +hsync.back_porch = vm.hback_porch / 4;
>> +hsync.front_porch = vm.hfront_porch / 4;
>> +} else {
>> +hsync.sync_width = vm.hsync_len;
>> +hsync.back_porch = vm.hback_porch;
>> +hsync.front_porch = vm.hfront_porch;
>> +}
>> hsync.shift_half_line = false;
>> vsync_lodd.sync_width = vm.vsync_len;
>> vsync_lodd.back_porch = vm.vback_porch;
>> @@ -559,13 +566,20 @@ static int mtk_dpi_set_display_mode(struct
>> mtk_dpi *dpi,
>> mtk_dpi_config_channel_limit(dpi);
>> mtk_dpi_config_bit_num(dpi, dpi->bit_num);
>> mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
>> -mtk_dpi_config_yc_map(dpi, dpi->yc_map);
>> mtk_dpi_config_color_format(dpi, dpi->color_format);
>> -mtk_dpi_config_2n_h_fre(dpi);
>> -mtk_dpi_dual_edge(dpi);
>> -mtk_dpi_config_disable_edge(dpi);
>> +if (dpi->conf->is_dpintf) {
>> +mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN,
>> + DPINTF_INPUT_2P_EN);
>> +} else {
>> +mtk_dpi_config_yc_map(dpi, dpi->yc_map);
>> +mtk_dpi_config_2n_h_fre(dpi);
>> +mtk_dpi_dual_edge(dpi);
>> +mtk_dpi_config_disable_edge(dpi);
>> +}
>> mtk_dpi_sw_reset(dpi, false);
>>
>> +mtk_dpi_enable(dpi);
>> +
>> return 0;
>> }
>>
>> @@ -642,7 +656,10 @@ static int mtk_dpi_bridge_atomic_check(struct
>> drm_bridge *bridge,
>> dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
>> dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
>> dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
>> -dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
>> +if (out_bus_format ==
Re: [PATCH v9 15/22] drm/mediatek: dpi: Add dpintf support
On Mon, 28 Mar 2022 10:38, Rex-BC Chen wrote:
>Hello Guillaume,
>
>Thanks for your patch, but I have some questions for this patch:
>
>On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote:
>> dpintf is the displayport interface hardware unit. This unit is
>> similar
>> to dpi and can reuse most of the code.
>>
>> This patch adds support for mt8195-dpintf to this dpi driver. Main
>> differences are:
>> - Some features/functional components are not available for dpintf
>>which are now excluded from code execution once is_dpintf is set
>> - dpintf can and needs to choose between different clockdividers
>> based
>>on the clockspeed. This is done by choosing a different clock
>> parent.
>> - There are two additional clocks that need to be managed. These are
>>only set for dpintf and will be set to NULL if not supplied. The
>>clk_* calls handle these as normal clocks then.
>> - Some register contents differ slightly between the two components.
>> To
>>work around this I added register bits/masks with a DPINTF_ prefix
>>and use them where different.
>>
>> Based on a separate driver for dpintf created by
>> Jason-JH.Lin .
>>
>> Signed-off-by: Markus Schneider-Pargmann
>> Signed-off-by: Guillaume Ranquet
>> Reviewed-by: AngeloGioacchino Del Regno <
>> angelogioacchino.delre...@collabora.com>
>> ---
>> drivers/gpu/drm/mediatek/mtk_dpi.c | 78 ++-
>> --
>> drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 38 ++
>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 8 +++
>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
>> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-
>> include/linux/soc/mediatek/mtk-mmsys.h | 2 +
>> 6 files changed, 120 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
>> b/drivers/gpu/drm/mediatek/mtk_dpi.c
>> index eb969c5c5c2e..8198d3cf23ac 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
>> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
>> @@ -126,6 +126,7 @@ struct mtk_dpi_conf {
>> const u32 *output_fmts;
>> u32 num_output_fmts;
>> bool is_ck_de_pol;
>> +bool is_dpintf;
>> bool swap_input_support;
>> /* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
>> (no shift) */
>> u32 dimension_mask;
>> @@ -498,11 +499,11 @@ static int mtk_dpi_set_display_mode(struct
>> mtk_dpi *dpi,
>>
>> vm.pixelclock = pll_rate / factor;
>> if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
>> -(dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE))
>> + (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) {
>> clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2);
>> -else
>> +} else {
>> clk_set_rate(dpi->pixel_clk, vm.pixelclock);
>> -
>> +}
>>
>> vm.pixelclock = clk_get_rate(dpi->pixel_clk);
>>
>> @@ -515,9 +516,15 @@ static int mtk_dpi_set_display_mode(struct
>> mtk_dpi *dpi,
>> MTK_DPI_POLARITY_FALLING :
>> MTK_DPI_POLARITY_RISING;
>> dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ?
>> MTK_DPI_POLARITY_FALLING :
>> MTK_DPI_POLARITY_RISING;
>> -hsync.sync_width = vm.hsync_len;
>> -hsync.back_porch = vm.hback_porch;
>> -hsync.front_porch = vm.hfront_porch;
>> +if (dpi->conf->is_dpintf) {
>> +hsync.sync_width = vm.hsync_len / 4;
>> +hsync.back_porch = vm.hback_porch / 4;
>> +hsync.front_porch = vm.hfront_porch / 4;
>> +} else {
>> +hsync.sync_width = vm.hsync_len;
>> +hsync.back_porch = vm.hback_porch;
>> +hsync.front_porch = vm.hfront_porch;
>> +}
>> hsync.shift_half_line = false;
>> vsync_lodd.sync_width = vm.vsync_len;
>> vsync_lodd.back_porch = vm.vback_porch;
>> @@ -559,13 +566,20 @@ static int mtk_dpi_set_display_mode(struct
>> mtk_dpi *dpi,
>> mtk_dpi_config_channel_limit(dpi);
>> mtk_dpi_config_bit_num(dpi, dpi->bit_num);
>> mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
>> -mtk_dpi_config_yc_map(dpi, dpi->yc_map);
>> mtk_dpi_config_color_format(dpi, dpi->color_format);
>> -mtk_dpi_config_2n_h_fre(dpi);
>> -mtk_dpi_dual_edge(dpi);
>> -mtk_dpi_config_disable_edge(dpi);
>> +if (dpi->conf->is_dpintf) {
>> +mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN,
>> + DPINTF_INPUT_2P_EN);
>> +} else {
>> +mtk_dpi_config_yc_map(dpi, dpi->yc_map);
>> +mtk_dpi_config_2n_h_fre(dpi);
>> +mtk_dpi_dual_edge(dpi);
>> +mtk_dpi_config_disable_edge(dpi);
>> +}
>> mtk_dpi_sw_reset(dpi, false);
>>
>> +mtk_dpi_enable(dpi);
>
>Why do we need to add mtk_dpi_enable() here?
>Will this change the power on sequence?
>
I have been told that this is to avoid artifacts on screen, the
mtk_dpi_enable() is done
in mtk_dpi_set_display_mode() instead of mtk_dpi_power_on();
I will try to convey that
[PATCH v9 15/22] drm/mediatek: dpi: Add dpintf support
dpintf is the displayport interface hardware unit. This unit is similar
to dpi and can reuse most of the code.
This patch adds support for mt8195-dpintf to this dpi driver. Main
differences are:
- Some features/functional components are not available for dpintf
which are now excluded from code execution once is_dpintf is set
- dpintf can and needs to choose between different clockdividers based
on the clockspeed. This is done by choosing a different clock parent.
- There are two additional clocks that need to be managed. These are
only set for dpintf and will be set to NULL if not supplied. The
clk_* calls handle these as normal clocks then.
- Some register contents differ slightly between the two components. To
work around this I added register bits/masks with a DPINTF_ prefix
and use them where different.
Based on a separate driver for dpintf created by
Jason-JH.Lin .
Signed-off-by: Markus Schneider-Pargmann
Signed-off-by: Guillaume Ranquet
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 78 ++---
drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 38 ++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 8 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-
include/linux/soc/mediatek/mtk-mmsys.h | 2 +
6 files changed, 120 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
b/drivers/gpu/drm/mediatek/mtk_dpi.c
index eb969c5c5c2e..8198d3cf23ac 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -126,6 +126,7 @@ struct mtk_dpi_conf {
const u32 *output_fmts;
u32 num_output_fmts;
bool is_ck_de_pol;
+ bool is_dpintf;
bool swap_input_support;
/* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH (no shift)
*/
u32 dimension_mask;
@@ -498,11 +499,11 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
vm.pixelclock = pll_rate / factor;
if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
- (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE))
+(dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) {
clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2);
- else
+ } else {
clk_set_rate(dpi->pixel_clk, vm.pixelclock);
-
+ }
vm.pixelclock = clk_get_rate(dpi->pixel_clk);
@@ -515,9 +516,15 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ?
MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
- hsync.sync_width = vm.hsync_len;
- hsync.back_porch = vm.hback_porch;
- hsync.front_porch = vm.hfront_porch;
+ if (dpi->conf->is_dpintf) {
+ hsync.sync_width = vm.hsync_len / 4;
+ hsync.back_porch = vm.hback_porch / 4;
+ hsync.front_porch = vm.hfront_porch / 4;
+ } else {
+ hsync.sync_width = vm.hsync_len;
+ hsync.back_porch = vm.hback_porch;
+ hsync.front_porch = vm.hfront_porch;
+ }
hsync.shift_half_line = false;
vsync_lodd.sync_width = vm.vsync_len;
vsync_lodd.back_porch = vm.vback_porch;
@@ -559,13 +566,20 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
mtk_dpi_config_channel_limit(dpi);
mtk_dpi_config_bit_num(dpi, dpi->bit_num);
mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
- mtk_dpi_config_yc_map(dpi, dpi->yc_map);
mtk_dpi_config_color_format(dpi, dpi->color_format);
- mtk_dpi_config_2n_h_fre(dpi);
- mtk_dpi_dual_edge(dpi);
- mtk_dpi_config_disable_edge(dpi);
+ if (dpi->conf->is_dpintf) {
+ mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN,
+DPINTF_INPUT_2P_EN);
+ } else {
+ mtk_dpi_config_yc_map(dpi, dpi->yc_map);
+ mtk_dpi_config_2n_h_fre(dpi);
+ mtk_dpi_dual_edge(dpi);
+ mtk_dpi_config_disable_edge(dpi);
+ }
mtk_dpi_sw_reset(dpi, false);
+ mtk_dpi_enable(dpi);
+
return 0;
}
@@ -642,7 +656,10 @@ static int mtk_dpi_bridge_atomic_check(struct drm_bridge
*bridge,
dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
- dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
+ if (out_bus_format == MEDIA_BUS_FMT_YUYV8_1X16)
+ dpi->color_format = MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL;
+ else
+ dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
return 0;
}
@@ -801,6 +818,16 @@ static unsigned int mt8183_calculate_factor(int clock)
return 2;
}
+static unsigned
