[PATCHv2] drm/ttm: restructure to allow driver to plug in alternate memory manager
From: Ben Skeggs
Nouveau will need this on GeForce 8 and up to account for the GPU
reordering physical VRAM for some memory types.
v2: rebase to include nvc0_instmem.c changes
Signed-off-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 12 ++-
drivers/gpu/drm/nouveau/nouveau_channel.c |6 +-
drivers/gpu/drm/nouveau/nouveau_notifier.c |2 +-
drivers/gpu/drm/nouveau/nouveau_sgdma.c|4 +-
drivers/gpu/drm/nouveau/nv50_crtc.c|3 +-
drivers/gpu/drm/nouveau/nv50_display.c |2 +-
drivers/gpu/drm/nouveau/nv50_instmem.c |2 +-
drivers/gpu/drm/nouveau/nvc0_instmem.c |2 +-
drivers/gpu/drm/radeon/radeon_object.c |6 +-
drivers/gpu/drm/radeon/radeon_ttm.c| 16 ++--
drivers/gpu/drm/ttm/Makefile |3 +-
drivers/gpu/drm/ttm/ttm_agp_backend.c |3 +-
drivers/gpu/drm/ttm/ttm_bo.c | 100 ---
drivers/gpu/drm/ttm/ttm_bo_manager.c | 148
drivers/gpu/drm/ttm/ttm_bo_util.c |3 +-
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c |3 +-
include/drm/ttm/ttm_bo_api.h |3 +-
include/drm/ttm/ttm_bo_driver.h| 21 -
18 files changed, 226 insertions(+), 113 deletions(-)
create mode 100644 drivers/gpu/drm/ttm/ttm_bo_manager.c
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index c2497bf..522a891 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -399,6 +399,7 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev,
uint32_t type,
man->default_caching = TTM_PL_FLAG_CACHED;
break;
case TTM_PL_VRAM:
+ man->func = &ttm_bo_manager_func;
man->flags = TTM_MEMTYPE_FLAG_FIXED |
TTM_MEMTYPE_FLAG_MAPPABLE;
man->available_caching = TTM_PL_FLAG_UNCACHED |
@@ -407,6 +408,7 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev,
uint32_t type,
man->gpu_offset = dev_priv->vm_vram_base;
break;
case TTM_PL_TT:
+ man->func = &ttm_bo_manager_func;
switch (dev_priv->gart_info.type) {
case NOUVEAU_GART_AGP:
man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
@@ -509,8 +511,8 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int
evict, bool intr,
if (!chan || nvbo->tile_flags || nvbo->no_vm)
chan = dev_priv->channel;
- src_offset = old_mem->mm_node->start << PAGE_SHIFT;
- dst_offset = new_mem->mm_node->start << PAGE_SHIFT;
+ src_offset = old_mem->start << PAGE_SHIFT;
+ dst_offset = new_mem->start << PAGE_SHIFT;
if (chan != dev_priv->channel) {
if (old_mem->mem_type == TTM_PL_TT)
src_offset += dev_priv->vm_gart_base;
@@ -659,7 +661,7 @@ nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct
ttm_mem_reg *new_mem,
return 0;
}
- offset = new_mem->mm_node->start << PAGE_SHIFT;
+ offset = new_mem->start << PAGE_SHIFT;
if (dev_priv->card_type == NV_50) {
ret = nv50_mem_vm_bind_linear(dev,
@@ -773,14 +775,14 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
struct ttm_mem_reg *mem)
case TTM_PL_TT:
#if __OS_HAS_AGP
if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
- mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start << PAGE_SHIFT;
mem->bus.base = dev_priv->gart_info.aper_base;
mem->bus.is_iomem = true;
}
#endif
break;
case TTM_PL_VRAM:
- mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start << PAGE_SHIFT;
mem->bus.base = pci_resource_start(dev->pdev, 1);
mem->bus.is_iomem = true;
break;
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c
b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 90fdcda..90d3450 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -48,14 +48,14 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel
*chan)
dev_priv->gart_info.aper_size,
NV_DMA_ACCESS_RO, &pushbuf,
NULL);
- chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT;
+ chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
} else
if (dev_priv->card_type != NV_04) {
ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
dev_priv->fb_available_size,
[PATCHv2] drm/ttm: restructure to allow driver to plug in alternate memory manager
From: Ben Skeggs
Nouveau will need this on GeForce 8 and up to account for the GPU
reordering physical VRAM for some memory types.
v2: rebase to include nvc0_instmem.c changes
Signed-off-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 12 ++-
drivers/gpu/drm/nouveau/nouveau_channel.c |6 +-
drivers/gpu/drm/nouveau/nouveau_notifier.c |2 +-
drivers/gpu/drm/nouveau/nouveau_sgdma.c|4 +-
drivers/gpu/drm/nouveau/nv50_crtc.c|3 +-
drivers/gpu/drm/nouveau/nv50_display.c |2 +-
drivers/gpu/drm/nouveau/nv50_instmem.c |2 +-
drivers/gpu/drm/nouveau/nvc0_instmem.c |2 +-
drivers/gpu/drm/radeon/radeon_object.c |6 +-
drivers/gpu/drm/radeon/radeon_ttm.c| 16 ++--
drivers/gpu/drm/ttm/Makefile |3 +-
drivers/gpu/drm/ttm/ttm_agp_backend.c |3 +-
drivers/gpu/drm/ttm/ttm_bo.c | 100 ---
drivers/gpu/drm/ttm/ttm_bo_manager.c | 148
drivers/gpu/drm/ttm/ttm_bo_util.c |3 +-
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c |3 +-
include/drm/ttm/ttm_bo_api.h |3 +-
include/drm/ttm/ttm_bo_driver.h| 21 -
18 files changed, 226 insertions(+), 113 deletions(-)
create mode 100644 drivers/gpu/drm/ttm/ttm_bo_manager.c
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index c2497bf..522a891 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -399,6 +399,7 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev,
uint32_t type,
man->default_caching = TTM_PL_FLAG_CACHED;
break;
case TTM_PL_VRAM:
+ man->func = &ttm_bo_manager_func;
man->flags = TTM_MEMTYPE_FLAG_FIXED |
TTM_MEMTYPE_FLAG_MAPPABLE;
man->available_caching = TTM_PL_FLAG_UNCACHED |
@@ -407,6 +408,7 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev,
uint32_t type,
man->gpu_offset = dev_priv->vm_vram_base;
break;
case TTM_PL_TT:
+ man->func = &ttm_bo_manager_func;
switch (dev_priv->gart_info.type) {
case NOUVEAU_GART_AGP:
man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
@@ -509,8 +511,8 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int
evict, bool intr,
if (!chan || nvbo->tile_flags || nvbo->no_vm)
chan = dev_priv->channel;
- src_offset = old_mem->mm_node->start << PAGE_SHIFT;
- dst_offset = new_mem->mm_node->start << PAGE_SHIFT;
+ src_offset = old_mem->start << PAGE_SHIFT;
+ dst_offset = new_mem->start << PAGE_SHIFT;
if (chan != dev_priv->channel) {
if (old_mem->mem_type == TTM_PL_TT)
src_offset += dev_priv->vm_gart_base;
@@ -659,7 +661,7 @@ nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct
ttm_mem_reg *new_mem,
return 0;
}
- offset = new_mem->mm_node->start << PAGE_SHIFT;
+ offset = new_mem->start << PAGE_SHIFT;
if (dev_priv->card_type == NV_50) {
ret = nv50_mem_vm_bind_linear(dev,
@@ -773,14 +775,14 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
struct ttm_mem_reg *mem)
case TTM_PL_TT:
#if __OS_HAS_AGP
if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
- mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start << PAGE_SHIFT;
mem->bus.base = dev_priv->gart_info.aper_base;
mem->bus.is_iomem = true;
}
#endif
break;
case TTM_PL_VRAM:
- mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start << PAGE_SHIFT;
mem->bus.base = pci_resource_start(dev->pdev, 1);
mem->bus.is_iomem = true;
break;
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c
b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 90fdcda..90d3450 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -48,14 +48,14 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel
*chan)
dev_priv->gart_info.aper_size,
NV_DMA_ACCESS_RO, &pushbuf,
NULL);
- chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT;
+ chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
} else
if (dev_priv->card_type != NV_04) {
ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
dev_priv->fb_available_size,
