Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-30 Thread Jagan Teki
Hi Frieder,

Thanks for sharing the details.

On Mon, Jun 28, 2021 at 1:49 PM Frieder Schrempf
 wrote:
>
> Hi Jagan,
>
> On 24.06.21 10:30, Krzysztof Kozlowski wrote:
> > On 24/06/2021 04:48, Fabio Estevam wrote:
> >> Hi Jagan/Laurent,
> >>
> >> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart
> >>  wrote:
> >>
> >>> Looking at the register set, it seems to match the Exynos 5433,
> >>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> >>> that driver instead of adding a new one for the same IP core ?
> >>
> >> Yes. there was an attempt from Michael in this direction:
> >> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F20200911135413.3654800-1-m.tretter%40pengutronix.de%2Fdata=04%7C01%7Cfrieder.schrempf%40kontron.de%7C52db05459ef0462d5a9b08d936eab1ba%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637601203901391193%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=LTYk9kpUeB9bgfRITQT6wIij3XTOIk37AHXbzQ2UI4Y%3Dreserved=0
> >
> > That's the proper direction (maybe as Marek suggested - sharing common
> > code like for Analogix DP), not duplicating a driver.
> >
>
> Just to make sure that you are aware of the previous patches and discussions 
> here are some additional pointers:
>
> * i.MX8MM glue code from Marek (+ Cc): [1]
> * DPHY driver from Marek: [2]
> * General discussion about driver implementation: [3]
> * Daniel's (+ Cc) suggested direction to move forward: [4]

It Looks like Daniel's suggestion is to have a common bridge driver
without sharing a code between platforms. It makes sense and clean but
the key issues lie on the exynos side, the exynos drm drives require
potential changes and tests, which indeed are hard but possible -
IMHO. However there is another issue with component_ops the i.MX8M
side MXSFB doesn't use any component_ops but the exynos are fully
component aware.

>
> It looks like you already did a fork of the Exynos driver, so your approach 
> might be generally in line with what Daniel suggested.

I did use PMS computation from exynos and reference driver from imx8
tree. Last 2 days I worked on exynos_drm_dsi.c (with some additions)
and converted a bridge driver and it worked on my i.MX8MM platform.

Right now, I'm checking the possible implementations and will come
back to my approach for further comments.

Jagan.


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-28 Thread Frieder Schrempf
Hi Jagan,

On 24.06.21 10:30, Krzysztof Kozlowski wrote:
> On 24/06/2021 04:48, Fabio Estevam wrote:
>> Hi Jagan/Laurent,
>>
>> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart
>>  wrote:
>>
>>> Looking at the register set, it seems to match the Exynos 5433,
>>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
>>> that driver instead of adding a new one for the same IP core ?
>>
>> Yes. there was an attempt from Michael in this direction:
>> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F20200911135413.3654800-1-m.tretter%40pengutronix.de%2Fdata=04%7C01%7Cfrieder.schrempf%40kontron.de%7C52db05459ef0462d5a9b08d936eab1ba%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637601203901391193%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=LTYk9kpUeB9bgfRITQT6wIij3XTOIk37AHXbzQ2UI4Y%3Dreserved=0
> 
> That's the proper direction (maybe as Marek suggested - sharing common
> code like for Analogix DP), not duplicating a driver.
> 

Just to make sure that you are aware of the previous patches and discussions 
here are some additional pointers:

* i.MX8MM glue code from Marek (+ Cc): [1]
* DPHY driver from Marek: [2]
* General discussion about driver implementation: [3]
* Daniel's (+ Cc) suggested direction to move forward: [4]

It looks like you already did a fork of the Exynos driver, so your approach 
might be generally in line with what Daniel suggested.

Best regards
Frieder

[1] 
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20201005134250.527153-3-ma...@denx.de/
[2] 
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20201003225020.164358-1-ma...@denx.de/
[3] 
https://patchwork.kernel.org/project/dri-devel/patch/20200911135413.3654800-11-m.tret...@pengutronix.de/
[4] 
https://patchwork.kernel.org/project/dri-devel/patch/20200911135413.3654800-11-m.tret...@pengutronix.de/#23995147


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-25 Thread Krzysztof Kozlowski
On 25/06/2021 12:08, Jagan Teki wrote:
> Hi Krzysztof,
> 
> On Fri, Jun 25, 2021 at 2:51 PM Krzysztof Kozlowski
>  wrote:
>>
>> On Thu, 24 Jun 2021 at 14:19, Laurent Pinchart
>>  wrote:
>>>
>>> Hi Jagan,
>>>
>>> On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
 On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
>
>> Looking at the register set, it seems to match the Exynos 5433,
>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
>> that driver instead of adding a new one for the same IP core ?
>
> Yes. there was an attempt from Michael in this direction:
> https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/

 Thanks for the reference, I will check it out and see I can send any
 updated versions wrt my i.MX8MM platform.
>>>
>>> Thanks.
>>>
>>> I had a brief look at the exynos driver, and I think it should be turned
>>> into a DRM bridge as part of this rework to be used with the i.MX8MM.
>>>
>>> Is there someone from Samsung who could assist, at least to test the
>>> changes ?
>>
>> Yes, I mentioned few guys in reply to PHY. Around the DRM drivers you
>> can get in touch with:
>> Inki Dae 
>> Seung-Woo Kim 
>> Marek Szyprowski 
>> Andrzej Hajda 
> 
> Thanks for the information.
> 
>>
>> The easiest testing of the display stack would be on Hardkernel's Odroid
>> XU4 (https://www.hardkernel.com/shop/odroid-xu4-special-price/) however
>> you will not test the DSI/DSIM directly (it has only HDMI port).
> 
> Look like I found one board with Exynos5430 with DSI. Does this SoC is
> same as mainline Exynos5433?

No, Exynos5430 is ARMv7. Looks like improvement over Exynos5422.
Exynos5422 has a very good support in mainline while Exynso5430 was
never touched at all.

Exynos5433 is ARMv8, although many things are shared with 5422. About
DSI I have no clue.


Best regards,
Krzysztof


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-25 Thread Jagan Teki
Hi Krzysztof,

On Fri, Jun 25, 2021 at 2:51 PM Krzysztof Kozlowski
 wrote:
>
> On Thu, 24 Jun 2021 at 14:19, Laurent Pinchart
>  wrote:
> >
> > Hi Jagan,
> >
> > On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
> > > On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> > > > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
> > > >
> > > > > Looking at the register set, it seems to match the Exynos 5433,
> > > > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> > > > > that driver instead of adding a new one for the same IP core ?
> > > >
> > > > Yes. there was an attempt from Michael in this direction:
> > > > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/
> > >
> > > Thanks for the reference, I will check it out and see I can send any
> > > updated versions wrt my i.MX8MM platform.
> >
> > Thanks.
> >
> > I had a brief look at the exynos driver, and I think it should be turned
> > into a DRM bridge as part of this rework to be used with the i.MX8MM.
> >
> > Is there someone from Samsung who could assist, at least to test the
> > changes ?
>
> Yes, I mentioned few guys in reply to PHY. Around the DRM drivers you
> can get in touch with:
> Inki Dae 
> Seung-Woo Kim 
> Marek Szyprowski 
> Andrzej Hajda 

Thanks for the information.

>
> The easiest testing of the display stack would be on Hardkernel's Odroid
> XU4 (https://www.hardkernel.com/shop/odroid-xu4-special-price/) however
> you will not test the DSI/DSIM directly (it has only HDMI port).

Look like I found one board with Exynos5430 with DSI. Does this SoC is
same as mainline Exynos5433?

Jagan.


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-25 Thread Krzysztof Kozlowski
On Thu, 24 Jun 2021 at 14:19, Laurent Pinchart
 wrote:
>
> Hi Jagan,
>
> On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
> > On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> > > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
> > >
> > > > Looking at the register set, it seems to match the Exynos 5433,
> > > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> > > > that driver instead of adding a new one for the same IP core ?
> > >
> > > Yes. there was an attempt from Michael in this direction:
> > > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/
> >
> > Thanks for the reference, I will check it out and see I can send any
> > updated versions wrt my i.MX8MM platform.
>
> Thanks.
>
> I had a brief look at the exynos driver, and I think it should be turned
> into a DRM bridge as part of this rework to be used with the i.MX8MM.
>
> Is there someone from Samsung who could assist, at least to test the
> changes ?

Yes, I mentioned few guys in reply to PHY. Around the DRM drivers you
can get in touch with:
Inki Dae 
Seung-Woo Kim 
Marek Szyprowski 
Andrzej Hajda 

The easiest testing of the display stack would be on Hardkernel's Odroid
XU4 (https://www.hardkernel.com/shop/odroid-xu4-special-price/) however
you will not test the DSI/DSIM directly (it has only HDMI port).

Best regards,
Krzysztof
Best regards,
Krzysztof


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-25 Thread Jagan Teki
On Thu, Jun 24, 2021 at 6:17 PM Laurent Pinchart
 wrote:
>
> On Thu, Jun 24, 2021 at 06:02:36PM +0530, Jagan Teki wrote:
> > Hi Laurent,
> >
> > On Thu, Jun 24, 2021 at 5:48 PM Laurent Pinchart
> >  wrote:
> > >
> > > Hi Jagan,
> > >
> > > On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
> > > > On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> > > > > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
> > > > >
> > > > > > Looking at the register set, it seems to match the Exynos 5433,
> > > > > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we 
> > > > > > leverage
> > > > > > that driver instead of adding a new one for the same IP core ?
> > > > >
> > > > > Yes. there was an attempt from Michael in this direction:
> > > > > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/
> > > >
> > > > Thanks for the reference, I will check it out and see I can send any
> > > > updated versions wrt my i.MX8MM platform.
> > >
> > > Thanks.
> > >
> > > I had a brief look at the exynos driver, and I think it should be turned
> > > into a DRM bridge as part of this rework to be used with the i.MX8MM.
> > >
> > > Is there someone from Samsung who could assist, at least to test the
> > > changes ?
> >
> > I have hardware to verify it on i.MX8MM but from exynos I don't have
> > any contact from Samsung to suggest or test. Maybe I can add Tomasz
> > Figa while sending the changes?
>
> Tomasz hasn't been working for Samsung for a lng time (I've dropped
> his Samsung address from the CC list for this reason).

Okay. I think exynos drm maintainers might help out here, but not sure of it.

>
> > I understand that there are 2 key implementations.
> >
> > 1. Adjust the exynos_drm_dsi.c by dropping component_ops as i.MX8MM
> > flow with LCDIF doesn't have component_ops (make sure it works with
> > exynos platform first)
>
> I think it should be turned into a real drm_bridge, it's currently
> implemented based on drm_encoder.

Yes, ie what I'm trying for.

Jagan.


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Laurent Pinchart
On Thu, Jun 24, 2021 at 06:02:36PM +0530, Jagan Teki wrote:
> Hi Laurent,
> 
> On Thu, Jun 24, 2021 at 5:48 PM Laurent Pinchart
>  wrote:
> >
> > Hi Jagan,
> >
> > On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
> > > On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> > > > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
> > > >
> > > > > Looking at the register set, it seems to match the Exynos 5433,
> > > > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> > > > > that driver instead of adding a new one for the same IP core ?
> > > >
> > > > Yes. there was an attempt from Michael in this direction:
> > > > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/
> > >
> > > Thanks for the reference, I will check it out and see I can send any
> > > updated versions wrt my i.MX8MM platform.
> >
> > Thanks.
> >
> > I had a brief look at the exynos driver, and I think it should be turned
> > into a DRM bridge as part of this rework to be used with the i.MX8MM.
> >
> > Is there someone from Samsung who could assist, at least to test the
> > changes ?
> 
> I have hardware to verify it on i.MX8MM but from exynos I don't have
> any contact from Samsung to suggest or test. Maybe I can add Tomasz
> Figa while sending the changes?

Tomasz hasn't been working for Samsung for a lng time (I've dropped
his Samsung address from the CC list for this reason).

> I understand that there are 2 key implementations.
> 
> 1. Adjust the exynos_drm_dsi.c by dropping component_ops as i.MX8MM
> flow with LCDIF doesn't have component_ops (make sure it works with
> exynos platform first)

I think it should be turned into a real drm_bridge, it's currently
implemented based on drm_encoder.

> 2. Sec DSIM Bridge driver common cross Exynos and i.MX8MM platform
> drivers or only one Sec DSIM bridge driver to handle both the
> platforms by differentiating compatible and driver data
> 
> Any more suggestions would be appreciated?

-- 
Regards,

Laurent Pinchart


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Fabio Estevam
Hi Jagan,

On Thu, Jun 24, 2021 at 9:32 AM Jagan Teki  wrote:

> > I had a brief look at the exynos driver, and I think it should be turned
> > into a DRM bridge as part of this rework to be used with the i.MX8MM.
> >
> > Is there someone from Samsung who could assist, at least to test the
> > changes ?
>
> I have hardware to verify it on i.MX8MM but from exynos I don't have
> any contact from Samsung to suggest or test. Maybe I can add Tomasz
> Figa while sending the changes?

Adding Inki Dae and Marek Szyprowski from Samsung who helped to review
Michael's series.

> I understand that there are 2 key implementations.
>
> 1. Adjust the exynos_drm_dsi.c by dropping component_ops as i.MX8MM
> flow with LCDIF doesn't have component_ops (make sure it works with
> exynos platform first)
> 2. Sec DSIM Bridge driver common cross Exynos and i.MX8MM platform
> drivers or only one Sec DSIM bridge driver to handle both the
> platforms by differentiating compatible and driver data
>
> Any more suggestions would be appreciated?
>
> Jagan.


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Jagan Teki
Hi Laurent,

On Thu, Jun 24, 2021 at 5:48 PM Laurent Pinchart
 wrote:
>
> Hi Jagan,
>
> On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
> > On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> > > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
> > >
> > > > Looking at the register set, it seems to match the Exynos 5433,
> > > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> > > > that driver instead of adding a new one for the same IP core ?
> > >
> > > Yes. there was an attempt from Michael in this direction:
> > > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/
> >
> > Thanks for the reference, I will check it out and see I can send any
> > updated versions wrt my i.MX8MM platform.
>
> Thanks.
>
> I had a brief look at the exynos driver, and I think it should be turned
> into a DRM bridge as part of this rework to be used with the i.MX8MM.
>
> Is there someone from Samsung who could assist, at least to test the
> changes ?

I have hardware to verify it on i.MX8MM but from exynos I don't have
any contact from Samsung to suggest or test. Maybe I can add Tomasz
Figa while sending the changes?

I understand that there are 2 key implementations.

1. Adjust the exynos_drm_dsi.c by dropping component_ops as i.MX8MM
flow with LCDIF doesn't have component_ops (make sure it works with
exynos platform first)
2. Sec DSIM Bridge driver common cross Exynos and i.MX8MM platform
drivers or only one Sec DSIM bridge driver to handle both the
platforms by differentiating compatible and driver data

Any more suggestions would be appreciated?

Jagan.


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Laurent Pinchart
Hi Jagan,

On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote:
> On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote:
> > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote:
> >
> > > Looking at the register set, it seems to match the Exynos 5433,
> > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> > > that driver instead of adding a new one for the same IP core ?
> >
> > Yes. there was an attempt from Michael in this direction:
> > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/
> 
> Thanks for the reference, I will check it out and see I can send any
> updated versions wrt my i.MX8MM platform.

Thanks.

I had a brief look at the exynos driver, and I think it should be turned
into a DRM bridge as part of this rework to be used with the i.MX8MM.

Is there someone from Samsung who could assist, at least to test the
changes ?

-- 
Regards,

Laurent Pinchart


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Jagan Teki
Hi Fabio,

On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam  wrote:
>
> Hi Jagan/Laurent,
>
> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart
>  wrote:
>
> > Looking at the register set, it seems to match the Exynos 5433,
> > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> > that driver instead of adding a new one for the same IP core ?
>
> Yes. there was an attempt from Michael in this direction:
> https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/

Thanks for the reference, I will check it out and see I can send any
updated versions wrt my i.MX8MM platform.

Jagan.


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Jagan Teki
Hi Laurent,

On Thu, Jun 24, 2021 at 3:53 AM Laurent Pinchart
 wrote:
>
> Hi Jagan,
>
> Thank you for the patch.
>
> On Mon, Jun 21, 2021 at 12:54:17PM +0530, Jagan Teki wrote:
> > Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
> > available in NXP's i.MX8M Mini and Nano Processors.
> >
> > Add bridge driver for it.
> >
> > Cc: Andrzej Hajda 
> > Cc: Neil Armstrong 
> > Cc: Robert Foss 
> > Cc: Laurent Pinchart 
> > Signed-off-by: Jagan Teki 
> > ---
> >  drivers/gpu/drm/bridge/Kconfig|   15 +
> >  drivers/gpu/drm/bridge/Makefile   |1 +
> >  drivers/gpu/drm/bridge/sec-dsim.c | 1535 +
> >  3 files changed, 1551 insertions(+)
> >  create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index 19109c0b5481..a183eb165a35 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
> > The PS8640 is a high-performance and low-power
> > MIPI DSI to eDP converter
> >
> > +config DRM_SEC_MIPI_DSIM
> > + tristate "Samsung SEC MIPI DSIM Bridge controller"
> > + depends on DRM
> > + depends on COMMON_CLK
> > + depends on OF && HAS_IOMEM
> > + select DRM_KMS_HELPER
> > + select DRM_MIPI_DSI
> > + select DRM_PANEL_BRIDGE
> > + select GENERIC_PHY_MIPI_DPHY
> > + select MFD_SYSCON
> > + select REGMAP_MMIO
> > + help
> > +   This enables the Samsung SEC MIPI DSIM Bridge controller as
> > +   for example found on NXP's i.MX8M Mini and Nano Processors.
> > +
> >  config DRM_SIL_SII8620
> >   tristate "Silicon Image SII8620 HDMI/MHL bridge"
> >   depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile 
> > b/drivers/gpu/drm/bridge/Makefile
> > index 88e4edf81087..ff802a4ffe65 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
> > megachips-stdp-ge-b850v
> >  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> >  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> >  obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> > +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
> >  obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> >  obj-$(CONFIG_DRM_SII902X) += sii902x.o
> >  obj-$(CONFIG_DRM_SII9234) += sii9234.o
> > diff --git a/drivers/gpu/drm/bridge/sec-dsim.c 
> > b/drivers/gpu/drm/bridge/sec-dsim.c
> > new file mode 100644
> > index ..5b6645bb94e7
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/sec-dsim.c
> > @@ -0,0 +1,1535 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Samsung SEC MIPI DSIM Bridge
> > + *
> > + * Copyright (C) 2018 NXP
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd
> > + * Copyright (C) 2021 Amarula Solutions(India)
> > + *
> > + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
> > + *
> > + * Authors:
> > + * Tomasz Figa 
> > + * Andrzej Hajda 
> > + * Fancy Fang 
> > + * Jagan Teki 
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +#define DRIVER_NAME  "sec-dsim"
> > +
> > +/* dsim registers */
> > +#define DSIM_VERSION 0x00
> > +#define DSIM_STATUS  0x04
> > +#define DSIM_RGB_STATUS  0x08
> > +#define DSIM_SWRST   0x0c
> > +#define DSIM_CLKCTRL 0x10
> > +#define DSIM_TIMEOUT 0x14
> > +#define DSIM_CONFIG  0x18
> > +#define DSIM_ESCMODE 0x1c
> > +#define DSIM_MDRESOL 0x20
> > +#define DSIM_MVPORCH 0x24
> > +#define DSIM_MHPORCH 0x28
> > +#define DSIM_MSYNC   0x2c
> > +#define DSIM_SDRESOL 0x30
> > +#define DSIM_INTSRC  0x34
> > +#define DSIM_INTMSK  0x38
> > +#define DSIM_PKTHDR  0x3c
> > +#define DSIM_PAYLOAD 0x40
> > +#define DSIM_RXFIFO  0x44
> > +#define DSIM_FIFOTHLD0x48
> > +#define DSIM_FIFOCTRL0x4c
> > +#define DSIM_MEMACCHR0x50
> > +#define DSIM_MULTI_PKT   0x78
> > +#define DSIM_PLLCTRL_1G  0x90
> > +#define DSIM_PLLCTRL 0x94
> > +#define DSIM_PLLCTRL10x98
> > +#define DSIM_PLLCTRL20x9c
> > +#define DSIM_PLLTMR  0xa0
>
> Looking at the register set, it seems to match the Exynos 5433,
> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> that driver instead of adding a new one for the same IP core ?


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-24 Thread Krzysztof Kozlowski
On 24/06/2021 04:48, Fabio Estevam wrote:
> Hi Jagan/Laurent,
> 
> On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart
>  wrote:
> 
>> Looking at the register set, it seems to match the Exynos 5433,
>> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
>> that driver instead of adding a new one for the same IP core ?
> 
> Yes. there was an attempt from Michael in this direction:
> https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/

That's the proper direction (maybe as Marek suggested - sharing common
code like for Analogix DP), not duplicating a driver.


Best regards,
Krzysztof


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-23 Thread Fabio Estevam
Hi Jagan/Laurent,

On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart
 wrote:

> Looking at the register set, it seems to match the Exynos 5433,
> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> that driver instead of adding a new one for the same IP core ?

Yes. there was an attempt from Michael in this direction:
https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tret...@pengutronix.de/

Cheers


Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-23 Thread Laurent Pinchart
Hi Jagan,

Thank you for the patch.

On Mon, Jun 21, 2021 at 12:54:17PM +0530, Jagan Teki wrote:
> Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
> available in NXP's i.MX8M Mini and Nano Processors.
> 
> Add bridge driver for it.
> 
> Cc: Andrzej Hajda 
> Cc: Neil Armstrong 
> Cc: Robert Foss 
> Cc: Laurent Pinchart 
> Signed-off-by: Jagan Teki 
> ---
>  drivers/gpu/drm/bridge/Kconfig|   15 +
>  drivers/gpu/drm/bridge/Makefile   |1 +
>  drivers/gpu/drm/bridge/sec-dsim.c | 1535 +
>  3 files changed, 1551 insertions(+)
>  create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c
> 
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 19109c0b5481..a183eb165a35 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
> The PS8640 is a high-performance and low-power
> MIPI DSI to eDP converter
>  
> +config DRM_SEC_MIPI_DSIM
> + tristate "Samsung SEC MIPI DSIM Bridge controller"
> + depends on DRM
> + depends on COMMON_CLK
> + depends on OF && HAS_IOMEM
> + select DRM_KMS_HELPER
> + select DRM_MIPI_DSI
> + select DRM_PANEL_BRIDGE
> + select GENERIC_PHY_MIPI_DPHY
> + select MFD_SYSCON
> + select REGMAP_MMIO
> + help
> +   This enables the Samsung SEC MIPI DSIM Bridge controller as
> +   for example found on NXP's i.MX8M Mini and Nano Processors.
> +
>  config DRM_SIL_SII8620
>   tristate "Silicon Image SII8620 HDMI/MHL bridge"
>   depends on OF
> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> index 88e4edf81087..ff802a4ffe65 100644
> --- a/drivers/gpu/drm/bridge/Makefile
> +++ b/drivers/gpu/drm/bridge/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
> megachips-stdp-ge-b850v
>  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
>  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
>  obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
>  obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
>  obj-$(CONFIG_DRM_SII902X) += sii902x.o
>  obj-$(CONFIG_DRM_SII9234) += sii9234.o
> diff --git a/drivers/gpu/drm/bridge/sec-dsim.c 
> b/drivers/gpu/drm/bridge/sec-dsim.c
> new file mode 100644
> index ..5b6645bb94e7
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/sec-dsim.c
> @@ -0,0 +1,1535 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Samsung SEC MIPI DSIM Bridge
> + *
> + * Copyright (C) 2018 NXP
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd
> + * Copyright (C) 2021 Amarula Solutions(India)
> + *
> + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
> + *
> + * Authors:
> + * Tomasz Figa 
> + * Andrzej Hajda 
> + * Fancy Fang 
> + * Jagan Teki 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#define DRIVER_NAME  "sec-dsim"
> +
> +/* dsim registers */
> +#define DSIM_VERSION 0x00
> +#define DSIM_STATUS  0x04
> +#define DSIM_RGB_STATUS  0x08
> +#define DSIM_SWRST   0x0c
> +#define DSIM_CLKCTRL 0x10
> +#define DSIM_TIMEOUT 0x14
> +#define DSIM_CONFIG  0x18
> +#define DSIM_ESCMODE 0x1c
> +#define DSIM_MDRESOL 0x20
> +#define DSIM_MVPORCH 0x24
> +#define DSIM_MHPORCH 0x28
> +#define DSIM_MSYNC   0x2c
> +#define DSIM_SDRESOL 0x30
> +#define DSIM_INTSRC  0x34
> +#define DSIM_INTMSK  0x38
> +#define DSIM_PKTHDR  0x3c
> +#define DSIM_PAYLOAD 0x40
> +#define DSIM_RXFIFO  0x44
> +#define DSIM_FIFOTHLD0x48
> +#define DSIM_FIFOCTRL0x4c
> +#define DSIM_MEMACCHR0x50
> +#define DSIM_MULTI_PKT   0x78
> +#define DSIM_PLLCTRL_1G  0x90
> +#define DSIM_PLLCTRL 0x94
> +#define DSIM_PLLCTRL10x98
> +#define DSIM_PLLCTRL20x9c
> +#define DSIM_PLLTMR  0xa0

Looking at the register set, it seems to match the Exynos 5433,
supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
that driver instead of adding a new one for the same IP core ?

> +
> +/* register bit fields */
> +#define STATUS_PLLSTABLE BIT(31)
> +#define STATUS_SWRSTRLS  BIT(20)
> +#define STATUS_TXREADYHSCLK  BIT(10)
> +#define STATUS_ULPSCLK   BIT(9)
> +#define STATUS_STOPSTATECLK  BIT(8)
> +
> +#define CLKCTRL_TXREQUESTHSCLK   BIT(31)

[RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver

2021-06-21 Thread Jagan Teki
Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
available in NXP's i.MX8M Mini and Nano Processors.

Add bridge driver for it.

Cc: Andrzej Hajda 
Cc: Neil Armstrong 
Cc: Robert Foss 
Cc: Laurent Pinchart 
Signed-off-by: Jagan Teki 
---
 drivers/gpu/drm/bridge/Kconfig|   15 +
 drivers/gpu/drm/bridge/Makefile   |1 +
 drivers/gpu/drm/bridge/sec-dsim.c | 1535 +
 3 files changed, 1551 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 19109c0b5481..a183eb165a35 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
  The PS8640 is a high-performance and low-power
  MIPI DSI to eDP converter
 
+config DRM_SEC_MIPI_DSIM
+   tristate "Samsung SEC MIPI DSIM Bridge controller"
+   depends on DRM
+   depends on COMMON_CLK
+   depends on OF && HAS_IOMEM
+   select DRM_KMS_HELPER
+   select DRM_MIPI_DSI
+   select DRM_PANEL_BRIDGE
+   select GENERIC_PHY_MIPI_DPHY
+   select MFD_SYSCON
+   select REGMAP_MMIO
+   help
+ This enables the Samsung SEC MIPI DSIM Bridge controller as
+ for example found on NXP's i.MX8M Mini and Nano Processors.
+
 config DRM_SIL_SII8620
tristate "Silicon Image SII8620 HDMI/MHL bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 88e4edf81087..ff802a4ffe65 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge-b850v
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
 obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
+obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
 obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
 obj-$(CONFIG_DRM_SII902X) += sii902x.o
 obj-$(CONFIG_DRM_SII9234) += sii9234.o
diff --git a/drivers/gpu/drm/bridge/sec-dsim.c 
b/drivers/gpu/drm/bridge/sec-dsim.c
new file mode 100644
index ..5b6645bb94e7
--- /dev/null
+++ b/drivers/gpu/drm/bridge/sec-dsim.c
@@ -0,0 +1,1535 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Samsung SEC MIPI DSIM Bridge
+ *
+ * Copyright (C) 2018 NXP
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd
+ * Copyright (C) 2021 Amarula Solutions(India)
+ *
+ * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
+ *
+ * Authors:
+ * Tomasz Figa 
+ * Andrzej Hajda 
+ * Fancy Fang 
+ * Jagan Teki 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define DRIVER_NAME"sec-dsim"
+
+/* dsim registers */
+#define DSIM_VERSION   0x00
+#define DSIM_STATUS0x04
+#define DSIM_RGB_STATUS0x08
+#define DSIM_SWRST 0x0c
+#define DSIM_CLKCTRL   0x10
+#define DSIM_TIMEOUT   0x14
+#define DSIM_CONFIG0x18
+#define DSIM_ESCMODE   0x1c
+#define DSIM_MDRESOL   0x20
+#define DSIM_MVPORCH   0x24
+#define DSIM_MHPORCH   0x28
+#define DSIM_MSYNC 0x2c
+#define DSIM_SDRESOL   0x30
+#define DSIM_INTSRC0x34
+#define DSIM_INTMSK0x38
+#define DSIM_PKTHDR0x3c
+#define DSIM_PAYLOAD   0x40
+#define DSIM_RXFIFO0x44
+#define DSIM_FIFOTHLD  0x48
+#define DSIM_FIFOCTRL  0x4c
+#define DSIM_MEMACCHR  0x50
+#define DSIM_MULTI_PKT 0x78
+#define DSIM_PLLCTRL_1G0x90
+#define DSIM_PLLCTRL   0x94
+#define DSIM_PLLCTRL1  0x98
+#define DSIM_PLLCTRL2  0x9c
+#define DSIM_PLLTMR0xa0
+
+/* register bit fields */
+#define STATUS_PLLSTABLE   BIT(31)
+#define STATUS_SWRSTRLSBIT(20)
+#define STATUS_TXREADYHSCLKBIT(10)
+#define STATUS_ULPSCLK BIT(9)
+#define STATUS_STOPSTATECLKBIT(8)
+
+#define CLKCTRL_TXREQUESTHSCLK BIT(31)
+#define CLKCTRL_ESCCLKEN   BIT(28)
+#define CLKCTRL_PLLBYPASS  BIT(27)
+#define CLKCTRL_BYTECLKSRC_MASKGENMASK(26, 25)
+#define CLKCTRL_BYTECLKSRC(x)  FIELD_PREP(CLKCTRL_BYTECLKSRC_MASK, (x))
+#define CLKCTRL_BYTECLKEN  BIT(24)
+#define CLKCTRL_LANEESCDATAEN_MASK GENMASK(23, 20)
+#define CLKCTRL_LANEESCDATAEN(x)   FIELD_PREP(CLKCTRL_LANEESCDATAEN_MASK, 
(x))
+#define CLKCTRL_LANEESCCLKEN   BIT(19)
+#define CLKCTRL_ESCPRESCALER_MASK  GENMASK(15, 0)