Re: [PATCH] drm/panel-simple: Fix dotclock for Ortustech COM37H3M

2020-03-10 Thread Sam Ravnborg
Hi Nikolaus

Thanks for the detailed explanation.

Applied and pushed to drm-misc-next.

Sam

On Tue, Mar 10, 2020 at 08:43:19AM +0100, H. Nikolaus Schaller wrote:
> The currently listed dotclock disagrees with the currently
> listed vrefresh rate. Change the dotclock to match the vrefresh.
> 
> There are two variants of the COM37H3M panel.
> The older one's COM37H3M05DTC data sheet specifies:
> 
>  MIN  TYP MAX
> CLK frequencyfCLK --   22.426.3 MHz (in VGA mode)
> VSYNC Frequency  fVSYNC   54   60  66   Hz
> VSYNC cycle time tv   --  650  --   H
> HSYNC frequency  fHSYNC   --   39.3--   kHz
> HSYNC cycle time th   --  570  --   CLK
> 
> The newer one's COM37H3M99DTC data sheet says:
> 
>  MIN  TYP MAX
> CLK frequencyfCLK 18   19.827   MHz
> VSYNC Frequency  fVSYNC   54   60  66   Hz
> VSYNC cycle time tv  646  650 700   H
> HSYNC frequency  fHSYNC  --39.050.0 kHz
> HSYNC cycle time th  504  508 630   CLK
> 
> So we choose a parameter set that lies within the specs
> of both variants. We start at .vrefresh = 60,
> choose .htotal = 570 and .vtotal = 650 and end up
> in a clock of 22.230 MHz.
> 
> Reported-by: Ville Syrjala 
> Signed-off-by: H. Nikolaus Schaller 
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c 
> b/drivers/gpu/drm/panel/panel-simple.c
> index e14c14ac62b5..b4cb23d4898d 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -2390,15 +2390,15 @@ static const struct panel_desc ontat_yx700wv03 = {
>  };
>  
>  static const struct drm_display_mode ortustech_com37h3m_mode  = {
> - .clock = 22153,
> + .clock = 22230,
>   .hdisplay = 480,
> - .hsync_start = 480 + 8,
> - .hsync_end = 480 + 8 + 10,
> - .htotal = 480 + 8 + 10 + 10,
> + .hsync_start = 480 + 40,
> + .hsync_end = 480 + 40 + 10,
> + .htotal = 480 + 40 + 10 + 40,
>   .vdisplay = 640,
>   .vsync_start = 640 + 4,
> - .vsync_end = 640 + 4 + 3,
> - .vtotal = 640 + 4 + 3 + 4,
> + .vsync_end = 640 + 4 + 2,
> + .vtotal = 640 + 4 + 2 + 4,
>   .vrefresh = 60,
>   .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
>  };
> -- 
> 2.23.0
> 
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Re: [PATCH] drm/panel-simple: Fix dotclock for Ortustech COM37H3M

2020-03-10 Thread Ville Syrjälä
On Tue, Mar 10, 2020 at 08:43:19AM +0100, H. Nikolaus Schaller wrote:
> The currently listed dotclock disagrees with the currently
> listed vrefresh rate. Change the dotclock to match the vrefresh.
> 
> There are two variants of the COM37H3M panel.
> The older one's COM37H3M05DTC data sheet specifies:
> 
>  MIN  TYP MAX
> CLK frequencyfCLK --   22.426.3 MHz (in VGA mode)
> VSYNC Frequency  fVSYNC   54   60  66   Hz
> VSYNC cycle time tv   --  650  --   H
> HSYNC frequency  fHSYNC   --   39.3--   kHz
> HSYNC cycle time th   --  570  --   CLK
> 
> The newer one's COM37H3M99DTC data sheet says:
> 
>  MIN  TYP MAX
> CLK frequencyfCLK 18   19.827   MHz
> VSYNC Frequency  fVSYNC   54   60  66   Hz
> VSYNC cycle time tv  646  650 700   H
> HSYNC frequency  fHSYNC  --39.050.0 kHz
> HSYNC cycle time th  504  508 630   CLK
> 
> So we choose a parameter set that lies within the specs
> of both variants. We start at .vrefresh = 60,
> choose .htotal = 570 and .vtotal = 650 and end up
> in a clock of 22.230 MHz.
> 
> Reported-by: Ville Syrjala 
> Signed-off-by: H. Nikolaus Schaller 
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c 
> b/drivers/gpu/drm/panel/panel-simple.c
> index e14c14ac62b5..b4cb23d4898d 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -2390,15 +2390,15 @@ static const struct panel_desc ontat_yx700wv03 = {
>  };
>  
>  static const struct drm_display_mode ortustech_com37h3m_mode  = {
> - .clock = 22153,
> + .clock = 22230,
>   .hdisplay = 480,
> - .hsync_start = 480 + 8,
> - .hsync_end = 480 + 8 + 10,
> - .htotal = 480 + 8 + 10 + 10,
> + .hsync_start = 480 + 40,
> + .hsync_end = 480 + 40 + 10,
> + .htotal = 480 + 40 + 10 + 40,
>   .vdisplay = 640,
>   .vsync_start = 640 + 4,
> - .vsync_end = 640 + 4 + 3,
> - .vtotal = 640 + 4 + 3 + 4,
> + .vsync_end = 640 + 4 + 2,
> + .vtotal = 640 + 4 + 2 + 4,
>   .vrefresh = 60,

Numbers look consistent.

Reviewed-by: Ville Syrjälä 

>   .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
>  };
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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