On Wed, 2021-01-13 at 20:08 +0100, Stefan Wahren wrote:
> This converts the v3d bindings to yaml format.
>
> Signed-off-by: Stefan Wahren
> ---
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
>
> Changes in V4:
> - define order for required reg-names
> - adapt example
>
> Changes in V3:
> - drop redundant maxItems in case we already have items defined
> - fix order of reg-names enum
> - tag required items in description
> - add reg-names to required properties
> - drop clock-names
>
> .../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 --
> .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 75
> ++
> 2 files changed, 75 insertions(+), 33 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
> b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
> deleted file mode 100644
> index b2df82b..000
> --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
> +++ /dev/null
> @@ -1,33 +0,0 @@
> -Broadcom V3D GPU
> -
> -Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
> -For V3D 2.x, see brcm,bcm-vc4.txt.
> -
> -Required properties:
> -- compatible:Should be "brcm,7268-v3d" or "brcm,7278-v3d"
> -- reg: Physical base addresses and lengths of the register
> areas
> -- reg-names: Names for the register areas. The "hub" and "core0"
> - register areas are always required. The "gca" register area
> - is required if the GCA cache controller is present. The
> - "bridge" register area is required if an external reset
> - controller is not present.
> -- interrupts:The interrupt numbers. The first interrupt is for the
> hub,
> - while the following interrupts are separate interrupt lines
> - for the cores (if they don't share the hub's interrupt).
> - See bindings/interrupt-controller/interrupts.txt
> -
> -Optional properties:
> -- clocks:The core clock the unit runs on
> -- resets:The reset line for v3d, if not using a mapping of the bridge
> - See bindings/reset/reset.txt
> -
> -v3d {
> - compatible = "brcm,7268-v3d";
> - reg = <0xf1204000 0x100>,
> - <0xf120 0x4000>,
> - <0xf1208000 0x4000>,
> - <0xf1204100 0x100>;
> - reg-names = "bridge", "hub", "core0", "gca";
> - interrupts = <0 78 4>,
> - <0 77 4>;
> -};
> diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
> b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
> new file mode 100644
> index 000..fbce844
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom V3D GPU Bindings
> +
> +maintainers:
> + - Eric Anholt
> + - Nicolas Saenz Julienne
> +
> +properties:
> + $nodename:
> +pattern: '^gpu@[a-f0-9]+$'
> +
> + compatible:
> +enum:
> + - brcm,7268-v3d
> + - brcm,7278-v3d
> +
> + reg:
> +items:
> + - description: hub register (required)
> + - description: core0 register (required)
> + - description: GCA cache controller register (if GCA controller
> present)
> + - description: bridge register (if no external reset controller)
> +minItems: 2
> +
> + reg-names:
> +items:
> + - const: hub
> + - const: core0
> + - enum: [ bridge, gca ]
> + - enum: [ bridge, gca ]
> +minItems: 2
> +maxItems: 4
> +
> + interrupts:
> +items:
> + - description: hub interrupt (required)
> + - description: core interrupts (if it doesn't share the hub's
> interrupt)
> +minItems: 1
> +
> + clocks:
> +maxItems: 1
> +
> + resets:
> +maxItems: 1
> +
> + power-domains:
> +maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> +gpu@f120 {
> + compatible = "brcm,7268-v3d";
> + reg = <0xf120 0x4000>,
> +<0xf1208000 0x4000>,
> +<0xf1204000 0x100>,
> +<0xf1204100 0x100>;
> + reg-names = "hub", "core0", "bridge", "gca";
> + interrupts = <0 78 4>,
> + <0 77 4>;
> +};
> +
> +...
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