Re: [PATCH v10 2/2] phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
Hi,
On Tue, May 07, 2019 at 08:12:23PM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> Looks good now, stumbled upon a few details I missed in last round.
> With these considered / fixed you can add my
> Reviewed-by: Sam Ravnborg
>
> Sam
>
> > +#define CM(x) ( \
> > + ((x) < 32)?0xe0|((x)-16) : \
> > + ((x) < 64)?0xc0|((x)-32) : \
> > + ((x) < 128)?0x80|((x)-64) : \
> > + ((x) - 128))
> > +#define CN(x) (((x) == 1)?0x1f : (((CN_BUF)>>((x)-1))&0x1f))
> > +#define CO(x) ((CO_BUF)>>(8-(x))&0x3)
>
> A few spaces around the operators may help readability a little.
>
> > +static int phy_write(struct phy *phy, u32 value, unsigned int reg)
> > +{
> > + struct mixel_dphy_priv *priv = phy_get_drvdata(phy);
> > + int ret;
> > +
> > + ret = regmap_write(priv->regmap, reg, value);
> > + if (ret < 0)
> > + dev_err(&phy->dev, "Failed to write DPHY reg %d: %d", reg, ret);
>
> I have recently learned that one has to remember trailign "\n"- please
> add.
> Check all other dev_xxx as I noticed the newline is missing in a few
> more places.
Argh...I thought I've fixed these up already but that was in the
corresponding NWL driver only. Fixed now, thanks.
>
> > +
> > + dev_dbg(&phy->dev, "hs_clk/ref_clk=%ld/%ld ⩰ %d/%d\n",
>^
>
> There was another of the symbols my terminal cannot show.
>
Thanks! I've incorporated your suggestions and will send out a v11 by
the end of the week in case there's more comments coming in.
Cheers,
-- Guido
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Re: [PATCH v10 2/2] phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
Hi Guido.
Looks good now, stumbled upon a few details I missed in last round.
With these considered / fixed you can add my
Reviewed-by: Sam Ravnborg
Sam
> +#define CM(x)( \
> + ((x) < 32)?0xe0|((x)-16) : \
> + ((x) < 64)?0xc0|((x)-32) : \
> + ((x) < 128)?0x80|((x)-64) : \
> + ((x) - 128))
> +#define CN(x)(((x) == 1)?0x1f : (((CN_BUF)>>((x)-1))&0x1f))
> +#define CO(x)((CO_BUF)>>(8-(x))&0x3)
A few spaces around the operators may help readability a little.
> +static int phy_write(struct phy *phy, u32 value, unsigned int reg)
> +{
> + struct mixel_dphy_priv *priv = phy_get_drvdata(phy);
> + int ret;
> +
> + ret = regmap_write(priv->regmap, reg, value);
> + if (ret < 0)
> + dev_err(&phy->dev, "Failed to write DPHY reg %d: %d", reg, ret);
I have recently learned that one has to remember trailign "\n"- please
add.
Check all other dev_xxx as I noticed the newline is missing in a few
more places.
> +
> + dev_dbg(&phy->dev, "hs_clk/ref_clk=%ld/%ld ⩰ %d/%d\n",
^
There was another of the symbols my terminal cannot show.
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Re: [PATCH v10 2/2] phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
On Tue, May 7, 2019 at 4:47 AM Guido Günther wrote: > > This adds support for the Mixel DPHY as found on i.MX8 CPUs but since > this is an IP core it will likely be found on others in the future. So > instead of adding this to the nwl host driver make it a generic PHY > driver. > > The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be > added once the necessary system controller bits are in via > mixel_dphy_devdata. > > Signed-off-by: Guido Günther > Co-developed-by: Robert Chiras > Signed-off-by: Robert Chiras Reviewed-by: Fabio Estevam ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
