[PATCH] drm/radeon/kms: reprogram format in set base.

2009-09-15 Thread Dave Airlie 
From: Dave Airlie 

This should in theory fix the problem with a mode set being required
for adjusting the color depth.

Signed-off-by: Dave Airlie 
---
 drivers/gpu/drm/radeon/radeon_legacy_crtc.c |   29 +++
 1 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c 
b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 0d29d15..040354d 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -401,11 +401,30 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, 
int y,
uint32_t crtc_offset, crtc_offset_cntl, crtc_tile_x0_y0 = 0;
uint32_t crtc_pitch, pitch_pixels;
uint32_t tiling_flags;
+   int format;
+   uint32_t gen_cntl_reg, gen_cntl_val;
 
DRM_DEBUG("\n");
 
radeon_fb = to_radeon_framebuffer(crtc->fb);
 
+   switch (crtc->fb->bits_per_pixel) {
+   case 15:  /*  555 */
+   format = 3;
+   break;
+   case 16:  /*  565 */
+   format = 4;
+   break;
+   case 24:  /*  RGB */
+   format = 5;
+   break;
+   case 32:  /* xRGB */
+   format = 6;
+   break;
+   default:
+   return false;
+   }
+
obj = radeon_fb->obj;
if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) {
return -EINVAL;
@@ -476,6 +495,16 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int 
y,
 
base &= ~7;
 
+   if (radeon_crtc->crtc_id == 1)
+   gen_cntl_reg = RADEON_CRTC2_GEN_CNTL;
+   else
+   gen_cntl_reg = RADEON_CRTC_GEN_CNTL;
+
+   gen_cntl_val = RREG32(gen_cntl_reg);
+   gen_cntl_val &= ~(0xf << 8);
+   gen_cntl_val |= (format << 8);
+   WREG32(gen_cntl_reg, gen_cntl_val);
+
crtc_offset = (u32)base;
 
WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, 
radeon_crtc->legacy_display_base_addr);
-- 
1.6.4.2


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Re: [PATCH] drm/radeon/kms: reprogram format in set base.

2009-09-16 Thread Michel Dänzer 
On Wed, 2009-09-16 at 10:16 +1000, Dave Airlie wrote: 
> From: Dave Airlie 
> 
> This should in theory fix the problem with a mode set being required
> for adjusting the color depth.
> 
> Signed-off-by: Dave Airlie 
> ---
>  drivers/gpu/drm/radeon/radeon_legacy_crtc.c |   29 
> +++
>  1 files changed, 29 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c 
> b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
> index 0d29d15..040354d 100644
> --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
> +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
> @@ -401,11 +401,30 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, 
> int y,
>   uint32_t crtc_offset, crtc_offset_cntl, crtc_tile_x0_y0 = 0;
>   uint32_t crtc_pitch, pitch_pixels;
>   uint32_t tiling_flags;
> + int format;
> + uint32_t gen_cntl_reg, gen_cntl_val;
>  
>   DRM_DEBUG("\n");
>  
>   radeon_fb = to_radeon_framebuffer(crtc->fb);
>  
> + switch (crtc->fb->bits_per_pixel) {
> + case 15:  /*  555 */
> + format = 3;
> + break;
> + case 16:  /*  565 */
> + format = 4;
> + break;
> + case 24:  /*  RGB */
> + format = 5;
> + break;
> + case 32:  /* xRGB */
> + format = 6;
> + break;
> + default:
> + return false;
> + }
> +
>   obj = radeon_fb->obj;
>   if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) {
>   return -EINVAL;

Even if depth 8 doesn't work properly yet, it would be nice not to
further proliferate these switch statements on crtc->fb->bits_per_pixel
without a case 8.

That said, it does work for me.


-- 
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Libre software enthusiast |  Debian, X and DRI developer

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