Attached are two patches that:
- define 0x4f18 as R300_RB3D_UNKOWN_4F18
- copy over 1 define from r200 as R300_VAP_CNTL
- rename R300_VAP_CNTL to R300_VAP_CNTL_STATUS to be the same as r200
  (both unused in r300 code)

On #dri-devel there was discussion about similarities in the lower
register numbers (up to 0x2200 iirc). Can someone tell if these thoughts
might be correct?

Also there was discussion on getting information about the blob from
tracing the win32 driver. Anyone got some information on how to do so?
diff -Naur /usr/src/mesa/src/mesa/drivers/dri/r300/r300_ioctl.c ./r300_ioctl.c
--- /usr/src/mesa/src/mesa/drivers/dri/r300/r300_ioctl.c	2007-02-26 16:48:38.000000000 +0100
+++ ./r300_ioctl.c	2007-02-26 16:53:22.000000000 +0100
@@ -227,7 +227,7 @@
 	e32(0);
 	
 	R300_STATECHANGE(r300, unk221C);
-	reg_start(0x221C, 0);
+	reg_start(R300_VAP_UNKNOWN_221C, 0);
 	e32(R300_221C_CLEAR);
 	
 	R300_STATECHANGE(r300, ps);
diff -Naur /usr/src/mesa/src/mesa/drivers/dri/r300/r300_reg.h ./r300_reg.h
--- /usr/src/mesa/src/mesa/drivers/dri/r300/r300_reg.h	2007-02-26 16:48:40.000000000 +0100
+++ ./r300_reg.h	2007-02-26 17:46:22.000000000 +0100
@@ -63,6 +63,12 @@
 #define R300_SE_VPORT_ZOFFSET               0x1DAC
 
 
+/*
+ * Vertex Array Processing (VAP) Control
+ * Stolen from r200 code from Christoph Brill (It's a guess!)
+ */
+#define R300_VAP_CNTL	0x2080
+
 /* This register is written directly and also starts data section
  * in many 3d CP_PACKET3's
  */
@@ -135,7 +141,7 @@
 
 /* gap */
 
-#define R300_VAP_CNTL                     0x2140
+#define R300_VAP_CNTL_STATUS              0x2140
 #	define R300_VC_NO_SWAP                  (0 << 0)
 #	define R300_VC_16BIT_SWAP               (1 << 0)
 #	define R300_VC_32BIT_SWAP               (2 << 0)
diff -Naur /usr/src/mesa/src/mesa/drivers/dri/r300/radeon_mm.c ./radeon_mm.c
--- /usr/src/mesa/src/mesa/drivers/dri/r300/radeon_mm.c	2007-01-20 21:07:09.000000000 +0100
+++ ./radeon_mm.c	2007-02-26 16:57:56.000000000 +0100
@@ -283,7 +283,7 @@
 		size -= cp_size;
 	}
 	
-	reg_start(0x4e4c,0);
+	reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
 	e32(0x0000000a);
 	
 	reg_start(0x342c,0);
diff -Naur /usr/src/mesa/src/mesa/drivers/dri/r300/r300_ioctl.c ./r300_ioctl.c
--- /usr/src/mesa/src/mesa/drivers/dri/r300/r300_ioctl.c	2007-02-26 10:55:02.000000000 +0100
+++ ./r300_ioctl.c	2007-02-26 16:41:10.000000000 +0100
@@ -163,9 +163,8 @@
 
 	reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
 	e32(0x0000000a);
-	  
 
-	reg_start(0x4f18,0);
+	reg_start(R300_RB3D_UNKOWN_4F18,0);
 	e32(0x00000003);
 	cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN);
 }
diff -Naur /usr/src/mesa/src/mesa/drivers/dri/r300/r300_reg.h ./r300_reg.h
--- /usr/src/mesa/src/mesa/drivers/dri/r300/r300_reg.h	2007-02-26 16:44:19.000000000 +0100
+++ ./r300_reg.h	2007-02-26 16:40:41.000000000 +0100
@@ -1309,7 +1309,7 @@
 /* gap */
 
 /* Guess by Vladimir.
- * Set to 0A before 3D operations, set to 02 afterwards.
+ * Set to 0A before 3D operations, set to 0A (was 02) afterwards.
  */
 #define R300_RB3D_DSTCACHE_CTLSTAT          0x4E4C
 #       define R300_RB3D_DSTCACHE_02             0x00000002
@@ -1382,6 +1382,12 @@
 #	define R300_EARLY_Z_DISABLE              (0 << 0)
 #	define R300_EARLY_Z_ENABLE               (1 << 0)
 
+/*
+ * Set to 03 before 3D operations, set to 03 (was 01) afterwards.
+ */
+#define R300_RB3D_UNKOWN_4F18                       0x4F18
+
+
 /* gap */
 
 #define R300_RB3D_DEPTHOFFSET               0x4F20
diff -Naur /usr/src/mesa/src/mesa/drivers/dri/r300/r300_render.c ./r300_render.c
--- /usr/src/mesa/src/mesa/drivers/dri/r300/r300_render.c	2007-02-26 10:55:02.000000000 +0100
+++ ./r300_render.c	2007-02-26 16:39:03.000000000 +0100
@@ -346,7 +346,7 @@
 	reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
 	e32(0x0000000a);
 
-	reg_start(0x4f18,0);
+	reg_start(R300_RB3D_UNKOWN_4F18,0);
 	e32(0x00000003);
 	
 	r300EmitState(rmesa);
@@ -362,7 +362,7 @@
 	reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
 	e32(0x0000000a/*0x2*/);
 
-	reg_start(0x4f18,0);
+	reg_start(R300_RB3D_UNKOWN_4F18,0);
 	e32(0x00000003/*0x1*/);
 
 #ifdef USER_BUFFERS
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