[PATCH 0/9] use c99 initializers in structures
These patches add labels in the initializations of structure fields (c99
initializers). The complete semantic patch thta makes this change is shown
below. This rule ignores cases where the initialization is just 0 or NULL,
where some of the fields already use labels, and where there are nested
structures.
// smpl
@ok1@
identifier i1,i2;
position p;
@@
struct i1 i2@p = { \(0\|NULL\) };
@ok2@
identifier i1,i2,i3;
position p;
expression e;
@@
struct i1 i2@p = { ..., .i3 = e, ... };
@ok3@
identifier i1,i2;
position p;
@@
struct i1 i2@p = { ..., { ... }, ... };
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@
struct i1 {
fs
T fld;
...};
@bad@
identifier decl.i1,i2;
expression e;
position p != {ok1.p,ok2.p,ok3.p};
constant nm;
initializer list[decl.n] is;
position fix;
@@
struct i1 i2@p = { is,
(
nm(...)
|
e@fix
)
,...};
@@
identifier decl.i1,i2,decl.fld;
expression e;
position bad.p, bad.fix;
@@
struct i1 i2@p = { ...,
+ .fld = e
- e@fix
,...};
// /smpl
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[PATCH 5/9] lustre: obdclass: use c99 initializers in structures
From: Julia Lawall julia.law...@lip6.fr
Use c99 initializers for structures.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// smpl
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@
struct i1 {
fs
T fld;
...};
@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@
struct i1 i2 = { is,
+ .fld = e
- e
,...};
// /smpl
Signed-off-by: Julia Lawall julia.law...@lip6.fr
---
The patches in this series do not depend on each other.
drivers/staging/lustre/lustre/obdclass/obd_mount.c | 10 --
drivers/staging/lustre/lustre/obdclass/lprocfs_status.c |5 -
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/lustre/lustre/obdclass/obd_mount.c
b/drivers/staging/lustre/lustre/obdclass/obd_mount.c
index d972f71..54ba8df 100644
--- a/drivers/staging/lustre/lustre/obdclass/obd_mount.c
+++ b/drivers/staging/lustre/lustre/obdclass/obd_mount.c
@@ -1276,7 +1276,10 @@ EXPORT_SYMBOL(lustre_register_kill_super_cb);
struct dentry *lustre_mount(struct file_system_type *fs_type, int flags,
const char *devname, void *data)
{
- struct lustre_mount_data2 lmd2 = { data, NULL };
+ struct lustre_mount_data2 lmd2 = {
+ .lmd2_data = data,
+ .lmd2_mnt = NULL
+ };
return mount_nodev(fs_type, flags, lmd2, lustre_fill_super);
}
diff --git a/drivers/staging/lustre/lustre/obdclass/lprocfs_status.c
b/drivers/staging/lustre/lustre/obdclass/lprocfs_status.c
index 8309d4c..1c5c1c9 100644
--- a/drivers/staging/lustre/lustre/obdclass/lprocfs_status.c
+++ b/drivers/staging/lustre/lustre/obdclass/lprocfs_status.c
@@ -1572,7 +1572,10 @@ lproc_exp_hash_seq_show(struct seq_file *m, void *unused)
{
struct nid_stat *stats = (struct nid_stat *)m-private;
struct obd_device *obd = stats-nid_obd;
- struct exp_hash_cb_data cb_data = {m, true};
+ struct exp_hash_cb_data cb_data = {
+ .m = m,
+ .first = true
+ };
cfs_hash_for_each_key(obd-obd_nid_hash, stats-nid,
lprocfs_exp_print_hash, cb_data);
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[PATCH 04/20] staging: rtl8188eu: Remove unused wrapper function rtw_hal_write_bbreg()
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/hal_intf.c |7 ---
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |1 -
drivers/staging/rtl8188eu/include/hal_intf.h |4
3 files changed, 12 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c
b/drivers/staging/rtl8188eu/hal/hal_intf.c
index 0d21e60..538a0f6 100644
--- a/drivers/staging/rtl8188eu/hal/hal_intf.c
+++ b/drivers/staging/rtl8188eu/hal/hal_intf.c
@@ -256,13 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap,
u8 arg,
rssi_level);
}
-void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
-u32 data)
-{
- if (adapt-HalFunc.write_bbreg)
- adapt-HalFunc.write_bbreg(adapt, regaddr, bitmask, data);
-}
-
u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
u32 regaddr, u32 bitmask)
{
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 204d2e4..ae7cb8d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -230,7 +230,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc-AntDivBeforeLinkHandler = AntDivBeforeLink8188E;
pHalFunc-AntDivCompareHandler = AntDivCompare8188E;
- pHalFunc-write_bbreg = rtl8188e_PHY_SetBBReg;
pHalFunc-read_rfreg = rtl8188e_PHY_QueryRFReg;
pHalFunc-write_rfreg = rtl8188e_PHY_SetRFReg;
diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h
b/drivers/staging/rtl8188eu/include/hal_intf.h
index 606fd60..9191993 100644
--- a/drivers/staging/rtl8188eu/include/hal_intf.h
+++ b/drivers/staging/rtl8188eu/include/hal_intf.h
@@ -213,8 +213,6 @@ struct hal_ops {
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
struct xmit_frame *pmgntframe);
- void(*write_bbreg)(struct adapter *padapter, u32 RegAddr,
- u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask);
@@ -300,8 +298,6 @@ voidrtw_hal_clone_data(struct adapter *dst_adapt,
void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
-void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
- u32 Data);
u32rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg(struct adapter *padapter,
--
1.7.10.4
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[PATCH 03/20] staging: rtl8188eu: Rework function PHY_QueryBBReg()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c |8 +--
drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c | 69 ++--
drivers/staging/rtl8188eu/hal/odm.c| 31 -
drivers/staging/rtl8188eu/hal/odm_RTL8188E.c |9 +--
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 44 -
drivers/staging/rtl8188eu/hal/usb_halinit.c|2 +-
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |3 -
drivers/staging/rtl8188eu/include/phy.h|2 +
8 files changed, 75 insertions(+), 93 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 94ee740..0284602 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -245,13 +245,13 @@ static bool rf6052_conf_para(struct adapter *adapt)
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
- u4val = PHY_QueryBBReg(adapt, pphyreg-rfintfs,
- BRFSI_RFENV);
+ u4val = phy_query_bb_reg(adapt, pphyreg-rfintfs,
+BRFSI_RFENV);
break;
case RF90_PATH_B:
case RF90_PATH_D:
- u4val = PHY_QueryBBReg(adapt, pphyreg-rfintfs,
- BRFSI_RFENV 16);
+ u4val = phy_query_bb_reg(adapt, pphyreg-rfintfs,
+BRFSI_RFENV 16);
break;
}
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index d2bcc16..e36fa5e 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -17,6 +17,7 @@
*/
#include odm_precomp.h
+#include phy.h
/* 2010/04/25 MH Define the max tx power tracking tx agc power. */
#defineODM_TXPWRTRACK_MAX_IDX_88E 6
@@ -181,7 +182,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
if (ThermalValue) {
/* Query OFDM path A default setting */
- ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance,
bMaskDWord)bMaskOFDM_D;
+ ele_D = phy_query_bb_reg(Adapter, rOFDM0_XATxIQImbalance,
bMaskDWord)bMaskOFDM_D;
for (i = 0; i OFDM_TABLE_SIZE_92D; i++) { /* find the
index */
if (ele_D == (OFDMSwingTable[i]bMaskOFDM_D)) {
OFDM_index_old[0] = (u8)i;
@@ -195,7 +196,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
/* Query OFDM path B default setting */
if (is2t) {
- ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance,
bMaskDWord)bMaskOFDM_D;
+ ele_D = phy_query_bb_reg(Adapter,
rOFDM0_XBTxIQImbalance, bMaskDWord)bMaskOFDM_D;
for (i = 0; i OFDM_TABLE_SIZE_92D; i++) { /* find
the index */
if (ele_D == (OFDMSwingTable[i]bMaskOFDM_D)) {
OFDM_index_old[1] = (u8)i;
@@ -444,7 +445,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION,
ODM_DBG_LOUD,
(TxPwrTracking 0xc80 = 0x%x,
0xc94 = 0x%x RF 0x24 = 0x%x\n,
-PHY_QueryBBReg(Adapter, 0xc80,
bMaskDWord), PHY_QueryBBReg(Adapter,
+phy_query_bb_reg(Adapter, 0xc80,
bMaskDWord), phy_query_bb_reg(Adapter,
0xc94, bMaskDWord),
PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
}
}
@@ -497,13 +498,13 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool
configPathB)
mdelay(IQK_DELAY_TIME_88E);
/* Check failed */
- regeac = PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord);
+ regeac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (0xeac =
0x%x\n, regeac));
- regE94 = PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord);
+ regE94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (0xe94 =
0x%x\n, regE94));
- regE9C = PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord);
+ regE9C = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord);
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (0xe9c =
0x%x\n,
[PATCH 02/20] staging: rtl8188eu: Remove unused wrapper function rtw_hal_read_bbreg()
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/hal_intf.c |9 -
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |1 -
drivers/staging/rtl8188eu/include/hal_intf.h |4
3 files changed, 14 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/hal_intf.c
b/drivers/staging/rtl8188eu/hal/hal_intf.c
index bc89e99..0d21e60 100644
--- a/drivers/staging/rtl8188eu/hal/hal_intf.c
+++ b/drivers/staging/rtl8188eu/hal/hal_intf.c
@@ -256,15 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap,
u8 arg,
rssi_level);
}
-u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask)
-{
- u32 data = 0;
-
- if (adapt-HalFunc.read_bbreg)
- data = adapt-HalFunc.read_bbreg(adapt, regaddr, bitmask);
- return data;
-}
-
void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
u32 data)
{
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 50b1332..204d2e4 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -230,7 +230,6 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc-AntDivBeforeLinkHandler = AntDivBeforeLink8188E;
pHalFunc-AntDivCompareHandler = AntDivCompare8188E;
- pHalFunc-read_bbreg = rtl8188e_PHY_QueryBBReg;
pHalFunc-write_bbreg = rtl8188e_PHY_SetBBReg;
pHalFunc-read_rfreg = rtl8188e_PHY_QueryRFReg;
pHalFunc-write_rfreg = rtl8188e_PHY_SetRFReg;
diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h
b/drivers/staging/rtl8188eu/include/hal_intf.h
index 1c5303e..606fd60 100644
--- a/drivers/staging/rtl8188eu/include/hal_intf.h
+++ b/drivers/staging/rtl8188eu/include/hal_intf.h
@@ -213,9 +213,6 @@ struct hal_ops {
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
struct xmit_frame *pmgntframe);
-
- u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
- u32 BitMask);
void(*write_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
@@ -303,7 +300,6 @@ voidrtw_hal_clone_data(struct adapter *dst_adapt,
void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
-u32rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
u32rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
--
1.7.10.4
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[PATCH 09/20] staging: rtl8188eu: Rework function rtl8188e_PHY_SetRFReg()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c |2 +-
drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c | 32 +++
drivers/staging/rtl8188eu/hal/odm.c|2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 42 +---
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c|4 +-
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |5 ---
drivers/staging/rtl8188eu/include/phy.h|2 +
8 files changed, 32 insertions(+), 59 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 670ded7..ddc2f55 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -179,7 +179,7 @@ static void rtl_rfreg_delay(struct adapter *adapt, enum
rf_radio_path rfpath,u32
} else if (addr == 0xf9) {
udelay(1);
} else {
- rtl8188e_PHY_SetRFReg(adapt, rfpath, addr, mask, data);
+ phy_set_rf_reg(adapt, rfpath, addr, mask, data);
udelay(1);
}
}
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index 06c5536..f1a1e78 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -527,14 +527,14 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
/* modify RXIQK mode table */
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (Path-A Rx
IQK modify RXIQK mode table!\n));
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
/* PA,PAD off */
- PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
- PHY_SetRFReg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
+ phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
+ phy_set_rf_reg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x8080);
@@ -589,10 +589,10 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
/* modify RXIQK mode table */
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, (Path-A Rx
IQK modify RXIQK mode table 2!\n));
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
- PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x3);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0xf);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x8080);
/* IQK setting */
@@ -630,7 +630,7 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
/* reload RF 0xdf */
phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x);
- PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
+ phy_set_rf_reg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
if (!(regeac BIT27) /* if Tx is OK, check whether
Rx is OK */
(((regEA4 0x03FF)16) != 0x132)
@@ -1224,18 +1224,18 @@ static void phy_LCCalibrate_8188E(struct adapter
*adapt, bool is2t)
/* 2. Set RF mode = standby mode */
/* Path-A */
- PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits,
(RF_Amode0x8)|0x1);
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_AC, bMask12Bits,
(RF_Amode0x8)|0x1);
/* Path-B */
if (is2t)
- PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits,
(RF_Bmode0x8)|0x1);
+ phy_set_rf_reg(adapt, RF_PATH_B, RF_AC, bMask12Bits,
(RF_Bmode0x8)|0x1);
}
[PATCH 06/20] staging: rtl8188eu: Rework function phy_RFSerialRead()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 99 ---
1 file changed, 34 insertions(+), 65 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 752ca42..ef1082f 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -64,81 +64,50 @@ void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32
bitmask, u32 data)
usb_write32(adapt, regaddr, data);
}
-/* */
-/* 2. RF register R/W API */
-/* */
-/**
-* Function:phy_RFSerialRead
-*
-* OverView:Read regster from RF chips
-*
-* Input:
-* struct adapter *Adapter,
-* enum rf_radio_path eRFPath, Radio path of A/B/C/D
-* u32 Offset, The target
address to be read
-*
-* Output: None
-* Return: u32 reback value
-* Note:Threre are three types of serial operations:
-* 1. Software serial write
-* 2. Hardware LSSI-Low Speed Serial Interface
-* 3. Hardware HSSI-High speed
-* serial write. Driver need to implement (1) and (2).
-* This function is equal to the combination of
RF_ReadReg() and RFLSSIRead()
-*/
-static u32
-phy_RFSerialRead(
- struct adapter *Adapter,
- enum rf_radio_path eRFPath,
- u32 Offset
- )
+static u32 rf_serial_read(struct adapter *adapt,
+ enum rf_radio_path rfpath, u32 offset)
{
- u32 retValue = 0;
- struct hal_data_8188e *pHalData =
GET_HAL_DATA(Adapter);
- struct bb_reg_def *pPhyReg = pHalData-PHYRegDef[eRFPath];
- u32 NewOffset;
+ u32 ret = 0;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct bb_reg_def *phyreg = hal_data-PHYRegDef[rfpath];
+ u32 newoffset;
u32 tmplong, tmplong2;
- u8 RfPiEnable = 0;
- /* */
- /* Make sure RF register offset is correct */
- /* */
- Offset = 0xff;
+ u8 rfpi_enable = 0;
- /* */
- /* Switch page for 8256 RF IC */
- /* */
- NewOffset = Offset;
+ offset = 0xff;
+ newoffset = offset;
- /* For 92S LSSI Read RFLSSIRead */
- /* For RF A/B write 0x824/82c(does not work in the future) */
- /* We must use 0x824 for RF A and B to execute read trigger */
- tmplong = phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2,
bMaskDWord);
- if (eRFPath == RF_PATH_A)
+ tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+ if (rfpath == RF_PATH_A)
tmplong2 = tmplong;
else
- tmplong2 = phy_query_bb_reg(Adapter, pPhyReg-rfHSSIPara2,
bMaskDWord);
+ tmplong2 = phy_query_bb_reg(adapt, phyreg-rfHSSIPara2,
+ bMaskDWord);
- tmplong2 = (tmplong2 (~bLSSIReadAddress)) | (NewOffset23) |
bLSSIReadEdge; /* T65 RF */
+ tmplong2 = (tmplong2 (~bLSSIReadAddress)) |
+ (newoffset23) | bLSSIReadEdge;
- phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord,
tmplong(~bLSSIReadEdge));
- udelay(10);/* PlatformStallExecution(10); */
+ phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
+ tmplong(~bLSSIReadEdge));
+ udelay(10);
- phy_set_bb_reg(Adapter, pPhyReg-rfHSSIPara2, bMaskDWord, tmplong2);
- udelay(100);/* PlatformStallExecution(100); */
+ phy_set_bb_reg(adapt, phyreg-rfHSSIPara2, bMaskDWord, tmplong2);
+ udelay(100);
- udelay(10);/* PlatformStallExecution(10); */
+ udelay(10);
- if (eRFPath == RF_PATH_A)
- RfPiEnable = (u8)phy_query_bb_reg(Adapter,
rFPGA0_XA_HSSIParameter1, BIT8);
- else if (eRFPath == RF_PATH_B)
- RfPiEnable = (u8)phy_query_bb_reg(Adapter,
rFPGA0_XB_HSSIParameter1, BIT8);
+ if (rfpath == RF_PATH_A)
+ rfpi_enable = (u8)phy_query_bb_reg(adapt,
rFPGA0_XA_HSSIParameter1, BIT8);
+ else if (rfpath == RF_PATH_B)
+ rfpi_enable = (u8)phy_query_bb_reg(adapt,
rFPGA0_XB_HSSIParameter1, BIT8);
- if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190,
20bits for T65 RF */
- retValue = phy_query_bb_reg(Adapter, pPhyReg-rfLSSIReadBackPi,
bLSSIReadBackData);
- } else {/* Read from BBreg8a0, 12 bits for 8190, 20 bits for
T65 RF */
- retValue = phy_query_bb_reg(Adapter, pPhyReg-rfLSSIReadBack,
bLSSIReadBackData);
- }
- return retValue;
+ if (rfpi_enable)
+ ret = phy_query_bb_reg(adapt,
[PATCH 07/20] staging: rtl8188eu: Rework function phy_RFSerialWrite()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 85 +++
1 file changed, 11 insertions(+), 74 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index ef1082f..2cbaff5 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -110,81 +110,18 @@ static u32 rf_serial_read(struct adapter *adapt,
return ret;
}
-/**
-* Function:phy_RFSerialWrite
-*
-* OverView:Write data to RF register (page 8~)
-*
-* Input:
-* struct adapter *Adapter,
-* enum rf_radio_path eRFPath, Radio path of A/B/C/D
-* u32 Offset, The target
address to be read
-* u32 DataThe new
register Data in the target bit position
-* of the
target to be read
-*
-* Output: None
-* Return: None
-* Note:Threre are three types of serial operations:
-* 1. Software serial write
-* 2. Hardware LSSI-Low Speed Serial Interface
-* 3. Hardware HSSI-High speed
-* serial write. Driver need to implement (1) and (2).
-* This function is equal to the combination of
RF_ReadReg() and RFLSSIRead()
- *
- * Note: For RF8256 only
- * The total count of RTL8256(Zebra4) register is around
36 bit it only employs
- * 4-bit RF address. RTL8256 uses register mode control
bit (Reg00[12], Reg00[10])
- * to access register address bigger than 0xf. See
Appendix-4 in PHY Configuration
- * programming guide for more details.
- * Thus, we define a sub-finction for RTL8526 register
address conversion
- *
===
- * Register Mode RegCTL[1]
RegCTL[0] Note
- * (Reg00[12])
(Reg00[10])
- *
===
- * Reg_Mode0 0
x Reg 0 ~15(0x0 ~ 0xf)
- *
--
- * Reg_Mode1 1
0 Reg 16 ~30(0x1 ~ 0xf)
- *
--
- * Reg_Mode2 1
1 Reg 31 ~ 45(0x1 ~ 0xf)
- *
--
- *
- * 2008/09/02 MH Add 92S RF definition
- *
- *
- *
-*/
-static void
-phy_RFSerialWrite(
- struct adapter *Adapter,
- enum rf_radio_path eRFPath,
- u32 Offset,
- u32 Data
- )
+static void rf_serial_write(struct adapter *adapt,
+ enum rf_radio_path rfpath, u32 offset,
+ u32 data)
{
- u32 DataAndAddr = 0;
- struct hal_data_8188e *pHalData =
GET_HAL_DATA(Adapter);
- struct bb_reg_def *pPhyReg = pHalData-PHYRegDef[eRFPath];
- u32 NewOffset;
-
-
- /* 2009/06/17 MH We can not execute IO for power save or other
accident mode. */
-
- Offset = 0xff;
-
- /* */
- /* Switch page for 8256 RF IC */
- /* */
- NewOffset = Offset;
-
- /* */
- /* Put write addr in [5:0] and write data in [31:16] */
- /* */
- DataAndAddr = ((NewOffset20) | (Data0x000f)) 0x0fff;
/* T65 RF */
+ u32 data_and_addr = 0;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct bb_reg_def *phyreg = hal_data-PHYRegDef[rfpath];
+ u32 newoffset;
- /* */
- /* Write Operation */
- /* */
- phy_set_bb_reg(Adapter, pPhyReg-rf3wireOffset, bMaskDWord,
DataAndAddr);
+ newoffset = offset 0xff;
+ data_and_addr = ((newoffset20) | (data0x000f)) 0x0fff;
+ phy_set_bb_reg(adapt, phyreg-rf3wireOffset, bMaskDWord, data_and_addr);
}
/**
@@ -251,7 +188,7 @@ rtl8188e_PHY_SetRFReg(
Data = ((Original_Value (~BitMask)) | (Data BitShift));
}
- phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
+ rf_serial_write(Adapter, eRFPath, RegAddr, Data);
}
[PATCH 12/20] staging: rtl8188eu: Rework function _PHY_SetBWMode92C()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 98 +--
1 file changed, 37 insertions(+), 61 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index c33da36..89ec958 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -259,102 +259,78 @@ PHY_SetTxPowerLevel8188E(
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, ofdmPowerLevel[0],
BW20PowerLevel[0], BW40PowerLevel[0], channel);
}
-/*-
- * Function:PHY_SetBWModeCallback8192C()
- *
- * Overview:Timer callback function for SetSetBWMode
- *
- * Input: PRT_TIMER pTimer
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Note: (1) We do not take j mode into consideration now
- * (2) Will two workitem of switch channel and switch
channel bandwidth run
- * concurrently?
- *---*/
-static void
-_PHY_SetBWMode92C(
- struct adapter *Adapter
-)
+static void phy_set_bw_mode_callback(struct adapter *adapt)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- u8 regBwOpMode;
- u8 regRRSR_RSC;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ u8 reg_bw_opmode;
+ u8 reg_prsr_rsc;
- if (pHalData-rf_chip == RF_PSEUDO_11N)
+ if (hal_data-rf_chip == RF_PSEUDO_11N)
return;
/* There is no 40MHz mode in RF_8225. */
- if (pHalData-rf_chip == RF_8225)
+ if (hal_data-rf_chip == RF_8225)
return;
- if (Adapter-bDriverStopped)
+ if (adapt-bDriverStopped)
return;
- /* 3 */
- /* 31Set MAC register */
- /* 3 */
+ /* Set MAC register */
- regBwOpMode = usb_read8(Adapter, REG_BWOPMODE);
- regRRSR_RSC = usb_read8(Adapter, REG_RRSR+2);
+ reg_bw_opmode = usb_read8(adapt, REG_BWOPMODE);
+ reg_prsr_rsc = usb_read8(adapt, REG_RRSR+2);
- switch (pHalData-CurrentChannelBW) {
+ switch (hal_data-CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
- regBwOpMode |= BW_OPMODE_20MHZ;
- /* 2007/02/07 Mark by Emily because we have not verify whether
this register works */
- usb_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+ reg_bw_opmode |= BW_OPMODE_20MHZ;
+ usb_write8(adapt, REG_BWOPMODE, reg_bw_opmode);
break;
case HT_CHANNEL_WIDTH_40:
- regBwOpMode = ~BW_OPMODE_20MHZ;
- /* 2007/02/07 Mark by Emily because we have not verify whether
this register works */
- usb_write8(Adapter, REG_BWOPMODE, regBwOpMode);
- regRRSR_RSC = (regRRSR_RSC0x90) |
(pHalData-nCur40MhzPrimeSC5);
- usb_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
+ reg_bw_opmode = ~BW_OPMODE_20MHZ;
+ usb_write8(adapt, REG_BWOPMODE, reg_bw_opmode);
+ reg_prsr_rsc = (reg_prsr_rsc0x90) |
+ (hal_data-nCur40MhzPrimeSC5);
+ usb_write8(adapt, REG_RRSR+2, reg_prsr_rsc);
break;
default:
break;
}
- /* 3 */
- /* 3 2Set PHY related register */
- /* 3 */
- switch (pHalData-CurrentChannelBW) {
- /* 20 MHz channel*/
+ /* Set PHY related register */
+ switch (hal_data-CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
- phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
- phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
+ phy_set_bb_reg(adapt, rFPGA0_RFMOD, bRFMOD, 0x0);
+ phy_set_bb_reg(adapt, rFPGA1_RFMOD, bRFMOD, 0x0);
break;
- /* 40 MHz channel*/
case HT_CHANNEL_WIDTH_40:
- phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
- phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
- /* Set Control channel to upper or lower. These settings are
required only for 40MHz */
- phy_set_bb_reg(Adapter, rCCK0_System, bCCKSideBand,
(pHalData-nCur40MhzPrimeSC1));
- phy_set_bb_reg(Adapter, rOFDM1_LSTF, 0xC00,
pHalData-nCur40MhzPrimeSC);
- phy_set_bb_reg(Adapter, 0x818, (BIT26 | BIT27),
-(pHalData-nCur40MhzPrimeSC ==
HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
+ phy_set_bb_reg(adapt, rFPGA0_RFMOD, bRFMOD, 0x1);
+ phy_set_bb_reg(adapt, rFPGA1_RFMOD, bRFMOD, 0x1);
+ /* Set Control channel to upper or lower.
+* These settings are
[PATCH 11/20] staging: rtl8188eu: Rework function phy_PowerIndexCheck88E()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index f4df9ef..c33da36 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -211,15 +211,16 @@ static void get_tx_power_index(struct adapter *adapt, u8
channel, u8 *cck_pwr,
}
}
-static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8
*cckPowerLevel,
- u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8
*BW40PowerLevel)
+static void phy_power_index_check(struct adapter *adapt, u8 channel,
+ u8 *cck_pwr, u8 *ofdm_pwr, u8 *bw20_pwr,
+ u8 *bw40_pwr)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
- pHalData-CurrentCckTxPwrIdx = cckPowerLevel[0];
- pHalData-CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
- pHalData-CurrentBW2024GTxPwrIdx = BW20PowerLevel[0];
- pHalData-CurrentBW4024GTxPwrIdx = BW40PowerLevel[0];
+ hal_data-CurrentCckTxPwrIdx = cck_pwr[0];
+ hal_data-CurrentOfdm24GTxPwrIdx = ofdm_pwr[0];
+ hal_data-CurrentBW2024GTxPwrIdx = bw20_pwr[0];
+ hal_data-CurrentBW4024GTxPwrIdx = bw40_pwr[0];
}
/*-
@@ -252,7 +253,7 @@ PHY_SetTxPowerLevel8188E(
get_tx_power_index(Adapter, channel, cckPowerLevel[0],
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
- phy_PowerIndexCheck88E(Adapter, channel, cckPowerLevel[0],
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
+ phy_power_index_check(Adapter, channel, cckPowerLevel[0],
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
rtl8188e_PHY_RF6052SetCckTxPower(Adapter, cckPowerLevel[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, ofdmPowerLevel[0],
BW20PowerLevel[0], BW40PowerLevel[0], channel);
--
1.7.10.4
___
devel mailing list
de...@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH 08/20] staging: rtl8188eu: Rework function PHY_QueryRFReg()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c | 10 +++
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |4 +--
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 31 +---
drivers/staging/rtl8188eu/hal/usb_halinit.c|4 +--
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 ---
drivers/staging/rtl8188eu/include/phy.h|2 ++
6 files changed, 18 insertions(+), 37 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index f837c95..06c5536 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -169,7 +169,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
(===dm_TXPowerTrackingCallback_ThermalMeter_8188E
txpowercontrol %d\n,
dm_odm-RFCalibrateInfo.TxPowerTrackControl));
- ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E,
0xfc00); /* 0x42: RF Reg[15:10] 88E */
+ ThermalValue = (u8)phy_query_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E,
0xfc00);/* 0x42: RF Reg[15:10] 88E */
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
(Readback Thermal Meter = 0x%x pre thermal meter 0x%x
EEPROMthermalmeter 0x%x\n,
@@ -446,7 +446,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION,
ODM_DBG_LOUD,
(TxPwrTracking 0xc80 = 0x%x,
0xc94 = 0x%x RF 0x24 = 0x%x\n,
phy_query_bb_reg(Adapter, 0xc80,
bMaskDWord), phy_query_bb_reg(Adapter,
-0xc94, bMaskDWord),
PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
+0xc94, bMaskDWord),
phy_query_rf_reg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
}
}
@@ -1216,11 +1216,11 @@ static void phy_LCCalibrate_8188E(struct adapter
*adapt, bool is2t)
if ((tmpreg0x70) != 0) {
/* 1. Read original RF mode */
/* Path-A */
- RF_Amode = PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits);
+ RF_Amode = phy_query_rf_reg(adapt, RF_PATH_A, RF_AC,
bMask12Bits);
/* Path-B */
if (is2t)
- RF_Bmode = PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC,
bMask12Bits);
+ RF_Bmode = phy_query_rf_reg(adapt, RF_PATH_B, RF_AC,
bMask12Bits);
/* 2. Set RF mode = standby mode */
/* Path-A */
@@ -1232,7 +1232,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt,
bool is2t)
}
/* 3. Read RF reg18 */
- LC_Cal = PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
+ LC_Cal = phy_query_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
/* 4. Set LC calibration begin bit15 */
PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index ae7cb8d..a5064ae 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -23,7 +23,7 @@
#include linux/vmalloc.h
#include drv_types.h
#include rtw_efuse.h
-
+#include phy.h
#include rtl8188e_hal.h
#include rtw_iol.h
@@ -230,7 +230,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc-AntDivBeforeLinkHandler = AntDivBeforeLink8188E;
pHalFunc-AntDivCompareHandler = AntDivCompare8188E;
- pHalFunc-read_rfreg = rtl8188e_PHY_QueryRFReg;
+ pHalFunc-read_rfreg = phy_query_rf_reg;
pHalFunc-write_rfreg = rtl8188e_PHY_SetRFReg;
pHalFunc-sreset_init_value = sreset_init_value;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 2cbaff5..506b287 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -124,32 +124,15 @@ static void rf_serial_write(struct adapter *adapt,
phy_set_bb_reg(adapt, phyreg-rf3wireOffset, bMaskDWord, data_and_addr);
}
-/**
-* Function:PHY_QueryRFReg
-*
-* OverView:Query Specific bits to RF register (page 8~)
-*
-* Input:
-* struct adapter *Adapter,
-* enum rf_radio_path eRFPath, Radio path of A/B/C/D
-* u32 RegAddr,The target
address to be read
-* u32 BitMask The target bit
position in the target address
-* to be
[PATCH 10/20] staging: rtl8188eu: Rework function getTxPowerIndex88E()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 105 ++-
1 file changed, 45 insertions(+), 60 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 83cd19d..f4df9ef 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -150,78 +150,63 @@ void phy_set_rf_reg(struct adapter *adapt, enum
rf_radio_path rf_path,
rf_serial_write(adapt, rf_path, reg_addr, data);
}
-static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8
*cckPowerLevel,
- u8 *ofdmPowerLevel, u8 *BW20PowerLevel,
- u8 *BW40PowerLevel)
+static void get_tx_power_index(struct adapter *adapt, u8 channel, u8 *cck_pwr,
+ u8 *ofdm_pwr, u8 *bw20_pwr, u8 *bw40_pwr)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u8 index = (channel - 1);
u8 TxCount = 0, path_nums;
- if ((RF_1T2R == pHalData-rf_type) || (RF_1T1R == pHalData-rf_type))
+ if ((RF_1T2R == hal_data-rf_type) || (RF_1T1R == hal_data-rf_type))
path_nums = 1;
else
path_nums = 2;
for (TxCount = 0; TxCount path_nums; TxCount++) {
if (TxCount == RF_PATH_A) {
- /* 1. CCK */
- cckPowerLevel[TxCount] =
pHalData-Index24G_CCK_Base[TxCount][index];
- /* 2. OFDM */
- ofdmPowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
- pHalData-OFDM_24G_Diff[TxCount][RF_PATH_A];
- /* 1. BW20 */
- BW20PowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[TxCount][RF_PATH_A];
- /* 2. BW40 */
- BW40PowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[TxCount][index];
+ cck_pwr[TxCount] =
hal_data-Index24G_CCK_Base[TxCount][index];
+ ofdm_pwr[TxCount] =
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+
hal_data-OFDM_24G_Diff[TxCount][RF_PATH_A];
+
+ bw20_pwr[TxCount] =
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+
hal_data-BW20_24G_Diff[TxCount][RF_PATH_A];
+ bw40_pwr[TxCount] =
hal_data-Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_B) {
- /* 1. CCK */
- cckPowerLevel[TxCount] =
pHalData-Index24G_CCK_Base[TxCount][index];
- /* 2. OFDM */
- ofdmPowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[TxCount][index];
- /* 1. BW20 */
- BW20PowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[TxCount][RF_PATH_A]+
- pHalData-BW20_24G_Diff[TxCount][index];
- /* 2. BW40 */
- BW40PowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[TxCount][index];
+ cck_pwr[TxCount] =
hal_data-Index24G_CCK_Base[TxCount][index];
+ ofdm_pwr[TxCount] =
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+ hal_data-BW20_24G_Diff[RF_PATH_A][index]+
+ hal_data-BW20_24G_Diff[TxCount][index];
+
+ bw20_pwr[TxCount] =
hal_data-Index24G_BW40_Base[RF_PATH_A][index]+
+ hal_data-BW20_24G_Diff[TxCount][RF_PATH_A]+
+ hal_data-BW20_24G_Diff[TxCount][index];
+ bw40_pwr[TxCount] =
hal_data-Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_C) {
- /* 1. CCK */
- cckPowerLevel[TxCount] =
pHalData-Index24G_CCK_Base[TxCount][index];
- /* 2. OFDM */
- ofdmPowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[RF_PATH_B][index]+
- pHalData-BW20_24G_Diff[TxCount][index];
- /* 1. BW20 */
- BW20PowerLevel[TxCount] =
pHalData-Index24G_BW40_Base[RF_PATH_A][index]+
- pHalData-BW20_24G_Diff[RF_PATH_A][index]+
-
[PATCH 14/20] staging: rtl8188eu: Rework function PHY_SetTxPowerLevel8188E()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c |2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 44 ++--
drivers/staging/rtl8188eu/hal/usb_halinit.c|2 +-
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |1 -
drivers/staging/rtl8188eu/include/phy.h|2 +
5 files changed, 17 insertions(+), 34 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index f1a1e78..0e58597 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -114,7 +114,7 @@ static void odm_TxPwrTrackSetPwr88E(struct odm_dm_struct
*dm_odm)
{
if (dm_odm-BbSwingFlagOfdm || dm_odm-BbSwingFlagCck) {
ODM_RT_TRACE(dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
(odm_TxPwrTrackSetPwr88E CH=%d\n, *(dm_odm-pChannel)));
- PHY_SetTxPowerLevel8188E(dm_odm-Adapter, *(dm_odm-pChannel));
+ phy_set_tx_power_level(dm_odm-Adapter, *(dm_odm-pChannel));
dm_odm-BbSwingFlagOfdm = false;
dm_odm-BbSwingFlagCck = false;
}
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 1aa5a56..85e05ae 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -223,40 +223,22 @@ static void phy_power_index_check(struct adapter *adapt,
u8 channel,
hal_data-CurrentBW4024GTxPwrIdx = bw40_pwr[0];
}
-/*-
- * Function:SetTxPowerLevel8190()
- *
- * Overview:This function is export to HalCommon moudule
- * We must consider RF path later!!!
- *
- * Input: struct adapter *Adapter
- * u8 channel
- *
- * Output: NONE
- *
- * Return: NONE
- * 2008/11/04 MHC We remove EEPROM_93C56.
- * We need to move CCX relative
code to independet file.
- * 2009/01/21 MHC Support new EEPROM format from SD3
requirement.
- *
- *---*/
-void
-PHY_SetTxPowerLevel8188E(
- struct adapter *Adapter,
- u8 channel
- )
+void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
{
- u8 cckPowerLevel[MAX_TX_COUNT] = {0};
- u8 ofdmPowerLevel[MAX_TX_COUNT] = {0};/* [0]:RF-A, [1]:RF-B */
- u8 BW20PowerLevel[MAX_TX_COUNT] = {0};
- u8 BW40PowerLevel[MAX_TX_COUNT] = {0};
+ u8 cck_pwr[MAX_TX_COUNT] = {0};
+ u8 ofdm_pwr[MAX_TX_COUNT] = {0};/* [0]:RF-A, [1]:RF-B */
+ u8 bw20_pwr[MAX_TX_COUNT] = {0};
+ u8 bw40_pwr[MAX_TX_COUNT] = {0};
- get_tx_power_index(Adapter, channel, cckPowerLevel[0],
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
+ get_tx_power_index(adapt, channel, cck_pwr[0], ofdm_pwr[0],
+ bw20_pwr[0], bw40_pwr[0]);
- phy_power_index_check(Adapter, channel, cckPowerLevel[0],
ofdmPowerLevel[0], BW20PowerLevel[0], BW40PowerLevel[0]);
+ phy_power_index_check(adapt, channel, cck_pwr[0], ofdm_pwr[0],
+ bw20_pwr[0], bw40_pwr[0]);
- rtl8188e_PHY_RF6052SetCckTxPower(Adapter, cckPowerLevel[0]);
- rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, ofdmPowerLevel[0],
BW20PowerLevel[0], BW40PowerLevel[0], channel);
+ rtl8188e_PHY_RF6052SetCckTxPower(adapt, cck_pwr[0]);
+ rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, ofdm_pwr[0], bw20_pwr[0],
+ bw40_pwr[0], channel);
}
static void phy_set_bw_mode_callback(struct adapter *adapt)
@@ -376,7 +358,7 @@ static void phy_sw_chnl_callback(struct adapter *adapt, u8
channel)
if (adapt-bNotifyChannelChange)
DBG_88E([%s] ch = %d\n, __func__, channel);
- PHY_SetTxPowerLevel8188E(adapt, channel);
+ phy_set_tx_power_level(adapt, channel);
param1 = RF_CHNLBW;
param2 = channel;
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 968707e..f56cbdf 100644
--- a/drivers/staging/rtl8188eu/hal/usb_halinit.c
+++ b/drivers/staging/rtl8188eu/hal/usb_halinit.c
@@ -829,7 +829,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
/* 2010/12/17 MH We need to set TX power according to EFUSE content at
first. */
- PHY_SetTxPowerLevel8188E(Adapter, haldata-CurrentChannel);
+ phy_set_tx_power_level(Adapter, haldata-CurrentChannel);
/* Move by Neo for USB SS to below setp */
/* _RfPowerSave(Adapter); */
diff --git
[PATCH 13/20] staging: rtl8188eu: Rework function _PHY_SwChnl8192C()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 89ec958..1aa5a56 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -367,24 +367,24 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum
ht_channel_width Bandwidth
pHalData-CurrentChannelBW = tmpBW;
}
-static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
+static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel)
{
- u8 eRFPath;
+ u8 rf_path;
u32 param1, param2;
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
- if (Adapter-bNotifyChannelChange)
+ if (adapt-bNotifyChannelChange)
DBG_88E([%s] ch = %d\n, __func__, channel);
- /* s1. pre common command - CmdID_SetTxPowerLevel */
- PHY_SetTxPowerLevel8188E(Adapter, channel);
+ PHY_SetTxPowerLevel8188E(adapt, channel);
- /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW,
param2=channel */
param1 = RF_CHNLBW;
param2 = channel;
- for (eRFPath = 0; eRFPath pHalData-NumTotalRFPath; eRFPath++) {
- pHalData-RfRegChnlVal[eRFPath] =
((pHalData-RfRegChnlVal[eRFPath] 0xfc00) | param2);
- phy_set_rf_reg(Adapter, (enum rf_radio_path)eRFPath, param1,
bRFRegOffsetMask, pHalData-RfRegChnlVal[eRFPath]);
+ for (rf_path = 0; rf_path hal_data-NumTotalRFPath; rf_path++) {
+ hal_data-RfRegChnlVal[rf_path] =
(hal_data-RfRegChnlVal[rf_path]
+ 0xfc00) | param2;
+ phy_set_rf_reg(adapt, (enum rf_radio_path)rf_path, param1,
+ bRFRegOffsetMask,
hal_data-RfRegChnlVal[rf_path]);
}
}
@@ -404,7 +404,7 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
pHalData-CurrentChannel = channel;
if ((!Adapter-bDriverStopped) (!Adapter-bSurpriseRemoved)) {
- _PHY_SwChnl8192C(Adapter, channel);
+ phy_sw_chnl_callback(Adapter, channel);
if (bResult)
;
--
1.7.10.4
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[PATCH 05/20] staging: rtl8188eu: Rework function PHY_SetBBReg()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c |6 +-
drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c | 16 +-
drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c | 176 ++--
drivers/staging/rtl8188eu/hal/odm.c| 34 ++--
drivers/staging/rtl8188eu/hal/odm_RTL8188E.c | 144
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 53 ++
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c| 12 +-
drivers/staging/rtl8188eu/hal/usb_halinit.c|6 +-
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 -
drivers/staging/rtl8188eu/include/phy.h|1 +
10 files changed, 216 insertions(+), 236 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
index 0c5dc26..80e8cc9 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
@@ -174,7 +174,7 @@ static bool set_baseband_agc_config(struct adapter *adapt)
u32 v2 = array[i+1];
if (v1 0xCDCDCDCD){
- PHY_SetBBReg(adapt, v1, bMaskDWord, v2);
+ phy_set_bb_reg(adapt, v1, bMaskDWord, v2);
udelay(1);
}
}
@@ -392,7 +392,7 @@ static void rtl_bb_delay(struct adapter *adapt, u32 addr,
u32 data)
} else if (addr == 0xf9) {
udelay(1);
} else {
- PHY_SetBBReg(adapt, addr, bMaskDWord, data);
+ phy_set_bb_reg(adapt, addr, bMaskDWord, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
}
@@ -709,7 +709,7 @@ bool rtl88eu_phy_bb_config(struct adapter *adapt)
/* write 0x24[16:11] = 0x24[22:17] = crystal_cap */
crystal_cap = hal_data-CrystalCap 0x3F;
- PHY_SetBBReg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap |
(crystal_cap 6)));
+ phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap |
(crystal_cap 6)));
return rtstatus;
}
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
index 0284602..670ded7 100644
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
@@ -255,17 +255,18 @@ static bool rf6052_conf_para(struct adapter *adapt)
break;
}
- PHY_SetBBReg(adapt, pphyreg-rfintfe, BRFSI_RFENV 16, 0x1);
+ phy_set_bb_reg(adapt, pphyreg-rfintfe, BRFSI_RFENV 16, 0x1);
udelay(1);
- PHY_SetBBReg(adapt, pphyreg-rfintfo, BRFSI_RFENV, 0x1);
+ phy_set_bb_reg(adapt, pphyreg-rfintfo, BRFSI_RFENV, 0x1);
udelay(1);
- PHY_SetBBReg(adapt, pphyreg-rfHSSIPara2,
+ phy_set_bb_reg(adapt, pphyreg-rfHSSIPara2,
B3WIREADDREAALENGTH, 0x0);
udelay(1);
- PHY_SetBBReg(adapt, pphyreg-rfHSSIPara2, B3WIREDATALENGTH,
0x0);
+ phy_set_bb_reg(adapt, pphyreg-rfHSSIPara2,
+ B3WIREDATALENGTH, 0x0);
udelay(1);
switch (rfpath) {
@@ -284,12 +285,13 @@ static bool rf6052_conf_para(struct adapter *adapt)
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
- PHY_SetBBReg(adapt, pphyreg-rfintfs, BRFSI_RFENV,
u4val);
+ phy_set_bb_reg(adapt, pphyreg-rfintfs,
+ BRFSI_RFENV, u4val);
break;
case RF90_PATH_B:
case RF90_PATH_D:
- PHY_SetBBReg(adapt, pphyreg-rfintfs, BRFSI_RFENV 16,
- u4val);
+ phy_set_bb_reg(adapt, pphyreg-rfintfs,
+ BRFSI_RFENV 16, u4val);
break;
}
diff --git a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
index e36fa5e..f837c95 100644
--- a/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c
@@ -424,17 +424,17 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
/* wtite new elements A, C, D
to regC88 and regC9C, element B is always 0 */
value32 = (ele_D22) |
((ele_C0x3F)16) | ele_A;
- PHY_SetBBReg(Adapter,
rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+ phy_set_bb_reg(Adapter,
rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
[PATCH 15/20] staging: rtl8188eu: Rework function PHY_SetBWMode8188E()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 33 ++--
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |4 ---
drivers/staging/rtl8188eu/include/phy.h|3 ++
4 files changed, 13 insertions(+), 29 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index cc2988c..f41e83d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -221,7 +221,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc-read_chip_version = rtl8188e_read_chip_version;
- pHalFunc-set_bwmode_handler = PHY_SetBWMode8188E;
+ pHalFunc-set_bwmode_handler = phy_set_bw_mode;
pHalFunc-set_channel_handler = PHY_SwChnl8188E;
pHalFunc-hal_dm_watchdog = rtl8188e_HalDmWatchDog;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index 85e05ae..b1ff892 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -319,34 +319,19 @@ static void phy_set_bw_mode_callback(struct adapter
*adapt)
}
}
-
/*-
- * Function: SetBWMode8190Pci()
- *
- * Overview: This function is export to HalCommon moudule
- *
- * Input: struct adapter *Adapter
- * enum ht_channel_width Bandwidth 20M or 40M
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Note: We do not take j mode into consideration now
- *---*/
-void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width
Bandwidth, /* 20M or 40M */
- unsigned char Offset) /* Upper, Lower, or
Don't care */
+void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
+unsigned char offset)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- enum ht_channel_width tmpBW = pHalData-CurrentChannelBW;
-
- pHalData-CurrentChannelBW = Bandwidth;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ enum ht_channel_width tmp_bw = hal_data-CurrentChannelBW;
- pHalData-nCur40MhzPrimeSC = Offset;
+ hal_data-CurrentChannelBW = bandwidth;
+ hal_data-nCur40MhzPrimeSC = offset;
- if ((!Adapter-bDriverStopped) (!Adapter-bSurpriseRemoved))
- phy_set_bw_mode_callback(Adapter);
+ if ((!adapt-bDriverStopped) (!adapt-bSurpriseRemoved))
+ phy_set_bw_mode_callback(adapt);
else
- pHalData-CurrentChannelBW = tmpBW;
+ hal_data-CurrentChannelBW = tmp_bw;
}
static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel)
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index 1835933..f8bc63c 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
@@ -207,10 +207,6 @@ void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32
*powerlevel);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
-/* Switch bandwidth for 8192S */
-void PHY_SetBWMode8188E(struct adapter *adapter,
- enum ht_channel_width chnlwidth, unsigned char offset);
-
/* channel switch related funciton */
void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
/* Call after initialization */
diff --git a/drivers/staging/rtl8188eu/include/phy.h
b/drivers/staging/rtl8188eu/include/phy.h
index 853d1e3..5b93987 100644
--- a/drivers/staging/rtl8188eu/include/phy.h
+++ b/drivers/staging/rtl8188eu/include/phy.h
@@ -10,3 +10,6 @@ void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path
rf_path,
u32 reg_addr, u32 bit_mask, u32 data);
void phy_set_tx_power_level(struct adapter *adapt, u8 channel);
+
+void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
+unsigned char offset);
--
1.7.10.4
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[PATCH 16/20] staging: rtl8188eu: Rework function PHY_SwChnl8188E()
Rename CamelCase variables and function name.
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c |2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c| 27 +---
drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h |2 --
drivers/staging/rtl8188eu/include/phy.h|1 +
4 files changed, 14 insertions(+), 18 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index f41e83d..7a8fe53 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -222,7 +222,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc-read_chip_version = rtl8188e_read_chip_version;
pHalFunc-set_bwmode_handler = phy_set_bw_mode;
- pHalFunc-set_channel_handler = PHY_SwChnl8188E;
+ pHalFunc-set_channel_handler = phy_sw_chnl;
pHalFunc-hal_dm_watchdog = rtl8188e_HalDmWatchDog;
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
index b1ff892..5041da0 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
@@ -355,30 +355,27 @@ static void phy_sw_chnl_callback(struct adapter *adapt,
u8 channel)
}
}
-void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
+void phy_sw_chnl(struct adapter *adapt, u8 channel)
{
- /* Call after initialization */
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- u8 tmpchannel = pHalData-CurrentChannel;
- bool bResult = true;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ u8 tmpchannel = hal_data-CurrentChannel;
+ bool result = true;
- if (pHalData-rf_chip == RF_PSEUDO_11N)
- return; /* return immediately if it is peudo-phy */
+ if (hal_data-rf_chip == RF_PSEUDO_11N)
+ return;
if (channel == 0)
channel = 1;
- pHalData-CurrentChannel = channel;
+ hal_data-CurrentChannel = channel;
- if ((!Adapter-bDriverStopped) (!Adapter-bSurpriseRemoved)) {
- phy_sw_chnl_callback(Adapter, channel);
+ if ((!adapt-bDriverStopped) (!adapt-bSurpriseRemoved)) {
+ phy_sw_chnl_callback(adapt, channel);
- if (bResult)
- ;
- else
- pHalData-CurrentChannel = tmpchannel;
+ if (!result)
+ hal_data-CurrentChannel = tmpchannel;
} else {
- pHalData-CurrentChannel = tmpchannel;
+ hal_data-CurrentChannel = tmpchannel;
}
}
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
index f8bc63c..20e6b40 100644
--- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h
@@ -207,8 +207,6 @@ void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32
*powerlevel);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
-/* channel switch related funciton */
-void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
/* Call after initialization */
void ChkFwCmdIoDone(struct adapter *adapter);
diff --git a/drivers/staging/rtl8188eu/include/phy.h
b/drivers/staging/rtl8188eu/include/phy.h
index 5b93987..defed4a 100644
--- a/drivers/staging/rtl8188eu/include/phy.h
+++ b/drivers/staging/rtl8188eu/include/phy.h
@@ -13,3 +13,4 @@ void phy_set_tx_power_level(struct adapter *adapt, u8
channel);
void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
unsigned char offset);
+void phy_sw_chnl(struct adapter *adapt, u8 channel);
--
1.7.10.4
___
devel mailing list
de...@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH 20/20] staging: rtl8188eu: Rename HalHWImg8188E_MAC.c to mac_cfg.c
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/Makefile|2 +-
drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c | 133 -
drivers/staging/rtl8188eu/hal/mac_cfg.c | 133 +
3 files changed, 134 insertions(+), 134 deletions(-)
delete mode 100644 drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
create mode 100644 drivers/staging/rtl8188eu/hal/mac_cfg.c
diff --git a/drivers/staging/rtl8188eu/Makefile
b/drivers/staging/rtl8188eu/Makefile
index 412a056..20225b3 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -18,7 +18,7 @@ r8188eu-y := \
core/rtw_wlan_util.o\
core/rtw_xmit.o \
hal/fw.o\
- hal/HalHWImg8188E_MAC.o \
+ hal/mac_cfg.o \
hal/bb_cfg.o \
hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
deleted file mode 100644
index 7d22dd1..000
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_MAC.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/**
-*
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-**/
-
-#include odm_precomp.h
-#include rtw_iol.h
-
-/* MAC_REG.TXT */
-
-static u32 array_MAC_REG_8188E[] = {
- 0x026, 0x0041,
- 0x027, 0x0035,
- 0x428, 0x000A,
- 0x429, 0x0010,
- 0x430, 0x,
- 0x431, 0x0001,
- 0x432, 0x0002,
- 0x433, 0x0004,
- 0x434, 0x0005,
- 0x435, 0x0006,
- 0x436, 0x0007,
- 0x437, 0x0008,
- 0x438, 0x,
- 0x439, 0x,
- 0x43A, 0x0001,
- 0x43B, 0x0002,
- 0x43C, 0x0004,
- 0x43D, 0x0005,
- 0x43E, 0x0006,
- 0x43F, 0x0007,
- 0x440, 0x005D,
- 0x441, 0x0001,
- 0x442, 0x,
- 0x444, 0x0015,
- 0x445, 0x00F0,
- 0x446, 0x000F,
- 0x447, 0x,
- 0x458, 0x0041,
- 0x459, 0x00A8,
- 0x45A, 0x0072,
- 0x45B, 0x00B9,
- 0x460, 0x0066,
- 0x461, 0x0066,
- 0x480, 0x0008,
- 0x4C8, 0x00FF,
- 0x4C9, 0x0008,
- 0x4CC, 0x00FF,
- 0x4CD, 0x00FF,
- 0x4CE, 0x0001,
- 0x4D3, 0x0001,
- 0x500, 0x0026,
- 0x501, 0x00A2,
- 0x502, 0x002F,
- 0x503, 0x,
- 0x504, 0x0028,
- 0x505, 0x00A3,
- 0x506, 0x005E,
- 0x507, 0x,
- 0x508, 0x002B,
- 0x509, 0x00A4,
- 0x50A, 0x005E,
- 0x50B, 0x,
- 0x50C, 0x004F,
- 0x50D, 0x00A4,
- 0x50E, 0x,
- 0x50F, 0x,
- 0x512, 0x001C,
- 0x514, 0x000A,
- 0x516, 0x000A,
- 0x525, 0x004F,
- 0x550, 0x0010,
- 0x551, 0x0010,
- 0x559, 0x0002,
- 0x55D, 0x00FF,
- 0x605, 0x0030,
- 0x608, 0x000E,
- 0x609, 0x002A,
- 0x620, 0x00FF,
- 0x621, 0x00FF,
- 0x622, 0x00FF,
- 0x623, 0x00FF,
- 0x624, 0x00FF,
- 0x625, 0x00FF,
- 0x626, 0x00FF,
- 0x627, 0x00FF,
- 0x652, 0x0020,
- 0x63C, 0x000A,
- 0x63D, 0x000A,
[PATCH 19/20] staging: rtl8188eu: Rename HalHWImg8188E_RF.c to rf_cfg.c
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/Makefile |2 +-
drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c | 320 --
drivers/staging/rtl8188eu/hal/rf_cfg.c | 320 ++
3 files changed, 321 insertions(+), 321 deletions(-)
delete mode 100644 drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
create mode 100644 drivers/staging/rtl8188eu/hal/rf_cfg.c
diff --git a/drivers/staging/rtl8188eu/Makefile
b/drivers/staging/rtl8188eu/Makefile
index 600ca8e..412a056 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -20,7 +20,7 @@ r8188eu-y := \
hal/fw.o\
hal/HalHWImg8188E_MAC.o \
hal/bb_cfg.o \
- hal/HalHWImg8188E_RF.o \
+ hal/rf_cfg.o \
hal/HalPhyRf_8188e.o\
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o\
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
deleted file mode 100644
index ddc2f55..000
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_RF.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**
-*
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-**/
-
-#include odm_precomp.h
-
-#include phy.h
-
-static bool check_condition(struct adapter *adapt, const u32 condition)
-{
- struct odm_dm_struct *odm = GET_HAL_DATA(adapt)-odmpriv;
- u32 _board = odm-BoardType;
- u32 _platform = odm-SupportPlatform;
- u32 _interface = odm-SupportInterface;
- u32 cond = condition;
-
- if (condition == 0xCDCDCDCD)
- return true;
-
- cond = condition 0x00FF;
- if ((_board == cond) cond != 0x00)
- return false;
-
- cond = condition 0xFF00;
- cond = cond 8;
- if ((_interface cond) == 0 cond != 0x07)
- return false;
-
- cond = condition 0x00FF;
- cond = cond 16;
- if ((_platform cond) == 0 cond != 0x0F)
- return false;
- return true;
-}
-
-/* RadioA_1T.TXT */
-
-static u32 Array_RadioA_1T_8188E[] = {
- 0x000, 0x0003,
- 0x008, 0x00084000,
- 0x018, 0x0407,
- 0x019, 0x0012,
- 0x01E, 0x00080009,
- 0x01F, 0x0880,
- 0x02F, 0x0001A060,
- 0x03F, 0x,
- 0x042, 0x60C0,
- 0x057, 0x000D,
- 0x058, 0x000BE180,
- 0x067, 0x1552,
- 0x083, 0x,
- 0x0B0, 0x000FF8FC,
- 0x0B1, 0x00054400,
- 0x0B2, 0x000CCC19,
- 0x0B4, 0x00043003,
- 0x0B6, 0x0004953E,
- 0x0B7, 0x0001C718,
- 0x0B8, 0x60FF,
- 0x0B9, 0x00080001,
- 0x0BA, 0x0004,
- 0x0BB, 0x0400,
- 0x0BF, 0x000C,
- 0x0C2, 0x2400,
- 0x0C3, 0x0009,
- 0x0C4, 0x00040C91,
- 0x0C5, 0x0009,
- 0x0C6, 0x00A3,
- 0x0C7, 0x00088820,
- 0x0C8, 0x00076C06,
- 0x0C9, 0x,
- 0x0CA, 0x0008,
- 0x0DF, 0x0180,
- 0x0EF, 0x01A0,
- 0x051, 0x0006B27D,
- 0xFF0F041F, 0xABCD,
- 0x052, 0x0007E4DD,
- 0xCDCDCDCD, 0xCDCD,
- 0x052, 0x0007E49D,
- 0xFF0F041F, 0xDEAD,
- 0x053, 0x0073,
- 0x056, 0x00051FF3,
- 0x035, 0x0086,
- 0x035, 0x0186,
- 0x035, 0x0286,
- 0x036, 0x1C25,
- 0x036, 0x9C25,
- 0x036, 0x00011C25,
- 0x036, 0x00019C25,
- 0x0B6, 0x00048538,
- 0x018, 0x0C07,
- 0x05A, 0x0004BD00,
- 0x019, 0x000739D0,
- 0x034,
[PATCH 18/20] staging: rtl8188eu: Rename HalHWImg8188E_BB.c to bb_cfg.c
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/Makefile |2 +-
drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c | 715 --
drivers/staging/rtl8188eu/hal/bb_cfg.c | 715 ++
3 files changed, 716 insertions(+), 716 deletions(-)
delete mode 100644 drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
create mode 100644 drivers/staging/rtl8188eu/hal/bb_cfg.c
diff --git a/drivers/staging/rtl8188eu/Makefile
b/drivers/staging/rtl8188eu/Makefile
index 7886ea0..600ca8e 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -19,7 +19,7 @@ r8188eu-y := \
core/rtw_xmit.o \
hal/fw.o\
hal/HalHWImg8188E_MAC.o \
- hal/HalHWImg8188E_BB.o \
+ hal/bb_cfg.o \
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf_8188e.o\
hal/HalPwrSeqCmd.o \
diff --git a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
b/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
deleted file mode 100644
index 80e8cc9..000
--- a/drivers/staging/rtl8188eu/hal/HalHWImg8188E_BB.c
+++ /dev/null
@@ -1,715 +0,0 @@
-/**
-*
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-**/
-
-#include odm_precomp.h
-
-#include phy.h
-
-#define read_next_pair(array, v1, v2, i) \
-do { \
-i += 2;\
-v1 = array[i]; \
-v2 = array[i+1]; \
-} while (0)
-
-
-/* AGC_TAB_1T.TXT */
-
-static u32 array_agc_tab_1t_8188e[] = {
- 0xC78, 0xFB01,
- 0xC78, 0xFB010001,
- 0xC78, 0xFB020001,
- 0xC78, 0xFB030001,
- 0xC78, 0xFB040001,
- 0xC78, 0xFB050001,
- 0xC78, 0xFA060001,
- 0xC78, 0xF9070001,
- 0xC78, 0xF8080001,
- 0xC78, 0xF7090001,
- 0xC78, 0xF60A0001,
- 0xC78, 0xF50B0001,
- 0xC78, 0xF40C0001,
- 0xC78, 0xF30D0001,
- 0xC78, 0xF20E0001,
- 0xC78, 0xF10F0001,
- 0xC78, 0xF011,
- 0xC78, 0xEF110001,
- 0xC78, 0xEE120001,
- 0xC78, 0xED130001,
- 0xC78, 0xEC140001,
- 0xC78, 0xEB150001,
- 0xC78, 0xEA160001,
- 0xC78, 0xE9170001,
- 0xC78, 0xE8180001,
- 0xC78, 0xE7190001,
- 0xC78, 0xE61A0001,
- 0xC78, 0xE51B0001,
- 0xC78, 0xE41C0001,
- 0xC78, 0xE31D0001,
- 0xC78, 0xE21E0001,
- 0xC78, 0xE11F0001,
- 0xC78, 0x8A21,
- 0xC78, 0x89210001,
- 0xC78, 0x88220001,
- 0xC78, 0x87230001,
- 0xC78, 0x86240001,
- 0xC78, 0x85250001,
- 0xC78, 0x84260001,
- 0xC78, 0x83270001,
- 0xC78, 0x82280001,
- 0xC78, 0x6B290001,
- 0xC78, 0x6A2A0001,
- 0xC78, 0x692B0001,
- 0xC78, 0x682C0001,
- 0xC78, 0x672D0001,
- 0xC78, 0x662E0001,
- 0xC78, 0x652F0001,
- 0xC78, 0x6431,
- 0xC78, 0x63310001,
- 0xC78, 0x62320001,
- 0xC78, 0x61330001,
- 0xC78, 0x46340001,
- 0xC78, 0x45350001,
- 0xC78, 0x44360001,
- 0xC78, 0x43370001,
- 0xC78, 0x42380001,
- 0xC78, 0x41390001,
- 0xC78, 0x403A0001,
- 0xC78, 0x403B0001,
- 0xC78, 0x403C0001,
- 0xC78, 0x403D0001,
- 0xC78, 0x403E0001,
- 0xC78, 0x403F0001,
- 0xC78, 0xFB41,
- 0xC78, 0xFB410001,
- 0xC78, 0xFB420001,
- 0xC78, 0xFB430001,
-
[PATCH 17/20] staging: rtl8188eu: Rename rtl8188e_phycfg.c to phy.c
Signed-off-by: navin patidar navin.pati...@gmail.com
---
drivers/staging/rtl8188eu/Makefile |2 +-
drivers/staging/rtl8188eu/hal/phy.c | 381 +++
drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c | 381 ---
3 files changed, 382 insertions(+), 382 deletions(-)
create mode 100644 drivers/staging/rtl8188eu/hal/phy.c
delete mode 100644 drivers/staging/rtl8188eu/hal/rtl8188e_phycfg.c
diff --git a/drivers/staging/rtl8188eu/Makefile
b/drivers/staging/rtl8188eu/Makefile
index 1b8c89b..7886ea0 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -34,7 +34,7 @@ r8188eu-y := \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
- hal/rtl8188e_phycfg.o \
+ hal/phy.o \
hal/rtl8188e_rf6052.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_xmit.o \
diff --git a/drivers/staging/rtl8188eu/hal/phy.c
b/drivers/staging/rtl8188eu/hal/phy.c
new file mode 100644
index 000..5041da0
--- /dev/null
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -0,0 +1,381 @@
+/**
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+
**/
+#define _RTL8188E_PHYCFG_C_
+
+#include osdep_service.h
+#include drv_types.h
+#include rtw_iol.h
+#include rtl8188e_hal.h
+
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+static u32 cal_bit_shift(u32 bitmask)
+{
+ u32 i;
+
+ for (i = 0; i = 31; i++) {
+ if (((bitmask i) 0x1) == 1)
+ break;
+ }
+ return i;
+}
+
+u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask)
+{
+ u32 return_value = 0, original_value, bit_shift;
+
+ original_value = usb_read32(adapt, regaddr);
+ bit_shift = cal_bit_shift(bitmask);
+ return_value = (original_value bitmask) bit_shift;
+ return return_value;
+}
+
+void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask, u32 data)
+{
+ u32 original_value, bit_shift;
+
+ if (bitmask != bMaskDWord) { /* if not double word write */
+ original_value = usb_read32(adapt, regaddr);
+ bit_shift = cal_bit_shift(bitmask);
+ data = ((original_value (~bitmask)) | (data bit_shift));
+ }
+
+ usb_write32(adapt, regaddr, data);
+}
+
+static u32 rf_serial_read(struct adapter *adapt,
+ enum rf_radio_path rfpath, u32 offset)
+{
+ u32 ret = 0;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct bb_reg_def *phyreg = hal_data-PHYRegDef[rfpath];
+ u32 newoffset;
+ u32 tmplong, tmplong2;
+ u8 rfpi_enable = 0;
+
+ offset = 0xff;
+ newoffset = offset;
+
+ tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+ if (rfpath == RF_PATH_A)
+ tmplong2 = tmplong;
+ else
+ tmplong2 = phy_query_bb_reg(adapt, phyreg-rfHSSIPara2,
+ bMaskDWord);
+
+ tmplong2 = (tmplong2 (~bLSSIReadAddress)) |
+ (newoffset23) | bLSSIReadEdge;
+
+ phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
+ tmplong(~bLSSIReadEdge));
+ udelay(10);
+
+ phy_set_bb_reg(adapt, phyreg-rfHSSIPara2, bMaskDWord, tmplong2);
+ udelay(100);
+
+ udelay(10);
+
+ if (rfpath == RF_PATH_A)
+ rfpi_enable = (u8)phy_query_bb_reg(adapt,
rFPGA0_XA_HSSIParameter1, BIT8);
+ else if (rfpath == RF_PATH_B)
+ rfpi_enable = (u8)phy_query_bb_reg(adapt,
rFPGA0_XB_HSSIParameter1, BIT8);
+
+ if (rfpi_enable)
+ ret = phy_query_bb_reg(adapt, phyreg-rfLSSIReadBackPi,
+ bLSSIReadBackData);
+ else
+ ret = phy_query_bb_reg(adapt, phyreg-rfLSSIReadBack,
+ bLSSIReadBackData);
+
Re: [PATCH 0/9] use c99 initializers in structures
On Sat, Aug 23, 2014 at 01:20:22PM +0200, Julia Lawall wrote: These patches add labels in the initializations of structure fields (c99 initializers). The complete semantic patch thta makes this change is shown below. This rule ignores cases where the initialization is just 0 or NULL, where some of the fields already use labels, and where there are nested structures. I responded to patches 6 and 8 with comments; for the rest (1-5, 7, 9): Reviewed-by: Josh Triplett j...@joshtriplett.org ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
