Re: [PATCH] ION: Sys_heap: Add cached pool to spead up cached buffer alloc

2016-05-08 Thread Chen Feng 
Sorry,the order here is not right, please ignore this patch.

I will RESEND it.

On 2016/5/9 14:24, Chen Feng wrote:
> Add ion cached pool in system heap.
> 
> Signed-off-by: Chen Feng 
> Signed-off-by: Xia  Qing 
> ---
>  drivers/staging/android/ion/ion_system_heap.c | 120 
> +-
>  1 file changed, 79 insertions(+), 41 deletions(-)
> 
> diff --git a/drivers/staging/android/ion/ion_system_heap.c 
> b/drivers/staging/android/ion/ion_system_heap.c
> index b69dfc7..5b7e5b0 100644
> --- a/drivers/staging/android/ion/ion_system_heap.c
> +++ b/drivers/staging/android/ion/ion_system_heap.c
> @@ -49,7 +49,8 @@ static inline unsigned int order_to_size(int order)
>  
>  struct ion_system_heap {
>   struct ion_heap heap;
> - struct ion_page_pool *pools[0];
> + struct ion_page_pool *uncached_pools[0];
> + struct ion_page_pool *cached_pools[0];
>  };
>  
>  static struct page *alloc_buffer_page(struct ion_system_heap *heap,
> @@ -57,39 +58,36 @@ static struct page *alloc_buffer_page(struct 
> ion_system_heap *heap,
> unsigned long order)
>  {
>   bool cached = ion_buffer_cached(buffer);
> - struct ion_page_pool *pool = heap->pools[order_to_index(order)];
> + struct ion_page_pool *pool;
>   struct page *page;
>  
> - if (!cached) {
> - page = ion_page_pool_alloc(pool);
> - } else {
> - gfp_t gfp_flags = low_order_gfp_flags;
> -
> - if (order > 4)
> - gfp_flags = high_order_gfp_flags;
> - page = alloc_pages(gfp_flags | __GFP_COMP, order);
> - if (!page)
> - return NULL;
> - ion_pages_sync_for_device(NULL, page, PAGE_SIZE << order,
> - DMA_BIDIRECTIONAL);
> - }
> + if (!cached)
> + pool = heap->uncached_pools[order_to_index(order)];
> + else
> + pool = heap->cached_pools[order_to_index(order)];
>  
> + page = ion_page_pool_alloc(pool);
>   return page;
>  }
>  
>  static void free_buffer_page(struct ion_system_heap *heap,
>struct ion_buffer *buffer, struct page *page)
>  {
> + struct ion_page_pool *pool;
>   unsigned int order = compound_order(page);
>   bool cached = ion_buffer_cached(buffer);
>  
> - if (!cached && !(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
> - struct ion_page_pool *pool = heap->pools[order_to_index(order)];
> -
> - ion_page_pool_free(pool, page);
> - } else {
> + if (buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE) {
>   __free_pages(page, order);
> + return;
>   }
> +
> + if (!cached)
> + pool = heap->uncached_pools[order_to_index(order)];
> + else
> + pool = heap->cached_pools[order_to_index(order)];
> +
> + ion_page_pool_free(pool, page);
>  }
>  
>  
> @@ -224,9 +222,11 @@ static int ion_system_heap_shrink(struct ion_heap *heap, 
> gfp_t gfp_mask,
>   only_scan = 1;
>  
>   for (i = 0; i < num_orders; i++) {
> - struct ion_page_pool *pool = sys_heap->pools[i];
> + struct ion_page_pool *pool = sys_heap->uncached_pools[i];
>  
> - nr_freed = ion_page_pool_shrink(pool, gfp_mask, nr_to_scan);
> + nr_freed += ion_page_pool_shrink(pool, gfp_mask, nr_to_scan);
> + pool = sys_heap->cached_pools[i];
> + nr_freed += ion_page_pool_shrink(pool, gfp_mask, nr_to_scan);
>   nr_total += nr_freed;
>  
>   if (!only_scan) {
> @@ -259,27 +259,69 @@ static int ion_system_heap_debug_show(struct ion_heap 
> *heap, struct seq_file *s,
>   struct ion_system_heap,
>   heap);
>   int i;
> + struct ion_page_pool *pool;
>  
>   for (i = 0; i < num_orders; i++) {
> - struct ion_page_pool *pool = sys_heap->pools[i];
> + pool = sys_heap->uncached_pools[i];
>  
> - seq_printf(s, "%d order %u highmem pages in pool = %lu total\n",
> + seq_printf(s, "%d order %u highmem pages uncached %lu total\n",
>  pool->high_count, pool->order,
>  (PAGE_SIZE << pool->order) * pool->high_count);
> - seq_printf(s, "%d order %u lowmem pages in pool = %lu total\n",
> + seq_printf(s, "%d order %u lowmem pages uncached %lu total\n",
>  pool->low_count, pool->order,
>  (PAGE_SIZE << pool->order) * pool->low_count);
>   }
> +
> + for (i = 0; i < num_orders; i++) {
> + pool = sys_heap->cached_pools[i];
> +
> + seq_printf(s, "%d order %u highmem pages cached %lu total\n",
> +pool->high_count, pool->order,
> +(PAGE_SIZE << pool->order) * po

Re: [PATCH 0/6] Intel Secure Guard Extensions

2016-05-08 Thread Thomas Gleixner 
On Mon, 9 May 2016, Jarkko Sakkinen wrote:
> On Fri, May 06, 2016 at 01:54:14PM +0200, Thomas Gleixner wrote:
> > On Fri, 6 May 2016, Jarkko Sakkinen wrote:
> > 
> > > On Tue, May 03, 2016 at 04:06:27AM -0500, Dr. Greg Wettstein wrote:
> > > > It would be helpful and instructive for anyone involved in this debate
> > > > to review the following URL which details Intel's SGX licening
> > > > program:
> > > > 
> > > > https://software.intel.com/en-us/articles/intel-sgx-product-licensing
> > > 
> > > I think it would be good  to note that the licensing process is available
> > > only for Windows. For Linux you can only use debug enclaves at the
> > > moment. The default LE has "allow-all" policy for debug enclaves.
> > 
> > Which makes the feature pretty useless.
> >  
> > > > I think the only way forward to make all of this palatable is to
> > > > embrace something similar to what has been done with Secure Boot.  The
> > > > Root Enclave Key will need to be something which can be reconfigured
> > > > by the Platform Owner through BIOS/EFI.  That model would take Intel
> > > > off the hook from a security perspective and establish the notion of
> > > > platform trust to be a bilateral relationship between a service
> > > > provider and client.
> > > 
> > > This concern has been raised many times now. Sadly this did not make
> > > into Skyle but in future we will have one shot MSRs (can be set only
> > > once per boot cycle) for defining your own root of trust.
> > 
> > We'll wait for that to happen.
> 
> I fully understand if you (and others) want to keep this standpoint but
> what if we could get it to staging after I've revised it with suggested

This should not go to staging at all. Either this is going to be a real useful
driver or we just keep it out of tree.

> changes and internal changes in my TODO? Then it would not pollute the
> mainline kernel but still would be easily available for experimentation.

How are we supposed to experiment with that if there is no launch enclave for
Linux available?

Thanks,

tglx
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[PATCH] ION: Sys_heap: Add cached pool to spead up cached buffer alloc

2016-05-08 Thread Chen Feng 
Add ion cached pool in system heap.

Signed-off-by: Chen Feng 
Signed-off-by: Xia  Qing 
---
 drivers/staging/android/ion/ion_system_heap.c | 120 +-
 1 file changed, 79 insertions(+), 41 deletions(-)

diff --git a/drivers/staging/android/ion/ion_system_heap.c 
b/drivers/staging/android/ion/ion_system_heap.c
index b69dfc7..5b7e5b0 100644
--- a/drivers/staging/android/ion/ion_system_heap.c
+++ b/drivers/staging/android/ion/ion_system_heap.c
@@ -49,7 +49,8 @@ static inline unsigned int order_to_size(int order)
 
 struct ion_system_heap {
struct ion_heap heap;
-   struct ion_page_pool *pools[0];
+   struct ion_page_pool *uncached_pools[0];
+   struct ion_page_pool *cached_pools[0];
 };
 
 static struct page *alloc_buffer_page(struct ion_system_heap *heap,
@@ -57,39 +58,36 @@ static struct page *alloc_buffer_page(struct 
ion_system_heap *heap,
  unsigned long order)
 {
bool cached = ion_buffer_cached(buffer);
-   struct ion_page_pool *pool = heap->pools[order_to_index(order)];
+   struct ion_page_pool *pool;
struct page *page;
 
-   if (!cached) {
-   page = ion_page_pool_alloc(pool);
-   } else {
-   gfp_t gfp_flags = low_order_gfp_flags;
-
-   if (order > 4)
-   gfp_flags = high_order_gfp_flags;
-   page = alloc_pages(gfp_flags | __GFP_COMP, order);
-   if (!page)
-   return NULL;
-   ion_pages_sync_for_device(NULL, page, PAGE_SIZE << order,
-   DMA_BIDIRECTIONAL);
-   }
+   if (!cached)
+   pool = heap->uncached_pools[order_to_index(order)];
+   else
+   pool = heap->cached_pools[order_to_index(order)];
 
+   page = ion_page_pool_alloc(pool);
return page;
 }
 
 static void free_buffer_page(struct ion_system_heap *heap,
 struct ion_buffer *buffer, struct page *page)
 {
+   struct ion_page_pool *pool;
unsigned int order = compound_order(page);
bool cached = ion_buffer_cached(buffer);
 
-   if (!cached && !(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
-   struct ion_page_pool *pool = heap->pools[order_to_index(order)];
-
-   ion_page_pool_free(pool, page);
-   } else {
+   if (buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE) {
__free_pages(page, order);
+   return;
}
+
+   if (!cached)
+   pool = heap->uncached_pools[order_to_index(order)];
+   else
+   pool = heap->cached_pools[order_to_index(order)];
+
+   ion_page_pool_free(pool, page);
 }
 
 
@@ -224,9 +222,11 @@ static int ion_system_heap_shrink(struct ion_heap *heap, 
gfp_t gfp_mask,
only_scan = 1;
 
for (i = 0; i < num_orders; i++) {
-   struct ion_page_pool *pool = sys_heap->pools[i];
+   struct ion_page_pool *pool = sys_heap->uncached_pools[i];
 
-   nr_freed = ion_page_pool_shrink(pool, gfp_mask, nr_to_scan);
+   nr_freed += ion_page_pool_shrink(pool, gfp_mask, nr_to_scan);
+   pool = sys_heap->cached_pools[i];
+   nr_freed += ion_page_pool_shrink(pool, gfp_mask, nr_to_scan);
nr_total += nr_freed;
 
if (!only_scan) {
@@ -259,27 +259,69 @@ static int ion_system_heap_debug_show(struct ion_heap 
*heap, struct seq_file *s,
struct ion_system_heap,
heap);
int i;
+   struct ion_page_pool *pool;
 
for (i = 0; i < num_orders; i++) {
-   struct ion_page_pool *pool = sys_heap->pools[i];
+   pool = sys_heap->uncached_pools[i];
 
-   seq_printf(s, "%d order %u highmem pages in pool = %lu total\n",
+   seq_printf(s, "%d order %u highmem pages uncached %lu total\n",
   pool->high_count, pool->order,
   (PAGE_SIZE << pool->order) * pool->high_count);
-   seq_printf(s, "%d order %u lowmem pages in pool = %lu total\n",
+   seq_printf(s, "%d order %u lowmem pages uncached %lu total\n",
   pool->low_count, pool->order,
   (PAGE_SIZE << pool->order) * pool->low_count);
}
+
+   for (i = 0; i < num_orders; i++) {
+   pool = sys_heap->cached_pools[i];
+
+   seq_printf(s, "%d order %u highmem pages cached %lu total\n",
+  pool->high_count, pool->order,
+  (PAGE_SIZE << pool->order) * pool->high_count);
+   seq_printf(s, "%d order %u lowmem pages cached %lu total\n",
+  pool->low_count, pool->order,
+  (PAGE_SIZE << pool->order) * pool->l

Re: [PATCH 0/6] Intel Secure Guard Extensions

2016-05-08 Thread Jarkko Sakkinen 
On Fri, May 06, 2016 at 01:54:14PM +0200, Thomas Gleixner wrote:
> On Fri, 6 May 2016, Jarkko Sakkinen wrote:
> 
> > On Tue, May 03, 2016 at 04:06:27AM -0500, Dr. Greg Wettstein wrote:
> > > It would be helpful and instructive for anyone involved in this debate
> > > to review the following URL which details Intel's SGX licening
> > > program:
> > > 
> > > https://software.intel.com/en-us/articles/intel-sgx-product-licensing
> > 
> > I think it would be good  to note that the licensing process is available
> > only for Windows. For Linux you can only use debug enclaves at the
> > moment. The default LE has "allow-all" policy for debug enclaves.
> 
> Which makes the feature pretty useless.
>  
> > > I think the only way forward to make all of this palatable is to
> > > embrace something similar to what has been done with Secure Boot.  The
> > > Root Enclave Key will need to be something which can be reconfigured
> > > by the Platform Owner through BIOS/EFI.  That model would take Intel
> > > off the hook from a security perspective and establish the notion of
> > > platform trust to be a bilateral relationship between a service
> > > provider and client.
> > 
> > This concern has been raised many times now. Sadly this did not make
> > into Skyle but in future we will have one shot MSRs (can be set only
> > once per boot cycle) for defining your own root of trust.
> 
> We'll wait for that to happen.

I fully understand if you (and others) want to keep this standpoint but
what if we could get it to staging after I've revised it with suggested
changes and internal changes in my TODO? Then it would not pollute the
mainline kernel but still would be easily available for experimentation.

There was one header out of staging tree in the patch set sgx.h that I
could place to the staging area in the next revision.

For the next revision I'll document how IA32_LEPUBKEYHASHx MSRs work
based on some concerns that Andy raised so that we can hopefully have a
better discussion about this feature.

> Thanks,
> 
>   tglx

/Jarkko
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Re: [PATCH 3/6] intel_sgx: driver for Intel Secure Guard eXtensions

2016-05-08 Thread Jarkko Sakkinen 
On Fri, Apr 29, 2016 at 03:22:19PM -0700, Jethro Beekman wrote:
> On 29-04-16 13:04, Jarkko Sakkinen wrote:
> >>> Why would you want to do that?
> >>
> >> ...
> >
> > Do you see this as a performance issue or why do you think that this
> > would hurt that much?
> 
> I don't think it's a performance issue at all. I'm just giving an example of 
> why
> you'd want to do this. I'm sure people who want to use this instruction set 
> can
> come up with other uses, so I think the driver should support it. Other 
> drivers
> on different platform might support this, in which case we should be 
> compatible
> (to achieve the same enclave measurement). Other Linux drivers support it 
> [1]. I
> would ask: why would you not want to do this? It seems trivial to expand the
> current flag into 16 separate flags; one for each 256-byte chunk in the page.

I'm fine with adding a 16-bit bitmask.

/Jarkko
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[PATCH 3/3] staging: dgnc: Need to check for NULL of ch

2016-05-08 Thread Daeseok Youn 
the "ch" from brd structure could be NULL, it need to
check for NULL.

Signed-off-by: Daeseok Youn 
---
 drivers/staging/dgnc/dgnc_neo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c
index 9eae1a6..ba57e95 100644
--- a/drivers/staging/dgnc/dgnc_neo.c
+++ b/drivers/staging/dgnc/dgnc_neo.c
@@ -380,7 +380,7 @@ static inline void neo_parse_isr(struct dgnc_board *brd, 
uint port)
unsigned long flags;
 
ch = brd->channels[port];
-   if (ch->magic != DGNC_CHANNEL_MAGIC)
+   if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
return;
 
/* Here we try to figure out what caused the interrupt to happen */
-- 
2.8.2

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[PATCH 2/3] staging: dgnc: remove redundant condition check

2016-05-08 Thread Daeseok Youn 
dgnc_board(brd) was already checked for NULL before calling
neo_parse_isr(). And also port doesn't need to check.

Signed-off-by: Daeseok Youn 
---
 drivers/staging/dgnc/dgnc_neo.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c
index 3b8ce38..9eae1a6 100644
--- a/drivers/staging/dgnc/dgnc_neo.c
+++ b/drivers/staging/dgnc/dgnc_neo.c
@@ -379,12 +379,6 @@ static inline void neo_parse_isr(struct dgnc_board *brd, 
uint port)
unsigned char cause;
unsigned long flags;
 
-   if (!brd || brd->magic != DGNC_BOARD_MAGIC)
-   return;
-
-   if (port >= brd->maxports)
-   return;
-
ch = brd->channels[port];
if (ch->magic != DGNC_CHANNEL_MAGIC)
return;
-- 
2.8.2

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[PATCH 1/3] staging: dgnc: fix 'line over 80 characters'

2016-05-08 Thread Daeseok Youn 
fix checkpatch.pl warning about 'line over 80 characters'.

Signed-off-by: Daeseok Youn 
---
 drivers/staging/dgnc/dgnc_sysfs.c | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/staging/dgnc/dgnc_sysfs.c 
b/drivers/staging/dgnc/dgnc_sysfs.c
index d825964..b8d41c5 100644
--- a/drivers/staging/dgnc/dgnc_sysfs.c
+++ b/drivers/staging/dgnc/dgnc_sysfs.c
@@ -189,19 +189,21 @@ static ssize_t dgnc_ports_msignals_show(struct device *p,
DGNC_VERIFY_BOARD(p, bd);
 
for (i = 0; i < bd->nasync; i++) {
-   if (bd->channels[i]->ch_open_count) {
+   struct channel_t *ch = bd->channels[i];
+
+   if (ch->ch_open_count) {
count += snprintf(buf + count, PAGE_SIZE - count,
"%d %s %s %s %s %s %s\n",
-   bd->channels[i]->ch_portnum,
-   (bd->channels[i]->ch_mostat & UART_MCR_RTS) ? 
"RTS" : "",
-   (bd->channels[i]->ch_mistat & UART_MSR_CTS) ? 
"CTS" : "",
-   (bd->channels[i]->ch_mostat & UART_MCR_DTR) ? 
"DTR" : "",
-   (bd->channels[i]->ch_mistat & UART_MSR_DSR) ? 
"DSR" : "",
-   (bd->channels[i]->ch_mistat & UART_MSR_DCD) ? 
"DCD" : "",
-   (bd->channels[i]->ch_mistat & UART_MSR_RI)  ? 
"RI"  : "");
+   ch->ch_portnum,
+   (ch->ch_mostat & UART_MCR_RTS) ? "RTS" : "",
+   (ch->ch_mistat & UART_MSR_CTS) ? "CTS" : "",
+   (ch->ch_mostat & UART_MCR_DTR) ? "DTR" : "",
+   (ch->ch_mistat & UART_MSR_DSR) ? "DSR" : "",
+   (ch->ch_mistat & UART_MSR_DCD) ? "DCD" : "",
+   (ch->ch_mistat & UART_MSR_RI)  ? "RI"  : "");
} else {
count += snprintf(buf + count, PAGE_SIZE - count,
-   "%d\n", bd->channels[i]->ch_portnum);
+   "%d\n", ch->ch_portnum);
}
}
return count;
-- 
2.8.2

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Re: [PATCH 0/6] Intel Secure Guard Extensions

2016-05-08 Thread Andy Lutomirski 
On May 8, 2016 2:59 AM, "Dr. Greg Wettstein"  wrote:
>
>
> This now means the security of SGX on 'unlocked' platforms, at least
> from a trust perspective, will be dependent on using TXT so as to
> provide a hardware root of trust on which to base the SGX trust model.

Can you explain what you mean by "trust"?  In particular, what kind of
"trust" would you have with a verified or trusted boot plus verified
SGX launch root key that you would not have in the complete absence of
hardware launch control.

I've heard multiple people say they want launch control but I've never
heard a cogent explanation of a threat model in which it's useful.

> I would assume that everyone is using signed Launch Control Policies
> (LCP) as we are.  This means that TXT/tboot already has access to the
> public key which is used for the LCP data file signature.  It would
> seem logical to have tboot compute the signature on that public key
> and program that signature into the module signature registers.  That
> would tie the hardware root of trust to the SGX root of trust.

Now I'm confused.  TXT, in theory*, lets you establish a good root of
trust for TPM PCR measurements.  So, with TXT, if you had one-shop
launch control MSRs, you could attest that you've locked the launch
control policy.

But what do you gain by doing such a thing?  All you're actually
attesting is that you locked it until the next reboot.  Someone who
subsequently compromises you can reboot you, bypass TXT on the next
boot, and launch any enclave they want.  In any event, SGX is supposed
to make it so that your enclaves remain secure regardless of what
happens to the kernel, so I'm at a loss for what you're trying to do.

* There are some serious concerns about the security of TXT.  SGX is
supposed to be better.

--Andy
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Agatha

2016-05-08 Thread Agatha 
Read with understanding please: 
Please let this letter not to bring confusion to you. I know that we have not 
met either before but hear me from the depth of your mind. It is circumstances 
that made to send this to you.

I will introduce myself first to you, my name is Ms. Agatha Ruben, and I lost 
my Father, my hero and my lord Mr. Josiah Ruben years ago. He was poisoned to 
death by his associate in business. He formed a company by one Mr. James Anoh 
who poisoned him only to take benefit of the multi million ventures. He was 
arrested immediately my Father died and he entered an agreement with my 
father's brothers that I and the immediate younger brother of my father will 
represent my father's interest in the company. After six months I was kicked 
out of the company because I said that we have to change the company's lawyer 
who I termed was part of the elimination of my father.

I did not know that they have changed all the company's document without my 
name appearing anywhere. I will have to let you know more detail on that but 
let me move to the point why I am contacting you. I have been nick named 
bastard by my father's relations, they have named me all source of names even 
calling me outcast because my father is late, while my father was the bread 
winner of the family. They have pushed me out of my father's mansion and still 
want to eliminate my life.

I got through the records of my father account books three weeks ago while 
crying and meditating, which I believe was inspired by the spirit of God; I 
discovered that there is a huge sum of money he deposited in a bank, which is 
?5808, 396.00.Euro The note attached to the deposit agreement he made with the 
bank indicated that, the money was to be used to purchase machinery for the 
establishment of a new company of his own.

Please all I need from you is to do all you can to help me to get this money 
out of the bank. I have been to the bank where this money is deposited 
immediately, and confirmed the account most diligently. The bank told me that 
my father informed them that the money was to be remitted to his company's 
costumer account abroad, which his costumer will provide to them but since then 
they have never heard from him or the costumer. Now my father is late. I don't 
want the bank to know that my father is late. I told them that he is ill and 
appointed me to represent him in his affairs.

(1).I wants you to provide an account where the money will be remitted into as 
my father's costumer. (2).Make arrangement for me to leave here as soon as 
possible.

My father did not marry to any woman, He had me as the only child while he was 
having an affair with the person that supposed to be my mother when he was 28 
years and the woman abandoned him and disappeared which forced him to remain 
single. I have no home now and my life is in danger, I don't have any one to 
run into. All the members of my father family have turned their back on me 
because I demand for me right. They told me that I don't belong to the family. 
That I should go and look for my mother, whom I don't know. I have made trace 
to know my mother without success. I want you to hear me from the inner most of 
your heart and accord me this help.

God will bless you for saving my life and future.

Best wishes,
Miss. Agatha Ruben
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2016-05-08 Thread ADMIN 



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Re: [PATCH v9 net-next 1/2] hv_sock: introduce Hyper-V Sockets

2016-05-08 Thread David Miller 
From: Dexuan Cui 
Date: Sun, 8 May 2016 06:11:04 +

> Thanks for pointing this out!
> I understand, so I think I should add a module parameter, e.g.,
> "hv_sock.max_socket_number" with a default value, say, 1024?

No, you should get rid of the huge multi-page buffers.
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[PATCH] Staging: wlan-ng: fix comments style

2016-05-08 Thread YU Bo 

The patch fixed warning reported by checkpatch.pl: Block comments use a
trailing */ on a separate line.

Signed-off-by: YU Bo 
---
 drivers/staging/wlan-ng/prism2mgmt.h |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/wlan-ng/prism2mgmt.h 
b/drivers/staging/wlan-ng/prism2mgmt.h
index e6472034da33..371c0fe8ae9d 100644
--- a/drivers/staging/wlan-ng/prism2mgmt.h
+++ b/drivers/staging/wlan-ng/prism2mgmt.h
@@ -82,10 +82,10 @@ int prism2mgmt_flashdl_state(wlandevice_t *wlandev, void 
*msgp);
 int prism2mgmt_flashdl_write(wlandevice_t *wlandev, void *msgp);
 int prism2mgmt_autojoin(wlandevice_t *wlandev, void *msgp);

-/*---
+/*
 * conversion functions going between wlan message data types and
 * Prism2 data types
*/
+*/
 /* byte area conversion functions*/
 void prism2mgmt_bytearea2pstr(u8 *bytearea, p80211pstrd_t *pstr, int len);

--
1.7.10.4

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[PATCH v2 1/1] Staging: android: uapi: ion: Fixes indentation

2016-05-08 Thread Thimo Braker 
Fixes the indentation before variable names.

Signed-off-by: Thimo Braker 
---
 drivers/staging/android/uapi/ion.h  | 20 ++--
 drivers/staging/android/uapi/ion_test.h | 10 +-
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/android/uapi/ion.h 
b/drivers/staging/android/uapi/ion.h
index 0a8e40f..6dda8d5 100644
--- a/drivers/staging/android/uapi/ion.h
+++ b/drivers/staging/android/uapi/ion.h
@@ -91,11 +91,11 @@ enum ion_heap_type {
  * Provided by userspace as an argument to the ioctl
  */
 struct ion_allocation_data {
-   size_t len;
-   size_t align;
-   unsigned int heap_id_mask;
-   unsigned int flags;
-   ion_user_handle_t handle;
+   size_t  len;
+   size_t  align;
+   unsigned intheap_id_mask;
+   unsigned intflags;
+   ion_user_handle_t   handle;
 };
 
 /**
@@ -109,8 +109,8 @@ struct ion_allocation_data {
  * provides the file descriptor and the kernel returns the handle.
  */
 struct ion_fd_data {
-   ion_user_handle_t handle;
-   int fd;
+   ion_user_handle_t   handle;
+   int fd;
 };
 
 /**
@@ -118,7 +118,7 @@ struct ion_fd_data {
  * @handle:a handle
  */
 struct ion_handle_data {
-   ion_user_handle_t handle;
+   ion_user_handle_t   handle;
 };
 
 /**
@@ -130,8 +130,8 @@ struct ion_handle_data {
  * This works just like the regular cmd and arg fields of an ioctl.
  */
 struct ion_custom_data {
-   unsigned int cmd;
-   unsigned long arg;
+   unsigned intcmd;
+   unsigned long   arg;
 };
 
 #define ION_IOC_MAGIC  'I'
diff --git a/drivers/staging/android/uapi/ion_test.h 
b/drivers/staging/android/uapi/ion_test.h
index ffef06f..0d5a496 100644
--- a/drivers/staging/android/uapi/ion_test.h
+++ b/drivers/staging/android/uapi/ion_test.h
@@ -28,11 +28,11 @@
  * @write: 1 to write, 0 to read
  */
 struct ion_test_rw_data {
-   __u64 ptr;
-   __u64 offset;
-   __u64 size;
-   int write;
-   int __padding;
+   __u64   ptr;
+   __u64   offset;
+   __u64   size;
+   int write;
+   int __padding;
 };
 
 #define ION_IOC_MAGIC  'I'
-- 
2.1.4

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Re: [PATCH 1/2] Staging: android: ion: fixes use of typedef

2016-05-08 Thread Thimo Braker 

On 8-5-2016 4:46, Greg KH wrote:

You just broke userspace :(
[..]
(hint, they have uapi in the path)
I see I need to get used to some names ( now you say it, Uapi is quite 
logical ).

Thanks for the feedback.

Thimo B.
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Re: [PATCH 0/6] Intel Secure Guard Extensions

2016-05-08 Thread Dr. Greg Wettstein 
Hi, I hope the weekend is going well for everyone.

On Fri, May 06, 2016 at 02:39:44PM +0300, Jarkko Sakkinen wrote:
> On Tue, May 03, 2016 at 04:06:27AM -0500, Dr. Greg Wettstein wrote:
> > It would be helpful and instructive for anyone involved in this debate
> > to review the following URL which details Intel's SGX licening
> > program:
> > 
> > https://software.intel.com/en-us/articles/intel-sgx-product-licensing

> I think it would be good to note that the licensing process is
> available only for Windows. For Linux you can only use debug
> enclaves at the moment. The default LE has "allow-all" policy for
> debug enclaves.

As others have noted, unfortunately, this renders the technology
largely useless on Linux, at least for anything beyond
experimentation.  That is somewhat strange given that one of the
primary intentions of the technology is to push applications into
untrusted cloud environments, particularly given the use of Linux in
the 'cloud'.  So I guess Azure is the only security beneficiary at
this time... :-)

I assume that Intel will be releasing a launch enclave with its
upcoming Linux SDK?

> > I think the only way forward to make all of this palatable is to
> > embrace something similar to what has been done with Secure Boot.  The
> > Root Enclave Key will need to be something which can be reconfigured
> > by the Platform Owner through BIOS/EFI.  That model would take Intel
> > off the hook from a security perspective and establish the notion of
> > platform trust to be a bilateral relationship between a service
> > provider and client.

> This concern has been raised many times now. Sadly this did not make
> into Skyle but in future we will have one shot MSRs (can be set only
> once per boot cycle) for defining your own root of trust.

It is encouraging to hear that Intel will be implementing one shot
MSR's for the identity modulus signature.  That would be consistent
with what we would advocate for.

This now means the security of SGX on 'unlocked' platforms, at least
from a trust perspective, will be dependent on using TXT so as to
provide a hardware root of trust on which to base the SGX trust model.
I was out walking with Izzy our Golden Retriever last night and as I
thought about the implicatioins of all this I think the solution, at
least as we would implement it, will tie together rather nicely.

I would assume that everyone is using signed Launch Control Policies
(LCP) as we are.  This means that TXT/tboot already has access to the
public key which is used for the LCP data file signature.  It would
seem logical to have tboot compute the signature on that public key
and program that signature into the module signature registers.  That
would tie the hardware root of trust to the SGX root of trust.

If that is undesirable the other alternative would be to pass a custom
LCP policy element into tboot which would define the desired SGX
trust signature.

It is unfortunate that SGX took the path it did on Linux.  We actually
have application for the technology now in our security supervisor.

When you say that unlocked SGX did not make it into Skylake does this
mean we need to wait for a new micro-architecture or a die shrink?
Given that tick/tock is now expanding in time it would be useful to
have unlocked SGX be one of the extension features of Skylake.
Otherwise there is certainly no rush for the Linux driver... :-)

> /Jarkko

Have a good week.

Greg

As always,
Dr. G.W. Wettstein, Ph.D.   Enjellic Systems Development, LLC.
4206 N. 19th Ave.   Specializing in information infra-structure
Fargo, ND  58102development.
PH: 701-281-1686
FAX: 701-281-3949   EMAIL: g...@enjellic.com
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