Re: [PATCH] staging: android: uapi: drop definitions of removed ION_IOC_{FREE,SHARE} ioctls

[Laura Abbott]

On 05/30/2017 07:11 AM, Gleb Fotengauer-Malinovskiy wrote:
> This problem was found by strace ioctl list generator.
> 
> Fixes: 15c6098cfec5 ("staging: android: ion: Remove ion_handle and 
> ion_client")
> Signed-off-by: Gleb Fotengauer-Malinovskiy 
> ---
>  drivers/staging/android/uapi/ion.h | 18 --
>  1 file changed, 18 deletions(-)
> 
> diff --git a/drivers/staging/android/uapi/ion.h 
> b/drivers/staging/android/uapi/ion.h
> index b76db1b..a291b12 100644
> --- a/drivers/staging/android/uapi/ion.h
> +++ b/drivers/staging/android/uapi/ion.h
> @@ -131,24 +131,6 @@ struct ion_heap_query {
> struct ion_allocation_data)
>  
>  /**
> - * DOC: ION_IOC_FREE - free memory
> - *
> - * Takes an ion_handle_data struct and frees the handle.
> - */
> -#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
> -
> -/**
> - * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an 
> allocation
> - *
> - * Takes an ion_fd_data struct with the handle field populated with a valid
> - * opaque handle.  Returns the struct with the fd field set to a file
> - * descriptor open in the current address space.  This file descriptor
> - * can then be passed to another process.  The corresponding opaque handle 
> can
> - * be retrieved via ION_IOC_IMPORT.
> - */
> -#define ION_IOC_SHARE_IOWR(ION_IOC_MAGIC, 4, struct 
> ion_fd_data)
> -
> -/**
>   * DOC: ION_IOC_HEAP_QUERY - information about available heaps
>   *
>   * Takes an ion_heap_query structure and populates information about
> 

Acked-by: Laura Abbott 
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Re: [PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB flush

[Stephen Hemminger]

On Tue, 30 May 2017 19:17:46 +
Jork Loeser  wrote:

> > -Original Message-
> > From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> > Sent: Tuesday, May 30, 2017 09:53
> > To: Vitaly Kuznetsov 
> > Cc: x...@kernel.org; de...@linuxdriverproject.org; linux-
> > ker...@vger.kernel.org; KY Srinivasan ; Haiyang Zhang
> > ; Stephen Hemminger ;
> > Thomas Gleixner ; Ingo Molnar ; H.
> > Peter Anvin ; Steven Rostedt ; Jork
> > Loeser ; Simon Xiao ;
> > Andy Lutomirski 
> > Subject: Re: [PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB 
> > flush
> > 
> > On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov 
> > wrote:  
> > > +#define HV_FLUSH_ALL_PROCESSORS0x0001
> > > +#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES0x0002
> > > +#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY  0x0004
> > > +#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT 0x0008  
> > 
> > BIT() ?  
> 
> Certainly a matter of taste. Given that the Hyper-V spec lists these as hex 
> numbers, I find the explicit numbers appropriate.
> 
> Regards,
> Jork

Keep the hex numbers, it makes more sense not to change it since rest of 
arch/x86/hyperv
uses hex values.
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Re: [PATCH-v2 0/5] Hyper-V vPCI: use vPCI protocol version 1.2

[Bjorn Helgaas]

On Wed, May 24, 2017 at 01:41:23PM -0700, Jork Loeser wrote:
> From: Jork Loeser 
> 
> Update the Hyper-V vPCI driver to use the Server-2016 version of the vPCI
> protocol, fixing MSI creation and retargeting issues.
> 
> Changes since v1:
> - reduced spew in protocol negotiation (Dan Carpenter)
> - work-around work racing Hyper-V patch (Stephen Hemminger)
> - formatting (Dan)
> 
> Jork Loeser (5):
>   Hyper-V vPCI: Minor format and semantic fix
>   Hyper-V vPCI: Use page allocation for hbus structure
>   PCI-HyperV vPCI: Temporary own CPU-number-to-vCPU-number infra
>   Hyper-V vPCI: Add vPCI version protocol negotiation
>   Hyper-V vPCI: use vPCI protocol version 1.2
> 
>  arch/x86/include/uapi/asm/hyperv.h |   6 +
>  drivers/pci/host/pci-hyperv.c  | 445 
> ++---
>  2 files changed, 370 insertions(+), 81 deletions(-)

Applied with K.Y.'s ack to pci/host-hv for v4.13, thanks!
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RE: [PATCH-v2 0/5] Hyper-V vPCI: use vPCI protocol version 1.2

[KY Srinivasan]

> -Original Message-
> From: devel [mailto:driverdev-devel-boun...@linuxdriverproject.org] On
> Behalf Of Bjorn Helgaas
> Sent: Tuesday, May 30, 2017 12:45 PM
> To: Jork Loeser 
> Cc: o...@aepfle.de; Stephen Hemminger ;
> linux-...@vger.kernel.org; jasow...@redhat.com; linux-
> ker...@vger.kernel.org; marcelo.ce...@canonical.com; a...@canonical.com;
> de...@linuxdriverproject.org; vkuzn...@redhat.com;
> leann.ogasaw...@canonical.com
> Subject: Re: [PATCH-v2 0/5] Hyper-V vPCI: use vPCI protocol version 1.2
> 
> On Wed, May 24, 2017 at 01:41:23PM -0700, Jork Loeser wrote:
> > From: Jork Loeser 
> >
> > Update the Hyper-V vPCI driver to use the Server-2016 version of the vPCI
> > protocol, fixing MSI creation and retargeting issues.
> >
> > Changes since v1:
> > - reduced spew in protocol negotiation (Dan Carpenter)
> > - work-around work racing Hyper-V patch (Stephen Hemminger)
> > - formatting (Dan)
> >
> > Jork Loeser (5):
> >   Hyper-V vPCI: Minor format and semantic fix
> >   Hyper-V vPCI: Use page allocation for hbus structure
> >   PCI-HyperV vPCI: Temporary own CPU-number-to-vCPU-number infra
> >   Hyper-V vPCI: Add vPCI version protocol negotiation
> >   Hyper-V vPCI: use vPCI protocol version 1.2
> >
> >  arch/x86/include/uapi/asm/hyperv.h |   6 +
> >  drivers/pci/host/pci-hyperv.c  | 445
> ++---
> >  2 files changed, 370 insertions(+), 81 deletions(-)
> 
> Waiting for a maintainer ack:

Reviewed-by: K. Y. Srinivasan 

Acked-by: K. Y. Srinivasan 
> 
>   Hyper-V CORE AND DRIVERS
>   M:  "K. Y. Srinivasan" 
>   M:  Haiyang Zhang 
>   M:  Stephen Hemminger 
>   ...
>   F:  drivers/pci/host/pci-hyperv.c
> ___
> devel mailing list
> de...@linuxdriverproject.org
> https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdriverd
> ev.linuxdriverproject.org%2Fmailman%2Flistinfo%2Fdriverdev-
> devel=02%7C01%7Ckys%40microsoft.com%7C08ff2147e87e4b9957090
> 8d4a794658f%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C6363177
> 03190907906=ET7UEDnBub1iNEOAb509JrjEZxKZjyhmLSubVzYZtic%3D
> =0
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Re: [PATCH V2 00/27] Drivers: ccree - align block comments

[Tobin C. Harding]

On Tue, May 30, 2017 at 08:49:41AM +0200, Antoine Tenart wrote:
> Hello Derek,
> 
> On Tue, May 30, 2017 at 06:09:37PM +1200, Derek Robson wrote:
> > Fixed block comments across whole ccree driver
> 
> Since all these commits are doing the same logical change across a
> single driver, you could probably squash them all into a single one.

I suggested that when v1 was submitted ;)

> 
> Thanks!
> Antoine

thanks,
Tobin.
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Re: [PATCH-v2 0/5] Hyper-V vPCI: use vPCI protocol version 1.2

[Bjorn Helgaas]

On Wed, May 24, 2017 at 01:41:23PM -0700, Jork Loeser wrote:
> From: Jork Loeser 
> 
> Update the Hyper-V vPCI driver to use the Server-2016 version of the vPCI
> protocol, fixing MSI creation and retargeting issues.
> 
> Changes since v1:
> - reduced spew in protocol negotiation (Dan Carpenter)
> - work-around work racing Hyper-V patch (Stephen Hemminger)
> - formatting (Dan)
> 
> Jork Loeser (5):
>   Hyper-V vPCI: Minor format and semantic fix
>   Hyper-V vPCI: Use page allocation for hbus structure
>   PCI-HyperV vPCI: Temporary own CPU-number-to-vCPU-number infra
>   Hyper-V vPCI: Add vPCI version protocol negotiation
>   Hyper-V vPCI: use vPCI protocol version 1.2
> 
>  arch/x86/include/uapi/asm/hyperv.h |   6 +
>  drivers/pci/host/pci-hyperv.c  | 445 
> ++---
>  2 files changed, 370 insertions(+), 81 deletions(-)

Waiting for a maintainer ack:

  Hyper-V CORE AND DRIVERS
  M:  "K. Y. Srinivasan" 
  M:  Haiyang Zhang 
  M:  Stephen Hemminger 
  ...
  F:  drivers/pci/host/pci-hyperv.c
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Re: [PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB flush

[Andy Shevchenko]

On Tue, May 30, 2017 at 10:17 PM, Jork Loeser  wrote:

>> > +#define HV_FLUSH_ALL_PROCESSORS0x0001
>> > +#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES0x0002
>> > +#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY  0x0004
>> > +#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT 0x0008
>>
>> BIT() ?
>
> Certainly a matter of taste.

That's why ? is used, though slightly better to parse the BIT macros
which is also less error prone.

> Given that the Hyper-V spec lists these as hex numbers, I find the explicit 
> numbers appropriate.

Yes, but since it introduces a full set of the flags I would not see
disadvantages by style.

-- 
With Best Regards,
Andy Shevchenko
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RE: [PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB flush

[Jork Loeser]

> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Tuesday, May 30, 2017 09:53
> To: Vitaly Kuznetsov 
> Cc: x...@kernel.org; de...@linuxdriverproject.org; linux-
> ker...@vger.kernel.org; KY Srinivasan ; Haiyang Zhang
> ; Stephen Hemminger ;
> Thomas Gleixner ; Ingo Molnar ; H.
> Peter Anvin ; Steven Rostedt ; Jork
> Loeser ; Simon Xiao ;
> Andy Lutomirski 
> Subject: Re: [PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB flush
> 
> On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov 
> wrote:
> > +#define HV_FLUSH_ALL_PROCESSORS0x0001
> > +#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES0x0002
> > +#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY  0x0004
> > +#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT 0x0008
> 
> BIT() ?

Certainly a matter of taste. Given that the Hyper-V spec lists these as hex 
numbers, I find the explicit numbers appropriate.

Regards,
Jork

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RE: [PATCH v5 09/10] x86/hyper-v: support extended CPU ranges for TLB flush hypercalls

[Jork Loeser]

> -Original Message-
> From: Vitaly Kuznetsov [mailto:vkuzn...@redhat.com]
> Sent: Tuesday, May 30, 2017 04:34
> To: x...@kernel.org; de...@linuxdriverproject.org
> Cc: linux-ker...@vger.kernel.org; KY Srinivasan ; Haiyang
> Zhang ; Stephen Hemminger
> ; Thomas Gleixner ; Ingo
> Molnar ; H. Peter Anvin ; Steven
> Rostedt ; Jork Loeser ;
> Simon Xiao ; Andy Lutomirski ; Andy
> Shevchenko 
> Subject: [PATCH v5 09/10] x86/hyper-v: support extended CPU ranges for TLB
> flush hypercalls
> 
> Hyper-V hosts may support more than 64 vCPUs, we need to use
> HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX/LIST_EX hypercalls in this case.


> +static inline int cpumask_to_vp_set(struct hv_flush_pcpu_ex *flush,
> + const struct cpumask *cpus)
> +{
> + int cpu, vcpu, vcpu_bank, vcpu_offset, cur_bank, nr_bank = 0;
> + bool has_cpus;
> +
> + /*
> +  * We can't be sure that translated vCPU numbers will always be
> +  * in ascending order, so iterate over all possible banks and
> +  * check all vCPUs in it instead.
> +  */
> + for (cur_bank = 0; cur_bank < ms_hyperv.max_vp_index/64;
> cur_bank++) {
> + has_cpus = false;
> + for_each_cpu(cpu, cpus) {
> + vcpu = hv_cpu_number_to_vp_number(cpu);
> + vcpu_bank = vcpu / 64;
> + vcpu_offset = vcpu % 64;
> +
> + if (vcpu_bank != cur_bank)
> + continue;
> + __set_bit(vcpu_offset, (unsigned long *)
> +   >hv_vp_set.bank_contents[nr_bank]);
> + if (!has_cpus) {
> + __set_bit(vcpu_bank, (unsigned long *)
> +   >hv_vp_set.valid_bank_mask);
> + has_cpus = true;
> + }
> + }
> + if (has_cpus)
> + nr_bank++;
> + }
> +
> + return nr_bank;
> +}

Note that the HV_VP_SET may contain empty banks. As such, consider enabling all 
(5) bits in the valid_bank_mask, and a single for_each(cpu, cpus) pass - 
setting the bits as per hv_cpu_number_to_vp_number(cpu).

Regards,
Jork

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[PATCH v2 net-next 1/1] netvsc: Add #include's for csum_* function declarations

[mikelley]

From: Michael Kelley 

Add direct #include statements for declarations of csum_tcpudp_magic()
and csum_ipv6_magic().  While the needed #include's are picked up
indirectly for the x86 architecture, they aren't on other
architectures, resulting in compile errors.

Signed-off-by: Michael Kelley 
---
 drivers/net/hyperv/netvsc_drv.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index 4421a6d..2564ac8 100644
--- a/drivers/net/hyperv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -37,6 +37,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "hyperv_net.h"
 
-- 
1.7.1

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[PATCH 7/7] vmbus: remove unused vmbus_sendpacket_multipagebuffer

[Stephen Hemminger]

This function is not used anywhere in current code.

Signed-off-by: Stephen Hemminger 
---
 drivers/hv/channel.c   | 56 --
 include/linux/hyperv.h |  6 --
 2 files changed, 62 deletions(-)

diff --git a/drivers/hv/channel.c b/drivers/hv/channel.c
index e9bf0bb87ac4..61ac5ccc0cd6 100644
--- a/drivers/hv/channel.c
+++ b/drivers/hv/channel.c
@@ -812,62 +812,6 @@ int vmbus_sendpacket_mpb_desc(struct vmbus_channel 
*channel,
 }
 EXPORT_SYMBOL_GPL(vmbus_sendpacket_mpb_desc);
 
-/*
- * vmbus_sendpacket_multipagebuffer - Send a multi-page buffer packet
- * using a GPADL Direct packet type.
- */
-int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel,
-   struct hv_multipage_buffer *multi_pagebuffer,
-   void *buffer, u32 bufferlen, u64 requestid)
-{
-   struct vmbus_channel_packet_multipage_buffer desc;
-   u32 descsize;
-   u32 packetlen;
-   u32 packetlen_aligned;
-   struct kvec bufferlist[3];
-   u64 aligned_data = 0;
-   u32 pfncount = NUM_PAGES_SPANNED(multi_pagebuffer->offset,
-multi_pagebuffer->len);
-
-   if (pfncount > MAX_MULTIPAGE_BUFFER_COUNT)
-   return -EINVAL;
-
-   /*
-* Adjust the size down since vmbus_channel_packet_multipage_buffer is
-* the largest size we support
-*/
-   descsize = sizeof(struct vmbus_channel_packet_multipage_buffer) -
- ((MAX_MULTIPAGE_BUFFER_COUNT - pfncount) *
- sizeof(u64));
-   packetlen = descsize + bufferlen;
-   packetlen_aligned = ALIGN(packetlen, sizeof(u64));
-
-
-   /* Setup the descriptor */
-   desc.type = VM_PKT_DATA_USING_GPA_DIRECT;
-   desc.flags = VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED;
-   desc.dataoffset8 = descsize >> 3; /* in 8-bytes granularity */
-   desc.length8 = (u16)(packetlen_aligned >> 3);
-   desc.transactionid = requestid;
-   desc.rangecount = 1;
-
-   desc.range.len = multi_pagebuffer->len;
-   desc.range.offset = multi_pagebuffer->offset;
-
-   memcpy(desc.range.pfn_array, multi_pagebuffer->pfn_array,
-  pfncount * sizeof(u64));
-
-   bufferlist[0].iov_base = 
-   bufferlist[0].iov_len = descsize;
-   bufferlist[1].iov_base = buffer;
-   bufferlist[1].iov_len = bufferlen;
-   bufferlist[2].iov_base = _data;
-   bufferlist[2].iov_len = (packetlen_aligned - packetlen);
-
-   return hv_ringbuffer_write(channel, bufferlist, 3);
-}
-EXPORT_SYMBOL_GPL(vmbus_sendpacket_multipagebuffer);
-
 /**
  * vmbus_recvpacket() - Retrieve the user packet on the specified channel
  * @channel: Pointer to vmbus_channel structure.
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 951db4ab89f3..5d32b7052aae 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -1037,12 +1037,6 @@ extern int vmbus_sendpacket_pagebuffer_ctl(struct 
vmbus_channel *channel,
   u64 requestid,
   u32 flags);
 
-extern int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel,
-   struct hv_multipage_buffer *mpb,
-   void *buffer,
-   u32 bufferlen,
-   u64 requestid);
-
 extern int vmbus_sendpacket_mpb_desc(struct vmbus_channel *channel,
 struct vmbus_packet_mpb_array *mpb,
 u32 desc_size,
-- 
2.11.0

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[PATCH 0/7] vmbus: cleanups and optimizations

[Stephen Hemminger]

This removes unused bits from vmbus internals, and also does some
optimization to the host signalling part of ring buffer logic.

Stephen Hemminger (7):
  vmbus: simplify hv_ringbuffer_read
  vmbus: drop unused ring_buffer_info elements
  vmbus: refactor hv_signal_on_read
  vmbus: eliminate duplicate cached index
  vmbus: more host signalling avoidance
  vmbus: add prefetch to ring buffer iterator
  vmbus: remove unused vmbus_sendpacket_multipagebuffer

 drivers/hv/channel.c |  56 
 drivers/hv/ring_buffer.c | 169 +--
 include/linux/hyperv.h   |  71 
 3 files changed, 60 insertions(+), 236 deletions(-)

-- 
2.11.0

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[PATCH 4/7] vmbus: eliminate duplicate cached index

[Stephen Hemminger]

Don't need cached read index anymore now that packet iterator
is used. The iterator has the original read index until the
visible read_inde is updated.

Signed-off-by: Stephen Hemminger 
---
 drivers/hv/ring_buffer.c | 17 -
 include/linux/hyperv.h   | 14 --
 2 files changed, 4 insertions(+), 27 deletions(-)

diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index a9021f13379f..b0f79526b86a 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -358,9 +358,6 @@ struct vmpacket_descriptor *hv_pkt_iter_first(struct 
vmbus_channel *channel)
 {
struct hv_ring_buffer_info *rbi = >inbound;
 
-   /* set state for later hv_pkt_iter_close */
-   rbi->cached_read_index = rbi->ring_buffer->read_index;
-
if (hv_pkt_iter_avail(rbi) < sizeof(struct vmpacket_descriptor))
return NULL;
 
@@ -388,10 +385,7 @@ __hv_pkt_iter_next(struct vmbus_channel *channel,
rbi->priv_read_index -= dsize;
 
/* more data? */
-   if (hv_pkt_iter_avail(rbi) < sizeof(struct vmpacket_descriptor))
-   return NULL;
-   else
-   return hv_get_ring_buffer(rbi) + rbi->priv_read_index;
+   return hv_pkt_iter_first(channel);
 }
 EXPORT_SYMBOL_GPL(__hv_pkt_iter_next);
 
@@ -401,7 +395,7 @@ EXPORT_SYMBOL_GPL(__hv_pkt_iter_next);
 void hv_pkt_iter_close(struct vmbus_channel *channel)
 {
struct hv_ring_buffer_info *rbi = >inbound;
-   u32 cur_write_sz, cached_write_sz;
+   u32 orig_write_sz = hv_get_bytes_to_write(rbi);
u32 pending_sz;
 
/*
@@ -430,13 +424,10 @@ void hv_pkt_iter_close(struct vmbus_channel *channel)
if (pending_sz == 0)
return;
 
-   cur_write_sz = hv_get_bytes_to_write(rbi);
-
-   if (cur_write_sz < pending_sz)
+   if (hv_get_bytes_to_write(rbi) < pending_sz)
return;
 
-   cached_write_sz = hv_get_cached_bytes_to_write(rbi);
-   if (cached_write_sz < pending_sz)
+   if (orig_write_sz < pending_sz)
vmbus_setevent(channel);
 }
 EXPORT_SYMBOL_GPL(hv_pkt_iter_close);
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 4dd2ceb57b56..951db4ab89f3 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -125,7 +125,6 @@ struct hv_ring_buffer_info {
 
u32 ring_datasize;  /* < ring_size */
u32 priv_read_index;
-   u32 cached_read_index;
 };
 
 /*
@@ -178,19 +177,6 @@ static inline u32 hv_get_bytes_to_write(const struct 
hv_ring_buffer_info *rbi)
return write;
 }
 
-static inline u32 hv_get_cached_bytes_to_write(
-   const struct hv_ring_buffer_info *rbi)
-{
-   u32 read_loc, write_loc, dsize, write;
-
-   dsize = rbi->ring_datasize;
-   read_loc = rbi->cached_read_index;
-   write_loc = rbi->ring_buffer->write_index;
-
-   write = write_loc >= read_loc ? dsize - (write_loc - read_loc) :
-   read_loc - write_loc;
-   return write;
-}
 /*
  * VMBUS version is 32 bit entity broken up into
  * two 16 bit quantities: major_number. minor_number.
-- 
2.11.0

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[PATCH 3/7] vmbus: refactor hv_signal_on_read

[Stephen Hemminger]

The function hv_signal_on_read was defined in hyperv.h and
only used in one place in ring_buffer code. Clearer to just move it inline 
there.

Signed-off-by: Stephen Hemminger 
---
 drivers/hv/ring_buffer.c | 32 +--
 include/linux/hyperv.h   | 49 
 2 files changed, 30 insertions(+), 51 deletions(-)

diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index f29981764653..a9021f13379f 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "hyperv_vmbus.h"
 
@@ -357,7 +358,7 @@ struct vmpacket_descriptor *hv_pkt_iter_first(struct 
vmbus_channel *channel)
 {
struct hv_ring_buffer_info *rbi = >inbound;
 
-   /* set state for later hv_signal_on_read() */
+   /* set state for later hv_pkt_iter_close */
rbi->cached_read_index = rbi->ring_buffer->read_index;
 
if (hv_pkt_iter_avail(rbi) < sizeof(struct vmpacket_descriptor))
@@ -400,6 +401,8 @@ EXPORT_SYMBOL_GPL(__hv_pkt_iter_next);
 void hv_pkt_iter_close(struct vmbus_channel *channel)
 {
struct hv_ring_buffer_info *rbi = >inbound;
+   u32 cur_write_sz, cached_write_sz;
+   u32 pending_sz;
 
/*
 * Make sure all reads are done before we update the read index since
@@ -409,6 +412,31 @@ void hv_pkt_iter_close(struct vmbus_channel *channel)
virt_rmb();
rbi->ring_buffer->read_index = rbi->priv_read_index;
 
-   hv_signal_on_read(channel);
+   /*
+* Issue a full memory barrier before making the signaling decision.
+* Here is the reason for having this barrier:
+* If the reading of the pend_sz (in this function)
+* were to be reordered and read before we commit the new read
+* index (in the calling function)  we could
+* have a problem. If the host were to set the pending_sz after we
+* have sampled pending_sz and go to sleep before we commit the
+* read index, we could miss sending the interrupt. Issue a full
+* memory barrier to address this.
+*/
+   virt_mb();
+
+   pending_sz = READ_ONCE(rbi->ring_buffer->pending_send_sz);
+   /* If the other end is not blocked on write don't bother. */
+   if (pending_sz == 0)
+   return;
+
+   cur_write_sz = hv_get_bytes_to_write(rbi);
+
+   if (cur_write_sz < pending_sz)
+   return;
+
+   cached_write_sz = hv_get_cached_bytes_to_write(rbi);
+   if (cached_write_sz < pending_sz)
+   vmbus_setevent(channel);
 }
 EXPORT_SYMBOL_GPL(hv_pkt_iter_close);
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 10e690e787b0..4dd2ceb57b56 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -1473,55 +1473,6 @@ hv_get_ring_buffer(const struct hv_ring_buffer_info 
*ring_info)
 }
 
 /*
- * To optimize the flow management on the send-side,
- * when the sender is blocked because of lack of
- * sufficient space in the ring buffer, potential the
- * consumer of the ring buffer can signal the producer.
- * This is controlled by the following parameters:
- *
- * 1. pending_send_sz: This is the size in bytes that the
- *producer is trying to send.
- * 2. The feature bit feat_pending_send_sz set to indicate if
- *the consumer of the ring will signal when the ring
- *state transitions from being full to a state where
- *there is room for the producer to send the pending packet.
- */
-
-static inline  void hv_signal_on_read(struct vmbus_channel *channel)
-{
-   u32 cur_write_sz, cached_write_sz;
-   u32 pending_sz;
-   struct hv_ring_buffer_info *rbi = >inbound;
-
-   /*
-* Issue a full memory barrier before making the signaling decision.
-* Here is the reason for having this barrier:
-* If the reading of the pend_sz (in this function)
-* were to be reordered and read before we commit the new read
-* index (in the calling function)  we could
-* have a problem. If the host were to set the pending_sz after we
-* have sampled pending_sz and go to sleep before we commit the
-* read index, we could miss sending the interrupt. Issue a full
-* memory barrier to address this.
-*/
-   virt_mb();
-
-   pending_sz = READ_ONCE(rbi->ring_buffer->pending_send_sz);
-   /* If the other end is not blocked on write don't bother. */
-   if (pending_sz == 0)
-   return;
-
-   cur_write_sz = hv_get_bytes_to_write(rbi);
-
-   if (cur_write_sz < pending_sz)
-   return;
-
-   cached_write_sz = hv_get_cached_bytes_to_write(rbi);
-   if (cached_write_sz < pending_sz)
-   vmbus_setevent(channel);
-}
-
-/*
  * Mask off host interrupt callback notifications
  */
 static inline void hv_begin_read(struct hv_ring_buffer_info *rbi)
-- 
2.11.0

[PATCH 6/7] vmbus: add prefetch to ring buffer iterator

[Stephen Hemminger]

When iterating over incoming ring elements from the host, prefetch
the next descriptor so that it is cache hot.

Signed-off-by: Stephen Hemminger 
---
 drivers/hv/ring_buffer.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index 741daa6e2fc7..12eb8caa4263 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -357,11 +357,16 @@ static u32 hv_pkt_iter_avail(const struct 
hv_ring_buffer_info *rbi)
 struct vmpacket_descriptor *hv_pkt_iter_first(struct vmbus_channel *channel)
 {
struct hv_ring_buffer_info *rbi = >inbound;
+   struct vmpacket_descriptor *desc;
 
if (hv_pkt_iter_avail(rbi) < sizeof(struct vmpacket_descriptor))
return NULL;
 
-   return hv_get_ring_buffer(rbi) + rbi->priv_read_index;
+   desc = hv_get_ring_buffer(rbi) + rbi->priv_read_index;
+   if (desc)
+   prefetch((char *)desc + (desc->len8 << 3));
+
+   return desc;
 }
 EXPORT_SYMBOL_GPL(hv_pkt_iter_first);
 
-- 
2.11.0

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[PATCH 5/7] vmbus: more host signalling avoidance

[Stephen Hemminger]

Don't signal host if it has disabled interrupts for that
ring buffer. Check the feature bit to see if host supports
pending send size flag.

Signed-off-by: Stephen Hemminger 
---
 drivers/hv/ring_buffer.c | 27 +++
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index b0f79526b86a..741daa6e2fc7 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -396,7 +396,6 @@ void hv_pkt_iter_close(struct vmbus_channel *channel)
 {
struct hv_ring_buffer_info *rbi = >inbound;
u32 orig_write_sz = hv_get_bytes_to_write(rbi);
-   u32 pending_sz;
 
/*
 * Make sure all reads are done before we update the read index since
@@ -419,15 +418,27 @@ void hv_pkt_iter_close(struct vmbus_channel *channel)
 */
virt_mb();
 
-   pending_sz = READ_ONCE(rbi->ring_buffer->pending_send_sz);
-   /* If the other end is not blocked on write don't bother. */
-   if (pending_sz == 0)
+   /* If host has disabled notifications then skip */
+   if (rbi->ring_buffer->interrupt_mask)
return;
 
-   if (hv_get_bytes_to_write(rbi) < pending_sz)
-   return;
+   if (rbi->ring_buffer->feature_bits.feat_pending_send_sz) {
+   u32 pending_sz = READ_ONCE(rbi->ring_buffer->pending_send_sz);
 
-   if (orig_write_sz < pending_sz)
-   vmbus_setevent(channel);
+   /*
+* If there was space before we began iteration,
+* then host was not blocked. Also handles case where
+* pending_sz is zero then host has nothing pending
+* and does not need to be signaled.
+*/
+   if (orig_write_sz > pending_sz)
+   return;
+
+   /* If pending write will not fit, don't give false hope. */
+   if (hv_get_bytes_to_write(rbi) < pending_sz)
+   return;
+   }
+
+   vmbus_setevent(channel);
 }
 EXPORT_SYMBOL_GPL(hv_pkt_iter_close);
-- 
2.11.0

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[PATCH 1/7] vmbus: simplify hv_ringbuffer_read

[Stephen Hemminger]

With new iterator functions (and the double mapping) the ring buffer
read function can be greatly simplified.

Signed-off-by: Stephen Hemminger 
---
 drivers/hv/ring_buffer.c | 118 +++
 1 file changed, 17 insertions(+), 101 deletions(-)

diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index 1f450c39a9b0..f29981764653 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -94,30 +94,6 @@ hv_set_next_write_location(struct hv_ring_buffer_info 
*ring_info,
ring_info->ring_buffer->write_index = next_write_location;
 }
 
-/* Get the next read location for the specified ring buffer. */
-static inline u32
-hv_get_next_read_location(const struct hv_ring_buffer_info *ring_info)
-{
-   return ring_info->ring_buffer->read_index;
-}
-
-/*
- * Get the next read location + offset for the specified ring buffer.
- * This allows the caller to skip.
- */
-static inline u32
-hv_get_next_readlocation_withoffset(const struct hv_ring_buffer_info 
*ring_info,
-   u32 offset)
-{
-   u32 next = ring_info->ring_buffer->read_index;
-
-   next += offset;
-   if (next >= ring_info->ring_datasize)
-   next -= ring_info->ring_datasize;
-
-   return next;
-}
-
 /* Set the next read location for the specified ring buffer. */
 static inline void
 hv_set_next_read_location(struct hv_ring_buffer_info *ring_info,
@@ -142,29 +118,6 @@ hv_get_ring_bufferindices(struct hv_ring_buffer_info 
*ring_info)
 }
 
 /*
- * Helper routine to copy to source from ring buffer.
- * Assume there is enough room. Handles wrap-around in src case only!!
- */
-static u32 hv_copyfrom_ringbuffer(
-   const struct hv_ring_buffer_info *ring_info,
-   void*dest,
-   u32 destlen,
-   u32 start_read_offset)
-{
-   void *ring_buffer = hv_get_ring_buffer(ring_info);
-   u32 ring_buffer_size = hv_get_ring_buffersize(ring_info);
-
-   memcpy(dest, ring_buffer + start_read_offset, destlen);
-
-   start_read_offset += destlen;
-   if (start_read_offset >= ring_buffer_size)
-   start_read_offset -= ring_buffer_size;
-
-   return start_read_offset;
-}
-
-
-/*
  * Helper routine to copy from source to ring buffer.
  * Assume there is enough room. Handles wrap-around in dest case only!!
  */
@@ -334,33 +287,22 @@ int hv_ringbuffer_write(struct vmbus_channel *channel,
return 0;
 }
 
-static inline void
-init_cached_read_index(struct hv_ring_buffer_info *rbi)
-{
-   rbi->cached_read_index = rbi->ring_buffer->read_index;
-}
-
 int hv_ringbuffer_read(struct vmbus_channel *channel,
   void *buffer, u32 buflen, u32 *buffer_actual_len,
   u64 *requestid, bool raw)
 {
-   u32 bytes_avail_toread;
-   u32 next_read_location;
-   u64 prev_indices = 0;
-   struct vmpacket_descriptor desc;
-   u32 offset;
-   u32 packetlen;
-   struct hv_ring_buffer_info *inring_info = >inbound;
-
-   if (buflen <= 0)
+   struct vmpacket_descriptor *desc;
+   u32 packetlen, offset;
+
+   if (unlikely(buflen == 0))
return -EINVAL;
 
*buffer_actual_len = 0;
*requestid = 0;
 
-   bytes_avail_toread = hv_get_bytes_to_read(inring_info);
/* Make sure there is something to read */
-   if (bytes_avail_toread < sizeof(desc)) {
+   desc = hv_pkt_iter_first(channel);
+   if (desc == NULL) {
/*
 * No error is set when there is even no header, drivers are
 * supposed to analyze buffer_actual_len.
@@ -368,48 +310,22 @@ int hv_ringbuffer_read(struct vmbus_channel *channel,
return 0;
}
 
-   init_cached_read_index(inring_info);
-
-   next_read_location = hv_get_next_read_location(inring_info);
-   next_read_location = hv_copyfrom_ringbuffer(inring_info, ,
-   sizeof(desc),
-   next_read_location);
-
-   offset = raw ? 0 : (desc.offset8 << 3);
-   packetlen = (desc.len8 << 3) - offset;
+   offset = raw ? 0 : (desc->offset8 << 3);
+   packetlen = (desc->len8 << 3) - offset;
*buffer_actual_len = packetlen;
-   *requestid = desc.trans_id;
-
-   if (bytes_avail_toread < packetlen + offset)
-   return -EAGAIN;
+   *requestid = desc->trans_id;
 
-   if (packetlen > buflen)
+   if (unlikely(packetlen > buflen))
return -ENOBUFS;
 
-   next_read_location =
-   hv_get_next_readlocation_withoffset(inring_info, offset);
+   /* since ring is double mapped, only one copy is necessary */
+   memcpy(buffer, (const char *)desc + offset, packetlen);
 
-   next_read_location = hv_copyfrom_ringbuffer(inring_info,
-  

[PATCH 2/7] vmbus: drop unused ring_buffer_info elements

[Stephen Hemminger]

The elements ring_data_start_offset and priv_write_index
are not used.

Signed-off-by: Stephen Hemminger 
---
 include/linux/hyperv.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index e09fc8290c2f..10e690e787b0 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -124,8 +124,6 @@ struct hv_ring_buffer_info {
spinlock_t ring_lock;
 
u32 ring_datasize;  /* < ring_size */
-   u32 ring_data_startoffset;
-   u32 priv_write_index;
u32 priv_read_index;
u32 cached_read_index;
 };
-- 
2.11.0

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Re: [PATCH net-next 1/1] netvsc: Add #include's for csum_* function declarations

[Joe Perches]

On Tue, 2017-05-30 at 10:43 -0700, Michael Kelley wrote:
> Add direct #include statements for declarations of csum_tcpudp_magic()
> and csum_ipv6_magic(). While the needed #include's are picked up
> indirectly for the x86 architecture, they aren't on other
> architectures, resulting in compile errors.
[]
> diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
> index 4421a6d..ca952b3 100644
> --- a/drivers/net/hyperv/netvsc_drv.c
> +++ b/drivers/net/hyperv/netvsc_drv.c
> @@ -37,6 +37,8 @@
>  #include 
>  #include 
>  #include 
> +#include 

Maybe
#include 
instead?

> +#include 
>  
>  #include "hyperv_net.h"
>  
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[PATCH net-next 1/1] netvsc: Add #include's for csum_* function declarations

[Michael Kelley]

Add direct #include statements for declarations of csum_tcpudp_magic()
and csum_ipv6_magic(). While the needed #include's are picked up
indirectly for the x86 architecture, they aren't on other
architectures, resulting in compile errors.

Signed-off-by: Michael Kelley 
---
 drivers/net/hyperv/netvsc_drv.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index 4421a6d..ca952b3 100644
--- a/drivers/net/hyperv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -37,6 +37,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "hyperv_net.h"
 
-- 
1.7.1

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Re: [PATCH v5 00/10] Hyper-V: praravirtualized remote TLB flushing and hypercall improvements

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:

> K. Y., while all the changes are not groundbreaking I still have to drop
> 'Tested-by' tags on affected patches. It would be great to have this
> series retested.
>
> Thomas, Ingo, Peter, would you like to take this through x86 tree or should
> we push it through Greg's char-misc tree?

What does MAINTAINERS tell about?

> Vitaly Kuznetsov (10):

I have found number of small issues, after addressing them, FWIW,
Reviewed-by: Andy Shevchenko 

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Andy Shevchenko
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Re: [PATCH v5 09/10] x86/hyper-v: support extended CPU ranges for TLB flush hypercalls

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> Hyper-V hosts may support more than 64 vCPUs, we need to use
> HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX/LIST_EX hypercalls in this
> case.

> +/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
> +struct hv_flush_pcpu_ex {
> +   __u64 address_space;
> +   __u64 flags;
> +   struct {
> +   __u64 format;
> +   __u64 valid_bank_mask;
> +   __u64 bank_contents[];
> +   } hv_vp_set;
> +   __u64 gva_list[];
> +};

Same question about use of uXX vs __uXX types.

> +static void hyperv_flush_tlb_others_ex(const struct cpumask *cpus,
> +  struct mm_struct *mm,
> +  unsigned long start,
> +  unsigned long end)
> +{
> +   struct hv_flush_pcpu_ex *flush;
> +   unsigned long cur, flags;
> +   u64 status = U64_MAX;
> +   int nr_bank = 0, max_gvas, gva_n;
> +
> +   if (!pcpu_flush_ex || !hv_hypercall_pg)
> +   goto do_native;
> +
> +   if (cpumask_empty(cpus))
> +   return;
> +
> +   local_irq_save(flags);
> +
> +   flush = this_cpu_ptr(pcpu_flush_ex);
> +
> +   if (mm) {
> +   flush->address_space = virt_to_phys(mm->pgd);

(u64), phys_addr_t is arch-dependent.

> +   flush->flags = 0;
> +   } else {
> +   flush->address_space = 0;
> +   flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
> +   }
> +
> +   flush->hv_vp_set.valid_bank_mask = 0;
> +
> +   if (cpumask_equal(cpus, cpu_present_mask)) {
> +   flush->hv_vp_set.format = HV_GENERIC_SET_ALL;
> +   flush->flags |= HV_FLUSH_ALL_PROCESSORS;
> +   } else {
> +   flush->hv_vp_set.format = HV_GENERIC_SET_SPARCE_4K;
> +   nr_bank = cpumask_to_vp_set(flush, cpus);
> +   }
> +
> +   /*
> +* We can flush not more than max_gvas with one hypercall. Flush the
> +* whole address space if we were asked to do more.
> +*/
> +   max_gvas = (PAGE_SIZE - sizeof(*flush) - nr_bank*8) / 8;
> +
> +   if (end == TLB_FLUSH_ALL) {
> +   flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
> +   status = hv_do_rep_hypercall(
> +   HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX,
> +   0, nr_bank + 2, flush, NULL);
> +   } else if (end && ((end - start)/HV_TLB_FLUSH_UNIT) > max_gvas) {
> +   status = hv_do_rep_hypercall(
> +   HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX,
> +   0, nr_bank + 2, flush, NULL);
> +   } else {
> +   cur = start;
> +   gva_n = nr_bank;
> +   do {
> +   flush->gva_list[gva_n] = cur & PAGE_MASK;
> +   /*
> +* Lower 12 bits encode the number of additional
> +* pages to flush (in addition to the 'cur' page).
> +*/
> +   if (end >= cur + HV_TLB_FLUSH_UNIT)
> +   flush->gva_list[gva_n] |= ~PAGE_MASK;
> +   else if (end > cur)
> +   flush->gva_list[gva_n] |=
> +   (end - cur - 1) >> PAGE_SHIFT;
> +
> +   cur += HV_TLB_FLUSH_UNIT;
> +   ++gva_n;

Same comments as per previous similar code.

Moreover, since it's similar, can it have some common code shared?

> +
> +   } while (cur < end);
> +
> +   status = hv_do_rep_hypercall(
> +   HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX,
> +   gva_n, nr_bank + 2, flush, NULL);
> +   }
> +
> +   local_irq_restore(flags);
> +

> +   if (!(status & 0x))

Magic.

-- 
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Andy Shevchenko
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Re: [PATCH v5 02/10] x86/hyper-v: stash the max number of virtual/logical processor

[Stephen Hemminger]

On Tue, 30 May 2017 13:34:16 +0200
Vitaly Kuznetsov  wrote:

> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index 04cb8d3..bdcc433 100644
> --- a/arch/x86/kernel/cpu/mshyperv.c
> +++ b/arch/x86/kernel/cpu/mshyperv.c
> @@ -175,9 +175,15 @@ static void __init ms_hyperv_init_platform(void)
>   ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
>   ms_hyperv.hints= cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
>  
> - pr_info("HyperV: features 0x%x, hints 0x%x\n",
> + pr_info("Hyper-V: features 0x%x, hints 0x%x\n",
>   ms_hyperv.features, ms_hyperv.hints);

>  
> + ms_hyperv.max_vp_index = cpuid_eax(HVCPUID_IMPLEMENTATION_LIMITS);
> + ms_hyperv.max_lp_index = cpuid_ebx(HVCPUID_IMPLEMENTATION_LIMITS);
> +
> + pr_info("Hyper-V: max %u virtual processors, %u logical processors\n",
> + ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
> +

I understand as developer why you may need to log stuff.
Do we really need more logging here? Why not pr_debug()?
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Re: [PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB flush

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> Hyper-V host can suggest us to use hypercall for doing remote TLB flush,
> this is supposed to work faster than IPIs.
>
> Implementation details: to do HvFlushVirtualAddress{Space,List} hypercalls
> we need to put the input somewhere in memory and we don't really want to
> have memory allocation on each call so we pre-allocate per cpu memory areas
> on boot. These areas are of fixes size, limit them with an arbitrary number
> of 16 (16 gvas are able to specify 16 * 4096 pages).
>
> pv_ops patching is happening very early so we need to separate
> hyperv_setup_mmu_ops() and hyper_alloc_mmu().
>
> It is possible and easy to implement local TLB flushing too and there is
> even a hint for that. However, I don't see a room for optimization on the
> host side as both hypercall and native tlb flush will result in vmexit. The
> hint is also not set on modern Hyper-V versions.

> @@ -0,0 +1,121 @@
> +#include 
> +#include 
> +#include 
> +#include 

Alphabetical order, please.

+ empty line

> +#include 
> +#include 
> +#include 
> +#include 

Can be alphabetically ordered?

> +/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
> +struct hv_flush_pcpu {
> +   __u64 address_space;
> +   __u64 flags;
> +   __u64 processor_mask;
> +   __u64 gva_list[];
> +};

I dunno what is the style there, but usually in Linux __uXX types are
used exclusively for User API.
Is it a case here? Can we use plain uXX types instead?

> +/* Each gva in gva_list encodes up to 4096 pages to flush */
> +#define HV_TLB_FLUSH_UNIT (PAGE_SIZE * PAGE_SIZE)

Regarding to the comment it would be rather
(4096 * PAGE_SIZE)

Yes, theoretically PAGE_SIZE can be not 4096.

> +static void hyperv_flush_tlb_others(const struct cpumask *cpus,
> +   struct mm_struct *mm, unsigned long start,
> +   unsigned long end)
> +{

> +   if (cpumask_equal(cpus, cpu_present_mask)) {
> +   flush->flags |= HV_FLUSH_ALL_PROCESSORS;
> +   } else {
> +   for_each_cpu(cpu, cpus) {
> +   vcpu = hv_cpu_number_to_vp_number(cpu);

> +   if (vcpu != -1 && vcpu < 64)

Just
if (vcpu < 64)
?

> +   __set_bit(vcpu, (unsigned long *)
> + >processor_mask);
> +   else
> +   goto do_native;
> +   }
> +   }

> +   if (end == TLB_FLUSH_ALL) {
> +   flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
> +   status = hv_do_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE,
> +flush, NULL);
> +   } else if (end && ((end - start)/HV_TLB_FLUSH_UNIT) > max_gvas) {
> +   status = hv_do_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE,
> +flush, NULL);

Yes! Looks much more cleaner.

> +   } else {
> +   cur = start;
> +   gva_n = 0;
> +   do {
> +   flush->gva_list[gva_n] = cur & PAGE_MASK;

> +   /*
> +* Lower 12 bits encode the number of additional
> +* pages to flush (in addition to the 'cur' page).
> +*/
> +   if (end >= cur + HV_TLB_FLUSH_UNIT)
> +   flush->gva_list[gva_n] |= ~PAGE_MASK;
> +   else if (end > cur)
> +   flush->gva_list[gva_n] |=
> +   (end - cur - 1) >> PAGE_SHIFT;

You can also simplify this slightly by introducing

unsigned long diff = end > cur ? end - cur : 0;

if (diff >= HV_TLB_FLUSH_UNIT)
flush->gva_list[gva_n] |= ~PAGE_MASK;
else if (diff)
flush->gva_list[gva_n] |= (diff - 1) >> PAGE_SHIFT;

> +
> +   cur += HV_TLB_FLUSH_UNIT;

> +   ++gva_n;

Make it post-increment. Better for reader (No need to pay an
additional attention why it's a pre-increment)

> +
> +   } while (cur < end);

> +   if (!(status & 0x))

Not first time I see this magic.

Perhaps

#define STATUS_BLA_BLA_MASK GENMASK(15,0)

if (!(status & STATUS_BLA_BLA_MASK))

in all appropriate places?

> +#define HV_FLUSH_ALL_PROCESSORS0x0001
> +#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES0x0002
> +#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY  0x0004
> +#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT 0x0008

BIT() ?

-- 
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Re: [PATCH v5 07/10] hyper-v: globalize vp_index

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> To support implementing remote TLB flushing on Hyper-V with a hypercall
> we need to make vp_index available outside of vmbus module. Rename and
> globalize.

> +u32 *hv_vp_index;

> +   hv_vp_index[smp_processor_id()] = (u32)msr_vp_index;

Redundant casting.

> +   /* Allocate percpu VP index */
> +   hv_vp_index = kcalloc(num_possible_cpus(), sizeof(*hv_vp_index),
> + GFP_KERNEL);
> +   if (!hv_vp_index)
> +   return;

Consider to use kmalloc_array _if_ it doesn't require to be zeroed.

> +static inline int hv_cpu_number_to_vp_number(int cpu_number)
> +{

> +   WARN_ON(hv_vp_index[cpu_number] == -1);

How come? u32 will be never negative.

Perhaps you meant == ~0U or U32_MAX

> for_each_cpu_and(cpu, dest, cpu_online_mask)
> -   params->vp_mask |= (1ULL << 
> vmbus_cpu_number_to_vp_number(cpu));
> +   params->vp_mask |= (1ULL << hv_cpu_number_to_vp_number(cpu));

__set_bit() ?

> for_each_cpu_and(cpu, affinity, cpu_online_mask) {
> int_pkt->int_desc.cpu_mask |=
> -   (1ULL << vmbus_cpu_number_to_vp_number(cpu));
> +   (1ULL << hv_cpu_number_to_vp_number(cpu));

Ditto.

-- 
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Re: [PATCH v5 06/10] x86/hyper-v: implement rep hypercalls

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> Rep hypercalls are normal hypercalls which perform multiple actions at
> once. Hyper-V guarantees to return exectution to the caller in not more
> than 50us and the caller needs to use hypercall continuation. Touch NMI
> watchdog between hypercall invocations.
>
> This is going to be used for HvFlushVirtualAddressList hypercall for
> remote TLB flushing.


> +   control |= (u64)varhead_size << 17; /* Variable header size */
> +   control |= (u64)rep_count << 32; /* Rep Count */

> +   control &= U64_MAX >> 16;
> +   control |= (u64)rep_comp << 48;

It might make sense to define magics with appropriate names.

-- 
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Re: [PATCH v5 04/10] x86/hyper-v: fast hypercall implementation

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> Hyper-V supports 'fast' hypercalls when all parameters are passed through
> registers. Implement an inline version of a simpliest of these calls:
> hypercall with one 8-byte input and no output.

> +   u64 hv_status, control = (u64)code | BIT(16); /* 'fast' flag */

It might make sense to define magic with appropriate name.

-- 
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Re: [PATCH v5 03/10] x86/hyper-v: make hv_do_hypercall() inline

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> We have only three call sites for hv_do_hypercall() and we're going to
> change HVCALL_SIGNAL_EVENT to doing fast hypercall so we can inline this
> function for optimization.
>
> Hyper-V top level functional specification states that r9-r11 registers
> and flags may be clobbered by the hypervisor during hypercall and with
> inlining this is somewhat important, add the clobbers.
>
> Signed-off-by: Vitaly Kuznetsov 
> Acked-by: K. Y. Srinivasan 

>  #if IS_ENABLED(CONFIG_HYPERV)
>  extern struct clocksource *hyperv_cs;
> +extern void *hv_hypercall_pg;
> +
> +static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
> +{

> +   u64 input_address = (input) ? virt_to_phys(input) : 0;
> +   u64 output_address = (output) ? virt_to_phys(output) : 0;

Yes, I see this in original code, but first pairs of parens are
redundant (it's not a macro anyway).

> +#ifdef CONFIG_X86_64
> +

Swap those lines.

-- 
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Re: Firmware for staging atomisp driver

[Alan Cox]

On Sun, 2017-05-28 at 14:30 +0200, Hans de Goede wrote:
> I started with an Asus T100TA after fixing 2 oopses in the sensor
> driver there I found out that the BIOS does not allow to put the
> ISP in PCI mode and that there is no code to drive it in ACPI
> enumerated mode.

In ACPI mode it's enumerated as part of the GPU but beyond that I don't
know how it works and haven't been able to find out. I am guessing at
this point that the extra node in the acpidump under the GPU gives the
base address, but no idea where the IRQ comes from. Power management on
the BYT devices via PCI is broken anyway so that bit shouldn't matter.



> So I moved to a generic Insyde T701 tablet which does allow
> this. After fixing some more sensor driver issues there I was
> ready to actually load the atomisp driver, but I could not
> find the exact firmware required, I did find a version which
> is close: "irci_stable_candrpv_0415_20150423_1753"
> and tried that but that causes the atomisp driver to explode
> in a backtrace which contains atomisp_load_firmware() so that
> one seems no good.

The firmware has to exactly match. If you look in the atomisp code
you'll see that there are offsets which basically appear to be memory
addresses in the firmware as built that time.

> Can someone help me to get the right firmware ?

Yep.

> The TODO says: "can also be extracted from the upgrade kit"
> about the firmware files, but it is not clear to me what /
> where the "upgrade kit" is.

The Android upgrade kit for your device. So your platforms equivalent
of

https://www.asus.com/Tablets/ASUS_MeMO_Pad_7_ME176C/HelpDesk_Download/


> More in general it would be a good idea if someone inside Intel
> would try to get permission to add the firmware to linux-firmware.

I spent 6 months trying, but even though you can go to your product
vendors website and download it I've not been able to 8(.

> 
> Anyways I will send out the patches I've currently, once I've
> the right firmware I will continue working on this.

Really appreciate the work you are doing on this.

Alan

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Re: [PATCH v5 01/10] x86/hyper-v: include hyperv/ only when CONFIG_HYPERV is set

[Andy Shevchenko]

On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov  wrote:
> Code is arch/x86/hyperv/ is only needed when CONFIG_HYPERV is set, the
> 'basic' support and detection lives in arch/x86/kernel/cpu/mshyperv.c
> which is included when CONFIG_HYPERVISOR_GUEST is set.
>
> Signed-off-by: Vitaly Kuznetsov 
> Acked-by: K. Y. Srinivasan 
> Tested-by: Simon Xiao 
> Tested-by: Srikanth Myakam 
> ---
>  arch/x86/Kbuild |  4 +++-
>  arch/x86/include/asm/mshyperv.h | 10 +-
>  2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild
> index 586b786..3fa0a3c 100644
> --- a/arch/x86/Kbuild
> +++ b/arch/x86/Kbuild
> @@ -8,7 +8,9 @@ obj-$(CONFIG_KVM) += kvm/
>  obj-$(CONFIG_XEN) += xen/
>
>  # Hyper-V paravirtualization support
> -obj-$(CONFIG_HYPERVISOR_GUEST) += hyperv/
> +ifdef CONFIG_HYPERV
> +obj-y += hyperv/
> +endif

Can
obj-$(CONFIG_HYPERV) += hyperv/
work for you instead?

> +#else /* CONFIG_HYPERV */
> +static inline void hyperv_init(void) {}

> +static inline bool hv_is_hypercall_page_setup(void)
> +{
> +   return false;
> +}

Can it be one line? (It's okay in this case if it goes ~83 characters,
for example)

-- 
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Andy Shevchenko
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[PATCH] staging: android: uapi: drop definitions of removed ION_IOC_{FREE,SHARE} ioctls

[Gleb Fotengauer-Malinovskiy]

This problem was found by strace ioctl list generator.

Fixes: 15c6098cfec5 ("staging: android: ion: Remove ion_handle and ion_client")
Signed-off-by: Gleb Fotengauer-Malinovskiy 
---
 drivers/staging/android/uapi/ion.h | 18 --
 1 file changed, 18 deletions(-)

diff --git a/drivers/staging/android/uapi/ion.h 
b/drivers/staging/android/uapi/ion.h
index b76db1b..a291b12 100644
--- a/drivers/staging/android/uapi/ion.h
+++ b/drivers/staging/android/uapi/ion.h
@@ -131,24 +131,6 @@ struct ion_heap_query {
  struct ion_allocation_data)
 
 /**
- * DOC: ION_IOC_FREE - free memory
- *
- * Takes an ion_handle_data struct and frees the handle.
- */
-#define ION_IOC_FREE   _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
-
-/**
- * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation
- *
- * Takes an ion_fd_data struct with the handle field populated with a valid
- * opaque handle.  Returns the struct with the fd field set to a file
- * descriptor open in the current address space.  This file descriptor
- * can then be passed to another process.  The corresponding opaque handle can
- * be retrieved via ION_IOC_IMPORT.
- */
-#define ION_IOC_SHARE  _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
-
-/**
  * DOC: ION_IOC_HEAP_QUERY - information about available heaps
  *
  * Takes an ion_heap_query structure and populates information about
-- 
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[PATCH v5 10/10] tracing/hyper-v: trace hyperv_mmu_flush_tlb_others()

[Vitaly Kuznetsov]

Add Hyper-V tracing subsystem and trace hyperv_mmu_flush_tlb_others().
Tracing is done the same way we do xen_mmu_flush_tlb_others().

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
Tested-by: Simon Xiao 
Tested-by: Srikanth Myakam 
---
 MAINTAINERS |  1 +
 arch/x86/hyperv/mmu.c   |  8 
 arch/x86/include/asm/trace/hyperv.h | 34 ++
 3 files changed, 43 insertions(+)
 create mode 100644 arch/x86/include/asm/trace/hyperv.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 9e98464..045e10a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6168,6 +6168,7 @@ M:Stephen Hemminger 
 L: de...@linuxdriverproject.org
 S: Maintained
 F: arch/x86/include/asm/mshyperv.h
+F: arch/x86/include/asm/trace/hyperv.h
 F: arch/x86/include/uapi/asm/hyperv.h
 F: arch/x86/kernel/cpu/mshyperv.c
 F: arch/x86/hyperv
diff --git a/arch/x86/hyperv/mmu.c b/arch/x86/hyperv/mmu.c
index b08e7ca..e3e8a61 100644
--- a/arch/x86/hyperv/mmu.c
+++ b/arch/x86/hyperv/mmu.c
@@ -6,6 +6,10 @@
 #include 
 #include 
 #include 
+#include 
+
+#define CREATE_TRACE_POINTS
+DEFINE_TRACE(hyperv_mmu_flush_tlb_others);
 
 /* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
 struct hv_flush_pcpu {
@@ -78,6 +82,8 @@ static void hyperv_flush_tlb_others(const struct cpumask 
*cpus,
u64 status = U64_MAX;
int cpu, vcpu, gva_n, max_gvas;
 
+   trace_hyperv_mmu_flush_tlb_others(cpus, mm, start, end);
+
if (!pcpu_flush || !hv_hypercall_pg)
goto do_native;
 
@@ -165,6 +171,8 @@ static void hyperv_flush_tlb_others_ex(const struct cpumask 
*cpus,
u64 status = U64_MAX;
int nr_bank = 0, max_gvas, gva_n;
 
+   trace_hyperv_mmu_flush_tlb_others(cpus, mm, start, end);
+
if (!pcpu_flush_ex || !hv_hypercall_pg)
goto do_native;
 
diff --git a/arch/x86/include/asm/trace/hyperv.h 
b/arch/x86/include/asm/trace/hyperv.h
new file mode 100644
index 000..e46a351
--- /dev/null
+++ b/arch/x86/include/asm/trace/hyperv.h
@@ -0,0 +1,34 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM hyperv
+
+#if !defined(_TRACE_HYPERV_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_HYPERV_H
+
+#include 
+
+#if IS_ENABLED(CONFIG_HYPERV)
+
+TRACE_EVENT(hyperv_mmu_flush_tlb_others,
+   TP_PROTO(const struct cpumask *cpus, struct mm_struct *mm,
+unsigned long addr, unsigned long end),
+   TP_ARGS(cpus, mm, addr, end),
+   TP_STRUCT__entry(
+   __field(unsigned int, ncpus)
+   __field(struct mm_struct *, mm)
+   __field(unsigned long, addr)
+   __field(unsigned long, end)
+   ),
+   TP_fast_assign(__entry->ncpus = cpumask_weight(cpus);
+  __entry->mm = mm;
+  __entry->addr = addr,
+  __entry->end = end),
+   TP_printk("ncpus %d mm %p addr %lx, end %lx",
+ __entry->ncpus, __entry->mm, __entry->addr, __entry->end)
+   );
+
+#endif /* CONFIG_HYPERV */
+
+#endif /* _TRACE_HYPERV_H */
+
+/* This part must be outside protection */
+#include 
-- 
2.9.4

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[PATCH v5 06/10] x86/hyper-v: implement rep hypercalls

[Vitaly Kuznetsov]

Rep hypercalls are normal hypercalls which perform multiple actions at
once. Hyper-V guarantees to return exectution to the caller in not more
than 50us and the caller needs to use hypercall continuation. Touch NMI
watchdog between hypercall invocations.

This is going to be used for HvFlushVirtualAddressList hypercall for
remote TLB flushing.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
---
Changes since v4:
- Avoid union aliasing [Andy Shevchenko]
---
 arch/x86/include/asm/mshyperv.h | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index d587d1e..7c79a17 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -4,6 +4,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
@@ -244,6 +245,41 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u64 
input1)
return hv_status;
 }
 
+/*
+ * Rep hypercalls. Callers of this functions are supposed to ensure that
+ * rep_count and varhead_size comply with Hyper-V hypercall definition.
+ */
+static inline u64 hv_do_rep_hypercall(u16 code, u16 rep_count, u16 
varhead_size,
+ void *input, void *output)
+{
+   u64 control = code;
+   u64 status;
+   u16 rep_comp;
+
+   control |= (u64)varhead_size << 17; /* Variable header size */
+   control |= (u64)rep_count << 32; /* Rep Count */
+
+   do {
+   status = hv_do_hypercall(control, input, output);
+   if ((status & 0x) != HV_STATUS_SUCCESS)
+   return status;
+
+   /* Bits 32-43 of status have 'Reps completed' data. */
+   rep_comp = upper_32_bits(status) & 0xfff;
+
+   /*
+* Set Rep Start Index (bits 48-59) for continuation. Upper 4
+* bits are reserved and should be set to 0.
+*/
+   control &= U64_MAX >> 16;
+   control |= (u64)rep_comp << 48;
+
+   touch_nmi_watchdog();
+   } while (rep_comp < rep_count);
+
+   return status;
+}
+
 void hyperv_init(void);
 void hyperv_report_panic(struct pt_regs *regs);
 bool hv_is_hypercall_page_setup(void);
-- 
2.9.4

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[PATCH v5 03/10] x86/hyper-v: make hv_do_hypercall() inline

[Vitaly Kuznetsov]

We have only three call sites for hv_do_hypercall() and we're going to
change HVCALL_SIGNAL_EVENT to doing fast hypercall so we can inline this
function for optimization.

Hyper-V top level functional specification states that r9-r11 registers
and flags may be clobbered by the hypervisor during hypercall and with
inlining this is somewhat important, add the clobbers.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
---
Changes since v4:
- Use upper_32_bits()/lower_32_bits macros [Andy Shevchenko]
- Use "A" in 32 bits asm [Jork Loeser]
---
 arch/x86/hyperv/hv_init.c   | 54 -
 arch/x86/include/asm/mshyperv.h | 39 +
 drivers/hv/connection.c |  2 ++
 include/linux/hyperv.h  |  1 -
 4 files changed, 46 insertions(+), 50 deletions(-)

diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index 5b882cc..691603e 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -75,7 +75,8 @@ static struct clocksource hyperv_cs_msr = {
.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void *hypercall_pg;
+void *hv_hypercall_pg;
+EXPORT_SYMBOL_GPL(hv_hypercall_pg);
 struct clocksource *hyperv_cs;
 EXPORT_SYMBOL_GPL(hyperv_cs);
 
@@ -102,15 +103,15 @@ void hyperv_init(void)
guest_id = generate_guest_id(0, LINUX_VERSION_CODE, 0);
wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id);
 
-   hypercall_pg  = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_RX);
-   if (hypercall_pg == NULL) {
+   hv_hypercall_pg  = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_RX);
+   if (hv_hypercall_pg == NULL) {
wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
return;
}
 
rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
hypercall_msr.enable = 1;
-   hypercall_msr.guest_physical_address = vmalloc_to_pfn(hypercall_pg);
+   hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);
wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
 
/*
@@ -170,51 +171,6 @@ void hyperv_cleanup(void)
 }
 EXPORT_SYMBOL_GPL(hyperv_cleanup);
 
-/*
- * hv_do_hypercall- Invoke the specified hypercall
- */
-u64 hv_do_hypercall(u64 control, void *input, void *output)
-{
-   u64 input_address = (input) ? virt_to_phys(input) : 0;
-   u64 output_address = (output) ? virt_to_phys(output) : 0;
-#ifdef CONFIG_X86_64
-   u64 hv_status = 0;
-
-   if (!hypercall_pg)
-   return (u64)ULLONG_MAX;
-
-   __asm__ __volatile__("mov %0, %%r8" : : "r" (output_address) : "r8");
-   __asm__ __volatile__("call *%3" : "=a" (hv_status) :
-"c" (control), "d" (input_address),
-"m" (hypercall_pg));
-
-   return hv_status;
-
-#else
-
-   u32 control_hi = control >> 32;
-   u32 control_lo = control & 0x;
-   u32 hv_status_hi = 1;
-   u32 hv_status_lo = 1;
-   u32 input_address_hi = input_address >> 32;
-   u32 input_address_lo = input_address & 0x;
-   u32 output_address_hi = output_address >> 32;
-   u32 output_address_lo = output_address & 0x;
-
-   if (!hypercall_pg)
-   return (u64)ULLONG_MAX;
-
-   __asm__ __volatile__ ("call *%8" : "=d"(hv_status_hi),
- "=a"(hv_status_lo) : "d" (control_hi),
- "a" (control_lo), "b" (input_address_hi),
- "c" (input_address_lo), "D"(output_address_hi),
- "S"(output_address_lo), "m" (hypercall_pg));
-
-   return hv_status_lo | ((u64)hv_status_hi << 32);
-#endif /* !x86_64 */
-}
-EXPORT_SYMBOL_GPL(hv_do_hypercall);
-
 void hyperv_report_panic(struct pt_regs *regs)
 {
static bool panic_reported;
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index d42b6eb..282eaed 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -172,6 +172,45 @@ void hv_remove_crash_handler(void);
 
 #if IS_ENABLED(CONFIG_HYPERV)
 extern struct clocksource *hyperv_cs;
+extern void *hv_hypercall_pg;
+
+static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
+{
+   u64 input_address = (input) ? virt_to_phys(input) : 0;
+   u64 output_address = (output) ? virt_to_phys(output) : 0;
+   u64 hv_status;
+   register void *__sp asm(_ASM_SP);
+#ifdef CONFIG_X86_64
+
+   if (!hv_hypercall_pg)
+   return (u64)ULLONG_MAX;
+
+   __asm__ __volatile__("mov %4, %%r8\n"
+"call *%5"
+: "=a" (hv_status), "+r" (__sp),
+  "+c" (control), "+d" (input_address)
+:  "r" (output_address), "m" (hv_hypercall_pg)
+: "cc", "memory", "r8", "r9", "r10", "r11");
+#else
+   u32 

[PATCH v5 05/10] hyper-v: use fast hypercall for HVCALL_SIGNAL_EVENT

[Vitaly Kuznetsov]

We need to pass only 8 bytes of input for HvSignalEvent which makes it a
perfect fit for fast hypercall. hv_input_signal_event_buffer is not needed
any more and hv_input_signal_event is converted to union for convenience.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
---
Changes since v4:
- Avoid union aliasing [Andy Shevchenko]
---
 drivers/hv/channel_mgmt.c | 13 ++---
 drivers/hv/connection.c   |  2 +-
 include/linux/hyperv.h| 15 +--
 3 files changed, 4 insertions(+), 26 deletions(-)

diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c
index 0fabd41..f501ce1 100644
--- a/drivers/hv/channel_mgmt.c
+++ b/drivers/hv/channel_mgmt.c
@@ -806,21 +806,12 @@ static void vmbus_onoffer(struct 
vmbus_channel_message_header *hdr)
/*
 * Setup state for signalling the host.
 */
-   newchannel->sig_event = (struct hv_input_signal_event *)
-   (ALIGN((unsigned long)
-   >sig_buf,
-   HV_HYPERCALL_PARAM_ALIGN));
-
-   newchannel->sig_event->connectionid.asu32 = 0;
-   newchannel->sig_event->connectionid.u.id = VMBUS_EVENT_CONNECTION_ID;
-   newchannel->sig_event->flag_number = 0;
-   newchannel->sig_event->rsvdz = 0;
+   newchannel->sig_event = VMBUS_EVENT_CONNECTION_ID;
 
if (vmbus_proto_version != VERSION_WS2008) {
newchannel->is_dedicated_interrupt =
(offer->is_dedicated_interrupt != 0);
-   newchannel->sig_event->connectionid.u.id =
-   offer->connection_id;
+   newchannel->sig_event = offer->connection_id;
}
 
memcpy(>offermsg, offer,
diff --git a/drivers/hv/connection.c b/drivers/hv/connection.c
index 4a0a9f6..d883308 100644
--- a/drivers/hv/connection.c
+++ b/drivers/hv/connection.c
@@ -408,6 +408,6 @@ void vmbus_set_event(struct vmbus_channel *channel)
if (!channel->is_dedicated_interrupt)
vmbus_send_interrupt(child_relid);
 
-   hv_do_hypercall(HVCALL_SIGNAL_EVENT, channel->sig_event, NULL);
+   hv_do_fast_hypercall8(HVCALL_SIGNAL_EVENT, channel->sig_event);
 }
 EXPORT_SYMBOL_GPL(vmbus_set_event);
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index d1ae02d..2c9a2c8 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -677,18 +677,6 @@ union hv_connection_id {
} u;
 };
 
-/* Definition of the hv_signal_event hypercall input structure. */
-struct hv_input_signal_event {
-   union hv_connection_id connectionid;
-   u16 flag_number;
-   u16 rsvdz;
-};
-
-struct hv_input_signal_event_buffer {
-   u64 align8;
-   struct hv_input_signal_event event;
-};
-
 enum hv_numa_policy {
HV_BALANCED = 0,
HV_LOCALIZED,
@@ -771,8 +759,7 @@ struct vmbus_channel {
} callback_mode;
 
bool is_dedicated_interrupt;
-   struct hv_input_signal_event_buffer sig_buf;
-   struct hv_input_signal_event *sig_event;
+   u64 sig_event;
 
/*
 * Starting with win8, this field will be used to specify
-- 
2.9.4

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[PATCH v5 04/10] x86/hyper-v: fast hypercall implementation

[Vitaly Kuznetsov]

Hyper-V supports 'fast' hypercalls when all parameters are passed through
registers. Implement an inline version of a simpliest of these calls:
hypercall with one 8-byte input and no output.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
---
Changes since v4:
- Avoid union aliasing, drop hv_hypercall_input definition [Andy Shevchenko]
- Use double register "A" in 32 bits asm [Jork Loeser]
---
 arch/x86/include/asm/mshyperv.h | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 282eaed..d587d1e 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -212,6 +212,38 @@ static inline u64 hv_do_hypercall(u64 control, void 
*input, void *output)
return hv_status;
 }
 
+/* Fast hypercall with 8 bytes of input and no output */
+static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
+{
+   u64 hv_status, control = (u64)code | BIT(16); /* 'fast' flag */
+   register void *__sp asm(_ASM_SP);
+
+#ifdef CONFIG_X86_64
+   {
+   __asm__ __volatile__("call *%4"
+: "=a" (hv_status), "+r" (__sp),
+  "+c" (control), "+d" (input1)
+: "m" (hv_hypercall_pg)
+: "cc", "r8", "r9", "r10", "r11");
+   }
+#else
+   {
+   u32 input1_hi = upper_32_bits(input1);
+   u32 input1_lo = lower_32_bits(input1);
+
+   __asm__ __volatile__ ("call *%5"
+ : "=A"(hv_status),
+   "+c"(input1_lo),
+   "+r"(__sp)
+ : "A" (control),
+   "b" (input1_hi),
+   "m" (hv_hypercall_pg)
+ : "cc", "edi", "esi");
+   }
+#endif
+   return hv_status;
+}
+
 void hyperv_init(void);
 void hyperv_report_panic(struct pt_regs *regs);
 bool hv_is_hypercall_page_setup(void);
-- 
2.9.4

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[PATCH v5 07/10] hyper-v: globalize vp_index

[Vitaly Kuznetsov]

To support implementing remote TLB flushing on Hyper-V with a hypercall
we need to make vp_index available outside of vmbus module. Rename and
globalize.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
Tested-by: Simon Xiao 
Tested-by: Srikanth Myakam 
---
 arch/x86/hyperv/hv_init.c   | 34 +-
 arch/x86/include/asm/mshyperv.h | 26 ++
 drivers/hv/channel_mgmt.c   |  7 +++
 drivers/hv/connection.c |  3 ++-
 drivers/hv/hv.c |  9 -
 drivers/hv/hyperv_vmbus.h   | 11 ---
 drivers/hv/vmbus_drv.c  | 17 -
 drivers/pci/host/pci-hyperv.c   |  4 ++--
 include/linux/hyperv.h  |  1 -
 9 files changed, 66 insertions(+), 46 deletions(-)

diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index 691603e..7fd9cd3 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -26,6 +26,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #ifdef CONFIG_HYPERV_TSCPAGE
 
@@ -80,6 +82,20 @@ EXPORT_SYMBOL_GPL(hv_hypercall_pg);
 struct clocksource *hyperv_cs;
 EXPORT_SYMBOL_GPL(hyperv_cs);
 
+u32 *hv_vp_index;
+EXPORT_SYMBOL_GPL(hv_vp_index);
+
+static int hv_cpu_init(unsigned int cpu)
+{
+   u64 msr_vp_index;
+
+   hv_get_vp_index(msr_vp_index);
+
+   hv_vp_index[smp_processor_id()] = (u32)msr_vp_index;
+
+   return 0;
+}
+
 /*
  * This function is to be invoked early in the boot sequence after the
  * hypervisor has been detected.
@@ -95,6 +111,16 @@ void hyperv_init(void)
if (x86_hyper != _hyper_ms_hyperv)
return;
 
+   /* Allocate percpu VP index */
+   hv_vp_index = kcalloc(num_possible_cpus(), sizeof(*hv_vp_index),
+ GFP_KERNEL);
+   if (!hv_vp_index)
+   return;
+
+   if (cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/hyperv_init:online",
+ hv_cpu_init, NULL) < 0)
+   goto free_vp_index;
+
/*
 * Setup the hypercall page and enable hypercalls.
 * 1. Register the guest ID
@@ -106,7 +132,7 @@ void hyperv_init(void)
hv_hypercall_pg  = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_RX);
if (hv_hypercall_pg == NULL) {
wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
-   return;
+   goto free_vp_index;
}
 
rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
@@ -149,6 +175,12 @@ void hyperv_init(void)
hyperv_cs = _cs_msr;
if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE)
clocksource_register_hz(_cs_msr, NSEC_PER_SEC/100);
+
+   return;
+
+free_vp_index:
+   kfree(hv_vp_index);
+   hv_vp_index = NULL;
 }
 
 /*
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 7c79a17..702abaf 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -280,6 +280,32 @@ static inline u64 hv_do_rep_hypercall(u16 code, u16 
rep_count, u16 varhead_size,
return status;
 }
 
+/*
+ * Hypervisor's notion of virtual processor ID is different from
+ * Linux' notion of CPU ID. This information can only be retrieved
+ * in the context of the calling CPU. Setup a map for easy access
+ * to this information.
+ */
+extern u32 __percpu *hv_vp_index;
+
+/**
+ * hv_cpu_number_to_vp_number() - Map CPU to VP.
+ * @cpu_number: CPU number in Linux terms
+ *
+ * This function returns the mapping between the Linux processor
+ * number and the hypervisor's virtual processor number, useful
+ * in making hypercalls and such that talk about specific
+ * processors.
+ *
+ * Return: Virtual processor number in Hyper-V terms
+ */
+static inline int hv_cpu_number_to_vp_number(int cpu_number)
+{
+   WARN_ON(hv_vp_index[cpu_number] == -1);
+
+   return hv_vp_index[cpu_number];
+}
+
 void hyperv_init(void);
 void hyperv_report_panic(struct pt_regs *regs);
 bool hv_is_hypercall_page_setup(void);
diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c
index f501ce1..331b314 100644
--- a/drivers/hv/channel_mgmt.c
+++ b/drivers/hv/channel_mgmt.c
@@ -600,7 +600,7 @@ static void init_vp_index(struct vmbus_channel *channel, 
u16 dev_type)
 */
channel->numa_node = 0;
channel->target_cpu = 0;
-   channel->target_vp = hv_context.vp_index[0];
+   channel->target_vp = hv_cpu_number_to_vp_number(0);
return;
}
 
@@ -684,7 +684,7 @@ static void init_vp_index(struct vmbus_channel *channel, 
u16 dev_type)
}
 
channel->target_cpu = cur_cpu;
-   channel->target_vp = hv_context.vp_index[cur_cpu];
+   channel->target_vp = hv_cpu_number_to_vp_number(cur_cpu);
 }
 
 static void vmbus_wait_for_unload(void)
@@ -1220,8 +1220,7 @@ struct vmbus_channel 

[PATCH v5 08/10] x86/hyper-v: use hypercall for remote TLB flush

[Vitaly Kuznetsov]

Hyper-V host can suggest us to use hypercall for doing remote TLB flush,
this is supposed to work faster than IPIs.

Implementation details: to do HvFlushVirtualAddress{Space,List} hypercalls
we need to put the input somewhere in memory and we don't really want to
have memory allocation on each call so we pre-allocate per cpu memory areas
on boot. These areas are of fixes size, limit them with an arbitrary number
of 16 (16 gvas are able to specify 16 * 4096 pages).

pv_ops patching is happening very early so we need to separate
hyperv_setup_mmu_ops() and hyper_alloc_mmu().

It is possible and easy to implement local TLB flushing too and there is
even a hint for that. However, I don't see a room for optimization on the
host side as both hypercall and native tlb flush will result in vmexit. The
hint is also not set on modern Hyper-V versions.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
---
Changes since v4:
- Define HV_TLB_FLUSH_UNIT, use __set_bit(), minor code style changes
  [Andy Shevchenko]
---
 arch/x86/hyperv/Makefile   |   2 +-
 arch/x86/hyperv/hv_init.c  |   2 +
 arch/x86/hyperv/mmu.c  | 121 +
 arch/x86/include/asm/mshyperv.h|   3 +
 arch/x86/include/uapi/asm/hyperv.h |   7 +++
 arch/x86/kernel/cpu/mshyperv.c |   1 +
 6 files changed, 135 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/hyperv/mmu.c

diff --git a/arch/x86/hyperv/Makefile b/arch/x86/hyperv/Makefile
index 171ae09..367a820 100644
--- a/arch/x86/hyperv/Makefile
+++ b/arch/x86/hyperv/Makefile
@@ -1 +1 @@
-obj-y  := hv_init.o
+obj-y  := hv_init.o mmu.o
diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index 7fd9cd3..df3252f 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -140,6 +140,8 @@ void hyperv_init(void)
hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);
wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
 
+   hyper_alloc_mmu();
+
/*
 * Register Hyper-V specific clocksource.
 */
diff --git a/arch/x86/hyperv/mmu.c b/arch/x86/hyperv/mmu.c
new file mode 100644
index 000..8ccd680
--- /dev/null
+++ b/arch/x86/hyperv/mmu.c
@@ -0,0 +1,121 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
+struct hv_flush_pcpu {
+   __u64 address_space;
+   __u64 flags;
+   __u64 processor_mask;
+   __u64 gva_list[];
+};
+
+/* Each gva in gva_list encodes up to 4096 pages to flush */
+#define HV_TLB_FLUSH_UNIT (PAGE_SIZE * PAGE_SIZE)
+
+static struct hv_flush_pcpu __percpu *pcpu_flush;
+
+static void hyperv_flush_tlb_others(const struct cpumask *cpus,
+   struct mm_struct *mm, unsigned long start,
+   unsigned long end)
+{
+   struct hv_flush_pcpu *flush;
+   unsigned long cur, flags;
+   u64 status = U64_MAX;
+   int cpu, vcpu, gva_n, max_gvas;
+
+   if (!pcpu_flush || !hv_hypercall_pg)
+   goto do_native;
+
+   if (cpumask_empty(cpus))
+   return;
+
+   local_irq_save(flags);
+
+   flush = this_cpu_ptr(pcpu_flush);
+
+   if (mm) {
+   flush->address_space = virt_to_phys(mm->pgd);
+   flush->flags = 0;
+   } else {
+   flush->address_space = 0;
+   flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
+   }
+
+   flush->processor_mask = 0;
+   if (cpumask_equal(cpus, cpu_present_mask)) {
+   flush->flags |= HV_FLUSH_ALL_PROCESSORS;
+   } else {
+   for_each_cpu(cpu, cpus) {
+   vcpu = hv_cpu_number_to_vp_number(cpu);
+   if (vcpu != -1 && vcpu < 64)
+   __set_bit(vcpu, (unsigned long *)
+ >processor_mask);
+   else
+   goto do_native;
+   }
+   }
+
+   /*
+* We can flush not more than max_gvas with one hypercall. Flush the
+* whole address space if we were asked to do more.
+*/
+   max_gvas = (PAGE_SIZE - sizeof(*flush)) / 8;
+
+   if (end == TLB_FLUSH_ALL) {
+   flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
+   status = hv_do_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE,
+flush, NULL);
+   } else if (end && ((end - start)/HV_TLB_FLUSH_UNIT) > max_gvas) {
+   status = hv_do_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE,
+flush, NULL);
+   } else {
+   cur = start;
+   gva_n = 0;
+   do {
+   flush->gva_list[gva_n] = cur & PAGE_MASK;
+   /*
+  

[PATCH v5 09/10] x86/hyper-v: support extended CPU ranges for TLB flush hypercalls

[Vitaly Kuznetsov]

Hyper-V hosts may support more than 64 vCPUs, we need to use
HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX/LIST_EX hypercalls in this
case.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
---
Changes since v4:
- Use __set_bit(), minor code style changes [Andy Shevchenko]
---
 arch/x86/hyperv/mmu.c  | 150 -
 arch/x86/include/uapi/asm/hyperv.h |  10 +++
 2 files changed, 158 insertions(+), 2 deletions(-)

diff --git a/arch/x86/hyperv/mmu.c b/arch/x86/hyperv/mmu.c
index 8ccd680..b08e7ca 100644
--- a/arch/x86/hyperv/mmu.c
+++ b/arch/x86/hyperv/mmu.c
@@ -15,11 +15,60 @@ struct hv_flush_pcpu {
__u64 gva_list[];
 };
 
+/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
+struct hv_flush_pcpu_ex {
+   __u64 address_space;
+   __u64 flags;
+   struct {
+   __u64 format;
+   __u64 valid_bank_mask;
+   __u64 bank_contents[];
+   } hv_vp_set;
+   __u64 gva_list[];
+};
+
 /* Each gva in gva_list encodes up to 4096 pages to flush */
 #define HV_TLB_FLUSH_UNIT (PAGE_SIZE * PAGE_SIZE)
 
 static struct hv_flush_pcpu __percpu *pcpu_flush;
 
+static struct hv_flush_pcpu_ex __percpu *pcpu_flush_ex;
+
+static inline int cpumask_to_vp_set(struct hv_flush_pcpu_ex *flush,
+   const struct cpumask *cpus)
+{
+   int cpu, vcpu, vcpu_bank, vcpu_offset, cur_bank, nr_bank = 0;
+   bool has_cpus;
+
+   /*
+* We can't be sure that translated vCPU numbers will always be
+* in ascending order, so iterate over all possible banks and
+* check all vCPUs in it instead.
+*/
+   for (cur_bank = 0; cur_bank < ms_hyperv.max_vp_index/64; cur_bank++) {
+   has_cpus = false;
+   for_each_cpu(cpu, cpus) {
+   vcpu = hv_cpu_number_to_vp_number(cpu);
+   vcpu_bank = vcpu / 64;
+   vcpu_offset = vcpu % 64;
+
+   if (vcpu_bank != cur_bank)
+   continue;
+   __set_bit(vcpu_offset, (unsigned long *)
+ >hv_vp_set.bank_contents[nr_bank]);
+   if (!has_cpus) {
+   __set_bit(vcpu_bank, (unsigned long *)
+ >hv_vp_set.valid_bank_mask);
+   has_cpus = true;
+   }
+   }
+   if (has_cpus)
+   nr_bank++;
+   }
+
+   return nr_bank;
+}
+
 static void hyperv_flush_tlb_others(const struct cpumask *cpus,
struct mm_struct *mm, unsigned long start,
unsigned long end)
@@ -106,16 +155,113 @@ static void hyperv_flush_tlb_others(const struct cpumask 
*cpus,
native_flush_tlb_others(cpus, mm, start, end);
 }
 
+static void hyperv_flush_tlb_others_ex(const struct cpumask *cpus,
+  struct mm_struct *mm,
+  unsigned long start,
+  unsigned long end)
+{
+   struct hv_flush_pcpu_ex *flush;
+   unsigned long cur, flags;
+   u64 status = U64_MAX;
+   int nr_bank = 0, max_gvas, gva_n;
+
+   if (!pcpu_flush_ex || !hv_hypercall_pg)
+   goto do_native;
+
+   if (cpumask_empty(cpus))
+   return;
+
+   local_irq_save(flags);
+
+   flush = this_cpu_ptr(pcpu_flush_ex);
+
+   if (mm) {
+   flush->address_space = virt_to_phys(mm->pgd);
+   flush->flags = 0;
+   } else {
+   flush->address_space = 0;
+   flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
+   }
+
+   flush->hv_vp_set.valid_bank_mask = 0;
+
+   if (cpumask_equal(cpus, cpu_present_mask)) {
+   flush->hv_vp_set.format = HV_GENERIC_SET_ALL;
+   flush->flags |= HV_FLUSH_ALL_PROCESSORS;
+   } else {
+   flush->hv_vp_set.format = HV_GENERIC_SET_SPARCE_4K;
+   nr_bank = cpumask_to_vp_set(flush, cpus);
+   }
+
+   /*
+* We can flush not more than max_gvas with one hypercall. Flush the
+* whole address space if we were asked to do more.
+*/
+   max_gvas = (PAGE_SIZE - sizeof(*flush) - nr_bank*8) / 8;
+
+   if (end == TLB_FLUSH_ALL) {
+   flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
+   status = hv_do_rep_hypercall(
+   HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX,
+   0, nr_bank + 2, flush, NULL);
+   } else if (end && ((end - start)/HV_TLB_FLUSH_UNIT) > max_gvas) {
+   status = hv_do_rep_hypercall(
+   HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX,
+   0, nr_bank + 2, flush, NULL);
+   } else {
+

[PATCH v5 02/10] x86/hyper-v: stash the max number of virtual/logical processor

[Vitaly Kuznetsov]

Max virtual processor will be needed for 'extended' hypercalls supporting
more than 64 vCPUs. While on it, unify on 'Hyper-V' in mshyperv.c as we
currently have a mix, report acquired misc features as well.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
Tested-by: Simon Xiao 
Tested-by: Srikanth Myakam 
---
Changes since v4:
- '%d' -> '%u' [Andy Shevchenko]
---
 arch/x86/include/asm/mshyperv.h |  2 ++
 arch/x86/kernel/cpu/mshyperv.c  | 12 +---
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 91acec7..d42b6eb 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -29,6 +29,8 @@ struct ms_hyperv_info {
u32 features;
u32 misc_features;
u32 hints;
+   u32 max_vp_index;
+   u32 max_lp_index;
 };
 
 extern struct ms_hyperv_info ms_hyperv;
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 04cb8d3..bdcc433 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -175,9 +175,15 @@ static void __init ms_hyperv_init_platform(void)
ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
ms_hyperv.hints= cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
 
-   pr_info("HyperV: features 0x%x, hints 0x%x\n",
+   pr_info("Hyper-V: features 0x%x, hints 0x%x\n",
ms_hyperv.features, ms_hyperv.hints);
 
+   ms_hyperv.max_vp_index = cpuid_eax(HVCPUID_IMPLEMENTATION_LIMITS);
+   ms_hyperv.max_lp_index = cpuid_ebx(HVCPUID_IMPLEMENTATION_LIMITS);
+
+   pr_info("Hyper-V: max %u virtual processors, %u logical processors\n",
+   ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
+
/*
 * Extract host information.
 */
@@ -203,7 +209,7 @@ static void __init ms_hyperv_init_platform(void)
rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
lapic_timer_frequency = hv_lapic_frequency;
-   pr_info("HyperV: LAPIC Timer Frequency: %#x\n",
+   pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
lapic_timer_frequency);
}
 
@@ -237,7 +243,7 @@ static void __init ms_hyperv_init_platform(void)
 }
 
 const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
-   .name   = "Microsoft HyperV",
+   .name   = "Microsoft Hyper-V",
.detect = ms_hyperv_platform,
.init_platform  = ms_hyperv_init_platform,
 };
-- 
2.9.4

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[PATCH v5 00/10] Hyper-V: praravirtualized remote TLB flushing and hypercall improvements

[Vitaly Kuznetsov]

Changes since v4:
- Get rid of union aliasing in the series [Andy Shevchenko]. We still use
  it a lot across Hyper-V code and we should probably get rid of it
  entirely.
- Code style changes [Andy Shevchenko].
- Use __set_bit(), lower/upper_32_bits where possible [Andy Shevchenko].
- Use 'A' double register in 32 bit hypercalls implementation
  [Jork Loeser].

Changes are also noted in individual patches.

K. Y., while all the changes are not groundbreaking I still have to drop
'Tested-by' tags on affected patches. It would be great to have this
series retested.

Thomas, Ingo, Peter, would you like to take this through x86 tree or should
we push it through Greg's char-misc tree?

Original description:

Hyper-V supports hypercalls for doing local and remote TLB flushing and
gives its guests hints when using hypercall is preferred. While doing
hypercalls for local TLB flushes is probably not practical (and is not
being suggested by modern Hyper-V versions) remote TLB flush with a
hypercall brings significant improvement.

To test the series I wrote a special 'TLB trasher': on a 16 vCPU guest I
was creating 32 threads which were doing 10 mmap/munmaps each on some
big file. Here are the results:

Before:
# time ./pthread_mmap ./randfile 
real3m33.118s
user0m3.698s
sys 3m16.624s

After:
# time ./pthread_mmap ./randfile 
real2m19.920s
user0m2.662s
sys 2m9.948s

This series brings a number of small improvements along the way: fast
hypercall implementation and using it for event signaling, rep hypercalls
implementation, hyperv tracing subsystem (which only traces the newly added
remote TLB flush for now).

Vitaly Kuznetsov (10):
  x86/hyper-v: include hyperv/ only when CONFIG_HYPERV is set
  x86/hyper-v: stash the max number of virtual/logical processor
  x86/hyper-v: make hv_do_hypercall() inline
  x86/hyper-v: fast hypercall implementation
  hyper-v: use fast hypercall for HVCALL_SIGNAL_EVENT
  x86/hyper-v: implement rep hypercalls
  hyper-v: globalize vp_index
  x86/hyper-v: use hypercall for remote TLB flush
  x86/hyper-v: support extended CPU ranges for TLB flush hypercalls
  tracing/hyper-v: trace hyperv_mmu_flush_tlb_others()

 MAINTAINERS |   1 +
 arch/x86/Kbuild |   4 +-
 arch/x86/hyperv/Makefile|   2 +-
 arch/x86/hyperv/hv_init.c   |  90 ++--
 arch/x86/hyperv/mmu.c   | 275 
 arch/x86/include/asm/mshyperv.h | 148 ++-
 arch/x86/include/asm/trace/hyperv.h |  34 +
 arch/x86/include/uapi/asm/hyperv.h  |  17 +++
 arch/x86/kernel/cpu/mshyperv.c  |  13 +-
 drivers/hv/channel_mgmt.c   |  20 +--
 drivers/hv/connection.c |   7 +-
 drivers/hv/hv.c |   9 --
 drivers/hv/hyperv_vmbus.h   |  11 --
 drivers/hv/vmbus_drv.c  |  17 ---
 drivers/pci/host/pci-hyperv.c   |   4 +-
 include/linux/hyperv.h  |  17 +--
 16 files changed, 541 insertions(+), 128 deletions(-)
 create mode 100644 arch/x86/hyperv/mmu.c
 create mode 100644 arch/x86/include/asm/trace/hyperv.h

-- 
2.9.4

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[PATCH v5 01/10] x86/hyper-v: include hyperv/ only when CONFIG_HYPERV is set

[Vitaly Kuznetsov]

Code is arch/x86/hyperv/ is only needed when CONFIG_HYPERV is set, the
'basic' support and detection lives in arch/x86/kernel/cpu/mshyperv.c
which is included when CONFIG_HYPERVISOR_GUEST is set.

Signed-off-by: Vitaly Kuznetsov 
Acked-by: K. Y. Srinivasan 
Tested-by: Simon Xiao 
Tested-by: Srikanth Myakam 
---
 arch/x86/Kbuild |  4 +++-
 arch/x86/include/asm/mshyperv.h | 10 +-
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild
index 586b786..3fa0a3c 100644
--- a/arch/x86/Kbuild
+++ b/arch/x86/Kbuild
@@ -8,7 +8,9 @@ obj-$(CONFIG_KVM) += kvm/
 obj-$(CONFIG_XEN) += xen/
 
 # Hyper-V paravirtualization support
-obj-$(CONFIG_HYPERVISOR_GUEST) += hyperv/
+ifdef CONFIG_HYPERV
+obj-y += hyperv/
+endif
 
 # lguest paravirtualization support
 obj-$(CONFIG_LGUEST_GUEST) += lguest/
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index fba1007..91acec7 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -175,7 +175,15 @@ void hyperv_init(void);
 void hyperv_report_panic(struct pt_regs *regs);
 bool hv_is_hypercall_page_setup(void);
 void hyperv_cleanup(void);
-#endif
+#else /* CONFIG_HYPERV */
+static inline void hyperv_init(void) {}
+static inline bool hv_is_hypercall_page_setup(void)
+{
+   return false;
+}
+static inline hyperv_cleanup(void) {}
+#endif /* CONFIG_HYPERV */
+
 #ifdef CONFIG_HYPERV_TSCPAGE
 struct ms_hyperv_tsc_page *hv_get_tsc_page(void);
 static inline u64 hv_read_tsc_page(const struct ms_hyperv_tsc_page *tsc_pg)
-- 
2.9.4

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Re: [PATCH] staging: ks7010: define ether_hdr.h_proto to be big-endian

[Dick Porter]

On Mon, May 29, 2017 at 04:33:58PM +0200, Greg KH wrote:
> On Sun, May 21, 2017 at 10:15:11AM +0100, d...@acm.org wrote:
> > From: Richard Porter 
> > 
> > Fixes sparse warnings:
> > drivers/staging/ks7010/ks_hostif.c:339:21: warning: cast to restricted 
> > __be16
> > drivers/staging/ks7010/ks_hostif.c:430:21: warning: cast to restricted 
> > __be16
> > drivers/staging/ks7010/ks_hostif.c:1226:21: warning: cast to restricted 
> > __be16
> > 
> > Signed-off-by: Richard Porter 
> > ---
> >  drivers/staging/ks7010/eap_packet.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/staging/ks7010/eap_packet.h 
> > b/drivers/staging/ks7010/eap_packet.h
> > index b2d25ef..eec4aa4 100644
> > --- a/drivers/staging/ks7010/eap_packet.h
> > +++ b/drivers/staging/ks7010/eap_packet.h
> > @@ -18,7 +18,7 @@ struct ether_hdr {
> > unsigned char h_source_snap;
> > unsigned char h_command;
> > unsigned char h_vendor_id[3];
> > -   unsigned short h_proto; /* packet type ID field */
> > +   __be16 h_proto; /* packet type ID field */
> 
> How do you know this field is really this endian?  Is this on the wire?
> On the device itself?  How have you verified this is correct?

ether_hdr.h_proto is only ever read via ntohs(), on the lines highlighted
by sparse, apart from when it is copied directly into an sk_buff data buffer
(ks_hostif.c line 474) at offset ETH_ALEN * 2.  The sk_buff data gets cast
to a struct ethhdr in eth_type_trans() (ks_hostif.c line 510), which already
has the h_proto field at the same offset with type __be16.

- Dick

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Re: [PATCH v7 16/34] [media] add Omnivision OV5640 sensor driver

[Sakari Ailus]

Hi Steve,

On Mon, May 29, 2017 at 02:50:34PM -0700, Steve Longerbeam wrote:
> >
> >
> >>+
> >>+static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
> >>+{
> >>+   struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
> >>+   struct ov5640_dev *sensor = to_ov5640_dev(sd);
> >>+   int ret = 0;
> >>+
> >>+   mutex_lock(>lock);
> >Could you use the same lock for the controls as you use for the rest? Just
> >setting handler->lock after handler init does the trick.
> 
> Can you please rephrase, I don't follow. "same lock for the controls as
> you use for the rest" - there's only one device lock owned by this driver
> and I am already using that same lock.

There's another in the control handler. You could use your own lock for the
control handler as well.

> 
> 
> >
> >>+
> >>+static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
> >>+{
> >>+   struct ov5640_dev *sensor = to_ov5640_dev(sd);
> >>+   int ret = 0;
> >>+
> >>+   mutex_lock(>lock);
> >>+
> >>+#if defined(CONFIG_MEDIA_CONTROLLER)
> >>+   if (sd->entity.stream_count > 1)
> >The entity stream_count isn't connected to the number of times s_stream(sd,
> >true) is called. Please remove the check.
> 
> It's incremented by media_pipeline_start(), even if the entity is already
> a member of the given pipeline.
> 
> I added this check because in imx-media, the ov5640 can be streaming
> concurrently to multiple video capture devices, and each capture device
> calls
> media_pipeline_start() at stream on, which increments the entity stream
> count.
> 
> So if one capture device issues a stream off while others are still
> streaming,
> ov5640 should remain at stream on. So the entity stream count is being
> used as a streaming usage counter. Is there a better way to do this? Should
> I use a private stream use counter instead?

Different drivers may use media_pipeline_start() in different ways. Stream
control shouldn't depend on that count. This could cause issues in using the
driver with other ISP / receiver drivers.

I think it should be enough to move the check to the imx driver in this
case.

> 
> 
> 
> >
> >
> >>+
> >>+free_ctrls:
> >>+   v4l2_ctrl_handler_free(>ctrls.handler);
> >>+entity_cleanup:
> >>+   mutex_destroy(>lock);
> >>+   media_entity_cleanup(>sd.entity);
> >>+   regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
> >Should this still be here?
> >
> >>+   return ret;
> >>+}
> >>+
> >>+static int ov5640_remove(struct i2c_client *client)
> >>+{
> >>+   struct v4l2_subdev *sd = i2c_get_clientdata(client);
> >>+   struct ov5640_dev *sensor = to_ov5640_dev(sd);
> >>+
> >>+   regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
> >Ditto.
> 
> I don't understand. regulator_bulk_disable() is still needed, am I missing
> something?

You still need to enable it first. I don't see that being done in probe. As
the driver implements the s_power() op, I don't see a need for powering the
device on at probe time (and conversely off at remove time).

-- 
Regards,

Sakari Ailus
e-mail: sakari.ai...@iki.fi XMPP: sai...@retiisi.org.uk
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Re: [PATCH V2 00/27] Drivers: ccree - align block comments

[Antoine Tenart]

Hello Derek,

On Tue, May 30, 2017 at 06:09:37PM +1200, Derek Robson wrote:
> Fixed block comments across whole ccree driver

Since all these commits are doing the same logical change across a
single driver, you could probably squash them all into a single one.

Thanks!
Antoine

-- 
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com


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[PATCH V2 26/27] Drivers: ccree: cc_hw_queue_defs.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/cc_hw_queue_defs.h | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h 
b/drivers/staging/ccree/cc_hw_queue_defs.h
index 71381760566d..bb64fddc371d 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -23,8 +23,8 @@
 #include "dx_crys_kernel.h"
 
 /**
-*  DEFINITIONS
-**/
+ * DEFINITIONS
+ 
**/
 
 /* Dma AXI Secure bit */
 #defineAXI_SECURE  0
@@ -36,8 +36,8 @@
 #define _HW_DESC_MONITOR_KICK 0x7FFFC00
 
 /**
-*  TYPE DEFINITIONS
-**/
+ * TYPE DEFINITIONS
+ 
**/
 
 struct cc_hw_desc {
u32 word[HW_DESC_SIZE_WORDS];
@@ -400,7 +400,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param numRounds number of rounds for Multi2
-*/
+ */
 #define HW_DESC_SET_MULTI2_NUM_ROUNDS(pDesc, numRounds)
\
do {
\
CC_REG_FLD_SET(CRY_KERNEL, DSCRPTR_QUEUE_WORD2, VALUE, 
(pDesc)->word[2], (u32)(numRounds)); \
@@ -411,7 +411,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param flowMode Any one of the modes defined in [CC7x-DESC]
-*/
+ */
 
 #define HW_DESC_SET_FLOW_MODE(pDesc, flowMode) 
\
do {
\
@@ -423,7 +423,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param cipherMode Any one of the modes defined in [CC7x-DESC]
-*/
+ */
 #define HW_DESC_SET_CIPHER_MODE(pDesc, cipherMode) 
\
do {
\
CC_REG_FLD_SET(CRY_KERNEL, DSCRPTR_QUEUE_WORD4, CIPHER_MODE, 
(pDesc)->word[4], (cipherMode));   \
@@ -434,7 +434,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param cipherConfig Any one of the modes defined in [CC7x-DESC]
-*/
+ */
 #define HW_DESC_SET_CIPHER_CONFIG0(pDesc, cipherConfig)
\
do {
\
CC_REG_FLD_SET(CRY_KERNEL, DSCRPTR_QUEUE_WORD4, CIPHER_CONF0, 
(pDesc)->word[4], (cipherConfig));\
@@ -445,7 +445,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param cipherConfig Any one of the modes defined in [CC7x-DESC]
-*/
+ */
 #define HW_DESC_SET_CIPHER_CONFIG1(pDesc, cipherConfig)
\
do {
\
CC_REG_FLD_SET(CRY_KERNEL, DSCRPTR_QUEUE_WORD4, CIPHER_CONF1, 
(pDesc)->word[4], (cipherConfig));\
@@ -456,7 +456,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param hwKey The hw key number as in enun HwCryptoKey
-*/
+ */
 #define HW_DESC_SET_HW_CRYPTO_KEY(pDesc, hwKey)
\
do {
\
CC_REG_FLD_SET(CRY_KERNEL, DSCRPTR_QUEUE_WORD4, CIPHER_DO, 
(pDesc)->word[4], (hwKey) & HW_KEY_MASK_CIPHER_DO);  \
@@ -468,7 +468,7 @@ enum cc_hw_des_key_size {
  *
  * \param pDesc pointer HW descriptor struct
  * \param swapConfig Any one of the modes defined in [CC7x-DESC]
-*/
+ */
 #define HW_DESC_SET_BYTES_SWAP(pDesc, swapConfig)  
\
do {
\
CC_REG_FLD_SET(CRY_KERNEL, 

[PATCH V2 27/27] Drivers: ccree: cc_crypto_ctx.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/cc_crypto_ctx.h | 17 ++---
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index ac39d349060d..191f92f0ef22 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -219,7 +219,8 @@ struct drv_ctx_hash {
 };
 
 /*  drv_ctx_hmac should have the same structure as drv_ctx_hash except
-   k0, k0_size fields */
+ *  k0, k0_size fields
+ */
 struct drv_ctx_hmac {
enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */
enum drv_hash_mode mode;
@@ -240,9 +241,10 @@ struct drv_ctx_cipher {
u32 key_size; /* numeric value in bytes   */
u32 data_unit_size; /* required for XTS */
/* block_state is the AES engine block state.
-   *  It is used by the host to pass IV or counter at initialization.
-   *  It is used by SeP for intermediate block chaining state and for
-   *  returning MAC algorithms results.   */
+*  It is used by the host to pass IV or counter at initialization.
+*  It is used by SeP for intermediate block chaining state and for
+*  returning MAC algorithms results.
+ */
u8 block_state[CC_AES_BLOCK_SIZE];
u8 key[CC_AES_KEY_SIZE_MAX];
u8 xex_key[CC_AES_KEY_SIZE_MAX];
@@ -279,9 +281,10 @@ struct drv_ctx_aead {
 
 
 /* Get the address of a @member within a given @ctx address
-   @ctx: The context address
-   @type: Type of context structure
-   @member: Associated context field */
+ *  @ctx: The context address
+ *  @type: Type of context structure
+ *  @member: Associated context field
+ */
 #define GET_CTX_FIELD_ADDR(ctx, type, member) (ctx + offsetof(type, member))
 
 #endif /* _CC_CRYPTO_CTX_H_ */
-- 
2.13.0

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[PATCH V2 25/27] Drivers: ccree: cc_regs.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/cc_regs.h | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index 8b89f0603f16..51b01609838e 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -55,8 +55,9 @@ do {  
\
BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
 CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
 
-/* yael TBD !!! -*
-* all HW includes should start with CC_ and not DX_ !!   */
+/* yael TBD !!!
+ * all HW includes should start with CC_ and not DX_ !!
+ */
 
 
 /*! Bit fields set */
@@ -86,10 +87,10 @@ do {
 \
 } while (0)
 
 /* Usage example:
-   u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
-   CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
-   CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
-   WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
+ * u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
+ * CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
+ * WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
  */
 
 #endif /*_CC_REGS_H_*/
-- 
2.13.0

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[PATCH V2 24/27] Drivers: ccree: hash_defs.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/hash_defs.h | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/ccree/hash_defs.h 
b/drivers/staging/ccree/hash_defs.h
index 613897038f6d..3f2b2d1521c2 100644
--- a/drivers/staging/ccree/hash_defs.h
+++ b/drivers/staging/ccree/hash_defs.h
@@ -59,13 +59,14 @@ enum HashCipherDoPadding {
 
 typedef struct SepHashPrivateContext {
/* The current length is placed at the end of the context buffer 
because the hash
-  context is used for all HMAC operations as well. HMAC context 
includes a 64 bytes
-  K0 field.  The size of struct drv_ctx_hash reserved field is  88/184 
bytes depend if t
-  he SHA512 is supported ( in this case teh context size is 256 bytes).
-  The size of struct drv_ctx_hash reseved field is 20 or 52 depend if 
the SHA512 is supported.
-  This means that this structure size (without the reserved field can 
be up to 20 bytes ,
-  in case sha512 is not suppported it is 20 bytes 
(SEP_HASH_LENGTH_WORDS define to 2 ) and in the other
-  case it is 28 (SEP_HASH_LENGTH_WORDS define to 4) */
+*  context is used for all HMAC operations as well. HMAC context 
includes a 64 bytes
+*  K0 field.  The size of struct drv_ctx_hash reserved field is  
88/184 bytes depend if t
+*  he SHA512 is supported ( in this case teh context size is 256 
bytes).
+*  The size of struct drv_ctx_hash reseved field is 20 or 52 depend if 
the SHA512 is supported.
+*  This means that this structure size (without the reserved field can 
be up to 20 bytes ,
+*  in case sha512 is not suppported it is 20 bytes 
(SEP_HASH_LENGTH_WORDS define to 2 ) and in the other
+* case it is 28 (SEP_HASH_LENGTH_WORDS define to 4)
+*/
u32 reserved[(sizeof(struct drv_ctx_hash)/sizeof(u32)) - 
SEP_HASH_LENGTH_WORDS - 3];
u32 CurrentDigestedLength[SEP_HASH_LENGTH_WORDS];
u32 KeyType;
-- 
2.13.0

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[PATCH V2 23/27] Drivers: ccree: ssi_aead.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_aead.c | 45 ++--
 1 file changed, 29 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 26afa8794668..ecf9ff2ae336 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -250,7 +250,8 @@ static void ssi_aead_complete(struct device *dev, void 
*ssi_req, void __iomem *c
"(auth-size=%d, cipher=%d).\n",
ctx->authsize, ctx->cipher_mode);
/* In case of payload authentication failure, MUST NOT
-  revealed the decrypted message --> zero its memory. 
*/
+* revealed the decrypted message --> zero its memory.
+*/
ssi_buffer_mgr_zero_sgl(areq->dst, areq_ctx->cryptlen);
err = -EBADMSG;
}
@@ -279,7 +280,8 @@ static int xcbc_setkey(struct cc_hw_desc *desc, struct 
ssi_aead_ctx *ctx)
/* Load the AES key */
HW_DESC_INIT([0]);
/* We are using for the source/user key the same buffer as for the 
output keys,
-  because after this key loading it is not needed anymore */
+* because after this key loading it is not needed anymore
+*/
HW_DESC_SET_DIN_TYPE([0], DMA_DLLI, 
ctx->auth_state.xcbc.xcbc_keys_dma_addr, ctx->auth_keylen, NS_BIT);
HW_DESC_SET_CIPHER_MODE([0], DRV_CIPHER_ECB);
HW_DESC_SET_CIPHER_CONFIG0([0], DRV_CRYPTO_DIRECTION_ENCRYPT);
@@ -420,8 +422,9 @@ static int validate_keys_sizes(struct ssi_aead_ctx *ctx)
 
return 0; /* All tests of keys sizes passed */
 }
-/*This function prepers the user key so it can pass to the hmac processing
-  (copy to intenral buffer or hash in case of key longer than block */
+/* This function prepers the user key so it can pass to the hmac processing
+ * (copy to intenral buffer or hash in case of key longer than block
+ */
 static int
 ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int 
keylen)
 {
@@ -600,7 +603,8 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
(AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE))
goto badkey;
/* Copy nonce from last 4 bytes in CTR key to
-   *  first 4 bytes in CTR IV */
+*  first 4 bytes in CTR IV
+*/
memcpy(ctx->ctr_nonce, key + ctx->auth_keylen + 
ctx->enc_keylen -
CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_NONCE_SIZE);
/* Set CTR key size */
@@ -829,7 +833,8 @@ ssi_aead_process_authenc_data_desc(
{
/* DOUBLE-PASS flow (as default)
 * assoc. + iv + data -compact in one table
-* if assoclen is ZERO only IV perform */
+* if assoclen is ZERO only IV perform
+*/
ssi_sram_addr_t mlli_addr = areq_ctx->assoc.sram_addr;
u32 mlli_nents = areq_ctx->assoc.mlli_nents;
 
@@ -1287,7 +1292,8 @@ static inline void ssi_aead_hmac_authenc(
/**
 * Double-pass flow
 * Fallback for unsupported single-pass modes,
-* i.e. using assoc. data of non-word-multiple */
+* i.e. using assoc. data of non-word-multiple
+*/
if (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) {
/* encrypt first.. */
ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode);
@@ -1305,7 +1311,8 @@ static inline void ssi_aead_hmac_authenc(
/* decrypt after.. */
ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode);
/* read the digest result with setting the completion bit
-  must be after the cipher operation */
+* must be after the cipher operation
+*/
ssi_aead_process_digest_result_desc(req, desc, seq_size);
}
 }
@@ -1338,7 +1345,8 @@ ssi_aead_xcbc_authenc(
/**
 * Double-pass flow
 * Fallback for unsupported single-pass modes,
-* i.e. using assoc. data of non-word-multiple */
+* i.e. using assoc. data of non-word-multiple
+*/
if (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) {
/* encrypt first.. */
ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode);
@@ -1353,7 +1361,8 @@ ssi_aead_xcbc_authenc(
/* decrypt after..*/
ssi_aead_process_cipher(req, desc, seq_size, data_flow_mode);
/* read the digest result with setting the completion bit
-  must be after the cipher operation */
+ 

[PATCH V2 22/27] Drivers: ccree: ssi_aead.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_aead.h | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h
index 654a181729d7..00a3680cb8ab 100644
--- a/drivers/staging/ccree/ssi_aead.h
+++ b/drivers/staging/ccree/ssi_aead.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_aead.h
-   ARM CryptoCell AEAD Crypto API
+ * ARM CryptoCell AEAD Crypto API
  */
 
 #ifndef __SSI_AEAD_H__
@@ -62,8 +62,9 @@ enum aead_ccm_header_size {
 
 struct aead_req_ctx {
/* Allocate cache line although only 4 bytes are needed to
-   *  assure next field falls @ cache line
-   *  Used for both: digest HW compare and CCM/GCM MAC value */
+*  assure next field falls @ cache line
+*  Used for both: digest HW compare and CCM/GCM MAC value
+*/
u8 mac_buf[MAX_MAC_SIZE] cacheline_aligned;
u8 ctr_iv[AES_BLOCK_SIZE] cacheline_aligned;
 
-- 
2.13.0

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[PATCH V2 21/27] Drivers: ccree: ssi_buffer_mgr.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 87 +++---
 1 file changed, 49 insertions(+), 38 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 04515e70d2d3..edb88441e90d 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -330,7 +330,8 @@ static int ssi_buffer_mgr_generate_mlli(
/* set last bit in the current table */
if (sg_data->mlli_nents[i] != NULL) {
/*Calculate the current MLLI table length for the
-   length field in the descriptor*/
+*length field in the descriptor
+*/
*(sg_data->mlli_nents[i]) +=
(total_nents - prev_total_nents);
prev_total_nents = total_nents;
@@ -463,7 +464,8 @@ static int ssi_buffer_mgr_map_scatterlist(
}
if (!is_chained) {
/* In case of mmu the number of mapped nents might
-   be changed from the original sgl nents */
+* be changed from the original sgl nents
+*/
*mapped_nents = dma_map_sg(dev, sg, *nents, direction);
if (unlikely(*mapped_nents == 0)){
*nents = 0;
@@ -472,7 +474,8 @@ static int ssi_buffer_mgr_map_scatterlist(
}
} else {
/*In this case the driver maps entry by entry so it
-   must have the same nents before and after map */
+* must have the same nents before and after map
+*/
*mapped_nents = ssi_buffer_mgr_dma_map_sg(dev,
 sg,
 *nents,
@@ -764,7 +767,8 @@ void ssi_buffer_mgr_unmap_aead_request(
}
 
/*In case a pool was set, a table was
- allocated and should be released */
+*allocated and should be released
+*/
if (areq_ctx->mlli_params.curr_pool != NULL) {
SSI_LOG_DEBUG("free MLLI buffer: dma=0x%08llX virt=%pK\n",
(unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
@@ -801,7 +805,8 @@ void ssi_buffer_mgr_unmap_aead_request(
size_to_skip += crypto_aead_ivsize(tfm);
}
/* copy mac to a temporary location to deal with possible
- data memory overriding that caused by cache coherence 
problem. */
+* data memory overriding that caused by cache coherence 
problem.
+*/
ssi_buffer_mgr_copy_scatterlist_portion(
areq_ctx->backup_mac, req->src,
size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
@@ -965,7 +970,8 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
areq_ctx->assoc.nents = mapped_nents;
 
/* in CCM case we have additional entry for
-   *  ccm header configurations */
+* ccm header configurations
+*/
if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
if (unlikely((mapped_nents + 1) >
LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
@@ -1068,13 +1074,15 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
 
if (unlikely(areq_ctx->is_icv_fragmented == true)) {
/* Backup happens only when ICV is fragmented, ICV
-  verification is made by CPU compare in order to 
simplify
-  MAC verification upon request completion */
+* verification is made by CPU compare in order to 
simplify
+* MAC verification upon request completion
+*/
if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
 #if !DX_HAS_ACP
/* In ACP platform we already copying ICV
-  for any INPLACE-DECRYPT operation, hence
-  we must neglect this code. */
+* for any INPLACE-DECRYPT operation, hence
+* we must neglect this code.
+*/
u32 size_to_skip = req->assoclen;
if (areq_ctx->is_gcm4543) {
size_to_skip += crypto_aead_ivsize(tfm);
@@ -1120,8 +1128,9 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
 
if (unlikely(areq_ctx->is_icv_fragmented 

[PATCH V2 20/27] Drivers: ccree: ssi_buffer_mgr.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_buffer_mgr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.h 
b/drivers/staging/ccree/ssi_buffer_mgr.h
index 4acbb4b6afc9..98355dd789e5 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.h
+++ b/drivers/staging/ccree/ssi_buffer_mgr.h
@@ -15,7 +15,7 @@
  */
 
 /* \file buffer_mgr.h
-   Buffer Manager
+ * Buffer Manager
  */
 
 #ifndef __SSI_BUFFER_MGR_H__
-- 
2.13.0

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[PATCH V2 19/27] Drivers: ccree: ssi_cipher.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_cipher.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_cipher.h 
b/drivers/staging/ccree/ssi_cipher.h
index 7d58b56fc2c7..22d7b431edb9 100644
--- a/drivers/staging/ccree/ssi_cipher.h
+++ b/drivers/staging/ccree/ssi_cipher.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_cipher.h
-   ARM CryptoCell Cipher Crypto API
+ * ARM CryptoCell Cipher Crypto API
  */
 
 #ifndef __SSI_CIPHER_H__
-- 
2.13.0

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[PATCH V2 18/27] Drivers: ccree: ssi_config.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_config.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_config.h 
b/drivers/staging/ccree/ssi_config.h
index 431b518d893a..9feb692fff0d 100644
--- a/drivers/staging/ccree/ssi_config.h
+++ b/drivers/staging/ccree/ssi_config.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_config.h
-   Definitions for ARM CryptoCell Linux Crypto Driver
+ * Definitions for ARM CryptoCell Linux Crypto Driver
  */
 
 #ifndef __SSI_CONFIG_H__
@@ -49,7 +49,8 @@
#define SSI_CACHE_PARAMS (0x000)
/* CC attached to NONE-ACP such as HPP/ACE/AMBA4.
 * The customer is responsible to enable/disable this feature
-* according to his platform type. */
+* according to his platform type.
+*/
#define DX_HAS_ACP 0
 #else
#define SSI_CACHE_PARAMS (0xEEE)
-- 
2.13.0

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[PATCH V2 17/27] Drivers: ccree: ssi_driver.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_driver.h | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index 45fc23fe169f..e034b0987137 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_driver.h
-   ARM CryptoCell Linux Crypto Driver
+ * ARM CryptoCell Linux Crypto Driver
  */
 
 #ifndef __SSI_DRIVER_H__
@@ -86,7 +86,8 @@
 #define NS_BIT 1
 #define AXI_ID 0
 /* AXI_ID is not actually the AXI ID of the transaction but the value of AXI_ID
-   field in the HW descriptor. The DMA engine +8 that value. */
+ * field in the HW descriptor. The DMA engine +8 that value.
+ */
 
 /* Logging macros */
 #define SSI_LOG(level, format, ...) \
@@ -108,9 +109,11 @@
 struct ssi_crypto_req {
void (*user_cb)(struct device *dev, void *req, void __iomem *cc_base);
void *user_arg;
-   dma_addr_t ivgen_dma_addr[SSI_MAX_IVGEN_DMA_ADDRESSES]; /* For the 
first 'ivgen_dma_addr_len' addresses of this array,
-generated IV would be placed in it by 
send_request().
-Same generated IV for all addresses! */
+   dma_addr_t ivgen_dma_addr[SSI_MAX_IVGEN_DMA_ADDRESSES];
+   /* For the first 'ivgen_dma_addr_len' addresses of this array,
+* generated IV would be placed in it by send_request().
+* Same generated IV for all addresses!
+*/
unsigned int ivgen_dma_addr_len; /* Amount of 'ivgen_dma_addr' elements 
to be filled. */
unsigned int ivgen_size; /* The generated IV size required, 8/16 B 
allowed. */
struct completion seq_compl; /* request completion */
@@ -136,7 +139,8 @@ struct ssi_drvdata {
u32 irq_mask;
u32 fw_ver;
/* Calibration time of start/stop
-   *  monitor descriptors */
+* monitor descriptors
+*/
u32 monitor_null_cycles;
struct platform_device *plat_dev;
ssi_sram_addr_t mlli_sram_addr;
-- 
2.13.0

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[PATCH V2 16/27] Drivers: ccree: ssi_fips.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_fips.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index 25ee23a1cecf..60a2452f7b0b 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -16,8 +16,8 @@
 
 
 /**
-This file defines the driver FIPS APIs 
*
-***/
+ * This file defines the driver FIPS APIs *
+ **/
 
 #include 
 #include "ssi_fips.h"
@@ -27,9 +27,9 @@ extern int ssi_fips_ext_get_state(ssi_fips_state_t *p_state);
 extern int ssi_fips_ext_get_error(ssi_fips_error_t *p_err);
 
 /*
-This function returns the REE FIPS state.
-It should be called by kernel module.
-*/
+ * This function returns the REE FIPS state.
+ * It should be called by kernel module.
+ */
 int ssi_fips_get_state(ssi_fips_state_t *p_state)
 {
int rc = 0;
@@ -46,9 +46,9 @@ int ssi_fips_get_state(ssi_fips_state_t *p_state)
 EXPORT_SYMBOL(ssi_fips_get_state);
 
 /*
-This function returns the REE FIPS error.
-It should be called by kernel module.
-*/
+ * This function returns the REE FIPS error.
+ * It should be called by kernel module.
+ */
 int ssi_fips_get_error(ssi_fips_error_t *p_err)
 {
int rc = 0;
-- 
2.13.0

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[PATCH V2 14/27] Drivers: ccree: ssi_fips_data.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_fips_data.h | 93 +--
 1 file changed, 46 insertions(+), 47 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips_data.h 
b/drivers/staging/ccree/ssi_fips_data.h
index a4b78f1b4d48..fa6bf41c27e5 100644
--- a/drivers/staging/ccree/ssi_fips_data.h
+++ b/drivers/staging/ccree/ssi_fips_data.h
@@ -15,53 +15,52 @@
  */
 
 /*
-The test vectors were taken from:
-
-* AES
-NIST Special Publication 800-38A 2001 Edition
-Recommendation for Block Cipher Modes of Operation
-http://csrc.nist.gov/publications/nistpubs/800-38a/sp800-38a.pdf
-Appendix F: Example Vectors for Modes of Operation of the AES
-
-* AES CTS
-Advanced Encryption Standard (AES) Encryption for Kerberos 5
-February 2005
-https://tools.ietf.org/html/rfc3962#appendix-B
-B.  Sample Test Vectors
-
-* AES XTS
-http://csrc.nist.gov/groups/STM/cavp/#08
-http://csrc.nist.gov/groups/STM/cavp/documents/aes/XTSTestVectors.zip
-
-* AES CMAC
-http://csrc.nist.gov/groups/STM/cavp/index.html#07
-http://csrc.nist.gov/groups/STM/cavp/documents/mac/cmactestvectors.zip
-
-* AES-CCM
-http://csrc.nist.gov/groups/STM/cavp/#07
-http://csrc.nist.gov/groups/STM/cavp/documents/mac/ccmtestvectors.zip
-
-* AES-GCM
-http://csrc.nist.gov/groups/STM/cavp/documents/mac/gcmtestvectors.zip
-
-* Triple-DES
-NIST Special Publication 800-67 January 2012
-Recommendation for the Triple Data Encryption Algorithm (TDEA) Block Cipher
-http://csrc.nist.gov/publications/nistpubs/800-67-Rev1/SP-800-67-Rev1.pdf
-APPENDIX B: EXAMPLE OF TDEA FORWARD AND INVERSE CIPHER OPERATIONS
-and
-http://csrc.nist.gov/groups/STM/cavp/#01
-http://csrc.nist.gov/groups/STM/cavp/documents/des/tdesmct_intermediate.zip
-
-* HASH
-http://csrc.nist.gov/groups/STM/cavp/#03
-http://csrc.nist.gov/groups/STM/cavp/documents/shs/shabytetestvectors.zip
-
-* HMAC
-http://csrc.nist.gov/groups/STM/cavp/#07
-http://csrc.nist.gov/groups/STM/cavp/documents/mac/hmactestvectors.zip
-
-*/
+ * The test vectors were taken from:
+ *
+ * * AES
+ * NIST Special Publication 800-38A 2001 Edition
+ * Recommendation for Block Cipher Modes of Operation
+ * http://csrc.nist.gov/publications/nistpubs/800-38a/sp800-38a.pdf
+ * Appendix F: Example Vectors for Modes of Operation of the AES
+ *
+ * * AES CTS
+ * Advanced Encryption Standard (AES) Encryption for Kerberos 5
+ * February 2005
+ * https://tools.ietf.org/html/rfc3962#appendix-B
+ * B.  Sample Test Vectors
+ *
+ * * AES XTS
+ * http://csrc.nist.gov/groups/STM/cavp/#08
+ * http://csrc.nist.gov/groups/STM/cavp/documents/aes/XTSTestVectors.zip
+ *
+ * * AES CMAC
+ * http://csrc.nist.gov/groups/STM/cavp/index.html#07
+ * http://csrc.nist.gov/groups/STM/cavp/documents/mac/cmactestvectors.zip
+ *
+ * * AES-CCM
+ * http://csrc.nist.gov/groups/STM/cavp/#07
+ * http://csrc.nist.gov/groups/STM/cavp/documents/mac/ccmtestvectors.zip
+ *
+ * * AES-GCM
+ * http://csrc.nist.gov/groups/STM/cavp/documents/mac/gcmtestvectors.zip
+ *
+ * * Triple-DES
+ * NIST Special Publication 800-67 January 2012
+ * Recommendation for the Triple Data Encryption Algorithm (TDEA) Block Cipher
+ * http://csrc.nist.gov/publications/nistpubs/800-67-Rev1/SP-800-67-Rev1.pdf
+ * APPENDIX B: EXAMPLE OF TDEA FORWARD AND INVERSE CIPHER OPERATIONS
+ * and
+ * http://csrc.nist.gov/groups/STM/cavp/#01
+ * http://csrc.nist.gov/groups/STM/cavp/documents/des/tdesmct_intermediate.zip
+ *
+ * * HASH
+ * http://csrc.nist.gov/groups/STM/cavp/#03
+ * http://csrc.nist.gov/groups/STM/cavp/documents/shs/shabytetestvectors.zip
+ *
+ * * HMAC
+ * http://csrc.nist.gov/groups/STM/cavp/#07
+ * http://csrc.nist.gov/groups/STM/cavp/documents/mac/hmactestvectors.zip
+ */
 
 /* NIST AES */
 #define AES_128_BIT_KEY_SIZE16
-- 
2.13.0

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[PATCH V2 15/27] Drivers: ccree: ssi_fips.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_fips.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h
index 607c64b8c458..e108d89ef98c 100644
--- a/drivers/staging/ccree/ssi_fips.h
+++ b/drivers/staging/ccree/ssi_fips.h
@@ -18,9 +18,9 @@
 #define __SSI_FIPS_H__
 
 /*!
-@file
-@brief This file contains FIPS related defintions and APIs.
-*/
+ * @file
+ * @brief This file contains FIPS related defintions and APIs.
+ */
 
 typedef enum ssi_fips_state {
 CC_FIPS_STATE_NOT_SUPPORTED = 0,
-- 
2.13.0

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[PATCH V2 13/27] Drivers: ccree: ssi_fips_ext.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_fips_ext.c | 46 ++--
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips_ext.c 
b/drivers/staging/ccree/ssi_fips_ext.c
index 291a880f567c..0f53a4bc43de 100644
--- a/drivers/staging/ccree/ssi_fips_ext.c
+++ b/drivers/staging/ccree/ssi_fips_ext.c
@@ -15,9 +15,9 @@
  */
 
 /**
-This file defines the driver FIPS functions that should be
-implemented by the driver user. Current implementation is sample code only.
-***/
+ * This file defines the driver FIPS functions that should be
+ * implemented by the driver user. Current implementation is sample code only.
+ ***/
 
 #include 
 #include "ssi_fips_local.h"
@@ -32,11 +32,11 @@ static ssi_fips_state_t fips_state = 
CC_FIPS_STATE_NOT_SUPPORTED;
 static ssi_fips_error_t fips_error = CC_REE_FIPS_ERROR_OK;
 
 /*
-This function returns the FIPS REE state.
-The function should be implemented by the driver user, depends on where
  .
-the state value is stored.
-The reference code uses global variable.
-*/
+ * This function returns the FIPS REE state.
+ * The function should be implemented by the driver user, depends on where
+ * the state value is stored.
+ * The reference code uses global variable.
+ */
 int ssi_fips_ext_get_state(ssi_fips_state_t *p_state)
 {
 int rc = 0;
@@ -51,11 +51,11 @@ int ssi_fips_ext_get_state(ssi_fips_state_t *p_state)
 }
 
 /*
-This function returns the FIPS REE error.
-The function should be implemented by the driver user, depends on where
  .
-the error value is stored.
-The reference code uses global variable.
-*/
+ * This function returns the FIPS REE error.
+ * The function should be implemented by the driver user, depends on where
+ * the error value is stored.
+ * The reference code uses global variable.
+ */
 int ssi_fips_ext_get_error(ssi_fips_error_t *p_err)
 {
 int rc = 0;
@@ -70,11 +70,11 @@ int ssi_fips_ext_get_error(ssi_fips_error_t *p_err)
 }
 
 /*
-This function sets the FIPS REE state.
-The function should be implemented by the driver user, depends on where
  .
-the state value is stored.
-The reference code uses global variable.
-*/
+ * This function sets the FIPS REE state.
+ * The function should be implemented by the driver user, depends on where
+ * the state value is stored.
+ * The reference code uses global variable.
+ */
 int ssi_fips_ext_set_state(ssi_fips_state_t state)
 {
fips_state = state;
@@ -82,11 +82,11 @@ int ssi_fips_ext_set_state(ssi_fips_state_t state)
 }
 
 /*
-This function sets the FIPS REE error.
-The function should be implemented by the driver user, depends on where
  .
-the error value is stored.
-The reference code uses global variable.
-*/
+ * This function sets the FIPS REE error.
+ * The function should be implemented by the driver user, depends on where
+ * the error value is stored.
+ * The reference code uses global variable.
+ */
 int ssi_fips_ext_set_error(ssi_fips_error_t err)
 {
fips_error = err;
-- 
2.13.0

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[PATCH V2 12/27] Drivers: ccree: ssi_fips_ll.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_fips_ll.c | 21 -
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips_ll.c 
b/drivers/staging/ccree/ssi_fips_ll.c
index 7c7c922f0788..ef0a9a580560 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -15,9 +15,9 @@
  */
 
 /**
-This file defines the driver FIPS Low Level implmentaion functions,
-that executes the KAT.
-***/
+ * This file defines the driver FIPS Low Level implmentaion functions,
+ * that executes the KAT.
+ ***/
 #include 
 
 #include "ssi_driver.h"
@@ -816,7 +816,8 @@ ssi_hmac_fips_run_test(struct ssi_drvdata *drvdata,
   dma_addr_t digest_bytes_len_dma_addr)
 {
/* The implemented flow is not the same as the one implemented in 
ssi_hash.c (setkey + digest flows).
-  In this flow, there is no need to store and reload some of the 
intermidiate results. */
+* In this flow, there is no need to store and reload some of the 
intermidiate results.
+*/
 
/* max number of descriptors used for the flow */
#define FIPS_HMAC_MAX_SEQ_LEN 12
@@ -948,9 +949,9 @@ ssi_hmac_fips_run_test(struct ssi_drvdata *drvdata,
idx++;
 
/* at this point:
-  tmp_digest = H(o_key_pad)
-  k0 = H(i_key_pad || m)
-  */
+* tmp_digest = H(o_key_pad)
+* k0 = H(i_key_pad || m)
+*/
 
/* Loading hash opad xor key state */
HW_DESC_INIT([idx]);
@@ -1413,8 +1414,10 @@ ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
idx++;
 
/* Configure Hash Engine to work with GHASH.
-  Since it was not possible to extend HASH submodes to add GHASH,
-  The following command is necessary in order to select GHASH 
(according to HW designers)*/
+* Since it was not possible to extend HASH submodes to add GHASH,
+* The following command is necessary in order to
+* select GHASH (according to HW designers)
+*/
HW_DESC_INIT([idx]);
HW_DESC_SET_DIN_NO_DMA([idx], 0, 0xf0);
HW_DESC_SET_DOUT_NO_DMA([idx], 0, 0, 1);
-- 
2.13.0

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[PATCH V2 11/27] Drivers: ccree: ssi_fips_local.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_fips_local.c | 21 -
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips_local.c 
b/drivers/staging/ccree/ssi_fips_local.c
index 316507d88b4e..8076c771f750 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -15,8 +15,8 @@
  */
 
 /**
-This file defines the driver FIPS internal function, used by the driver itself.
-***/
+ * This file defines the driver FIPS internal function, used by the driver 
itself.
+ ***/
 #include 
 #include 
 #include 
@@ -80,10 +80,10 @@ static enum ssi_fips_error ssi_fips_get_tee_error(struct 
ssi_drvdata *drvdata)
 
 
 /*
- This function should push the FIPS REE library status towards the TEE library.
- By writing the error state to HOST_GPR0 register. The function is called from 
.
- driver entry point so no need to protect by mutex.
-*/
+ * This function should push the FIPS REE library status towards the TEE 
library.
+ * By writing the error state to HOST_GPR0 register. The function is called 
from
+ * driver entry point so no need to protect by mutex.
+ */
 static void ssi_fips_update_tee_upon_ree_status(struct ssi_drvdata *drvdata, 
ssi_fips_error_t err)
 {
void __iomem *cc_base = drvdata->cc_base;
@@ -232,7 +232,8 @@ ssi_fips_error_t cc_fips_run_power_up_tests(struct 
ssi_drvdata *drvdata)
 
 
 /* The function checks if FIPS supported and FIPS error exists.*
-*  It should be used in every driver API.*/
+ * It should be used in every driver API.
+ */
 int ssi_fips_check_fips_error(void)
 {
ssi_fips_state_t fips_state;
@@ -250,14 +251,16 @@ int ssi_fips_check_fips_error(void)
 
 
 /* The function sets the REE FIPS state.*
-*  It should be used while driver is being loaded .*/
+ * It should be used while driver is being loaded.
+ */
 int ssi_fips_set_state(ssi_fips_state_t state)
 {
return ssi_fips_ext_set_state(state);
 }
 
 /* The function sets the REE FIPS error, and pushes the error to TEE library. *
-*  It should be used when any of the KAT tests fails .*/
+ * It should be used when any of the KAT tests fails.
+ */
 int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, ssi_fips_error_t err)
 {
int rc = 0;
-- 
2.13.0

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[PATCH V2 08/27] Drivers: ccree: ssi_ivgen.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_ivgen.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_ivgen.c 
b/drivers/staging/ccree/ssi_ivgen.c
index 1bb6f8919101..db4b831e82a3 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -26,7 +26,8 @@
 /* The max. size of pool *MUST* be <= SRAM total size */
 #define SSI_IVPOOL_SIZE 1024
 /* The first 32B fraction of pool are dedicated to the
-   next encryption "key" & "IV" for pool regeneration */
+ * next encryption "key" & "IV" for pool regeneration
+ */
 #define SSI_IVPOOL_META_SIZE (CC_AES_IV_SIZE + AES_KEYSIZE_128)
 #define SSI_IVPOOL_GEN_SEQ_LEN 4
 
@@ -278,7 +279,8 @@ int ssi_ivgen_getiv(
}
 
/* Bypass operation is proceeded by crypto sequence, hence must
-   *  assure bypass-write-transaction by a memory barrier */
+*  assure bypass-write-transaction by a memory barrier
+*/
HW_DESC_INIT(_seq[idx]);
HW_DESC_SET_DIN_NO_DMA(_seq[idx], 0, 0xf0);
HW_DESC_SET_DOUT_NO_DMA(_seq[idx], 0, 0, 1);
-- 
2.13.0

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[PATCH V2 10/27] Drivers: ccree: ssi_hash.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_hash.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 8585f73161b3..da5915e4ce48 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -97,7 +97,8 @@ struct hash_key_req_ctx {
 struct ssi_hash_ctx {
struct ssi_drvdata *drvdata;
/* holds the origin digest; the digest after "setkey" if HMAC,*
-  the initial digest if HASH. */
+* the initial digest if HASH.
+*/
u8 digest_buff[SSI_MAX_HASH_DIGEST_SIZE]  cacheline_aligned;
u8 opad_tmp_keys_buff[SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE]  
cacheline_aligned;
dma_addr_t opad_tmp_keys_dma_addr  cacheline_aligned;
@@ -250,7 +251,8 @@ static int ssi_hash_map_request(struct device *dev,
}
} else { /*hash*/
/* Copy the initial digests if hash flow. The SRAM contains the
-   initial digests in the expected order for all SHA* */
+* initial digests in the expected order for all SHA*
+*/
HW_DESC_INIT();
HW_DESC_SET_DIN_SRAM(, larval_digest_addr, 
ctx->inter_digestsize);
HW_DESC_SET_DOUT_DLLI(, state->digest_buff_dma_addr, 
ctx->inter_digestsize, NS_BIT, 0);
@@ -1027,7 +1029,8 @@ static int ssi_hash_setkey(void *hash,
ctx->drvdata, ctx->hash_mode);
 
/* The keylen value distinguishes HASH in case keylen is ZERO bytes,
-  any NON-ZERO value utilizes HMAC flow */
+* any NON-ZERO value utilizes HMAC flow
+*/
ctx->key_params.keylen = keylen;
ctx->key_params.key_dma_addr = 0;
ctx->is_hmac = true;
-- 
2.13.0

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[PATCH V2 09/27] Drivers: ccree: ssi_hash.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_hash.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h
index b821d0c854b5..7c946614a1f9 100644
--- a/drivers/staging/ccree/ssi_hash.h
+++ b/drivers/staging/ccree/ssi_hash.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_hash.h
-   ARM CryptoCell Hash Crypto API
+ * ARM CryptoCell Hash Crypto API
  */
 
 #ifndef __SSI_HASH_H__
-- 
2.13.0

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[PATCH V2 07/27] Drivers: ccree: ssi_pm.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_pm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h
index f1fe1777c04a..8b0d8be95199 100644
--- a/drivers/staging/ccree/ssi_pm.h
+++ b/drivers/staging/ccree/ssi_pm.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_pm.h
-*/
+ */
 
 #ifndef __SSI_POWER_MGR_H__
 #define __SSI_POWER_MGR_H__
-- 
2.13.0

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[PATCH V2 05/27] Drivers: ccree: ssi_pm_ext.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_pm_ext.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_pm_ext.h 
b/drivers/staging/ccree/ssi_pm_ext.h
index 9049e6ffa8d3..dbe658b530bf 100644
--- a/drivers/staging/ccree/ssi_pm_ext.h
+++ b/drivers/staging/ccree/ssi_pm_ext.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_pm_ext.h
-*/
+ */
 
 #ifndef __PM_EXT_H__
 #define __PM_EXT_H__
-- 
2.13.0

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[PATCH V2 06/27] Drivers: ccree: ssi_pm_ext.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_pm_ext.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/ccree/ssi_pm_ext.c 
b/drivers/staging/ccree/ssi_pm_ext.c
index 5889d9f97479..453151cdd6b2 100644
--- a/drivers/staging/ccree/ssi_pm_ext.c
+++ b/drivers/staging/ccree/ssi_pm_ext.c
@@ -26,10 +26,10 @@
 #include "ssi_pm_ext.h"
 
 /*
-This function should suspend the HW (if possiable), It should be implemented by
-the driver user.
-The reference code clears the internal SRAM to imitate lose of state.
-*/
+ * This function should suspend the HW (if possiable), It should be 
implemented by
+ * the driver user.
+ * The reference code clears the internal SRAM to imitate lose of state.
+ */
 void ssi_pm_ext_hw_suspend(struct device *dev)
 {
struct ssi_drvdata *drvdata =
@@ -50,9 +50,9 @@ void ssi_pm_ext_hw_suspend(struct device *dev)
 }
 
 /*
-This function should resume the HW (if possiable).It should be implemented by
-the driver user.
-*/
+ * This function should resume the HW (if possiable).It should be implemented 
by
+ * the driver user.
+ */
 void ssi_pm_ext_hw_resume(struct device *dev)
 {
return;
-- 
2.13.0

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[PATCH V2 04/27] Drivers: ccree: ssi_request_mgr.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_request_mgr.c | 37 -
 1 file changed, 22 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index 48c2450d65c6..1bc6811d63c5 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -300,8 +300,9 @@ static inline int request_mgr_queues_status_check(
unsigned long poll_queue;
 
/* SW queue is checked only once as it will not
-  be chaned during the poll becasue the spinlock_bh
-  is held by the thread */
+* be chaned during the poll becasue the spinlock_bh
+* is held by the thread
+*/
if (unlikely(((req_mgr_h->req_queue_head + 1) &
  (MAX_REQUEST_QUEUE_SIZE - 1)) ==
 req_mgr_h->req_queue_tail)) {
@@ -384,8 +385,9 @@ int send_request(
spin_lock_bh(_mgr_h->hw_lock);
 
/* Check if there is enough place in the SW/HW queues
-   in case iv gen add the max size and in case of no dout add 1
-   for the internal completion descriptor */
+* in case iv gen add the max size and in case of no dout add 1
+* for the internal completion descriptor
+*/
rc = request_mgr_queues_status_check(req_mgr_h,
   cc_base,
   max_required_seq_len);
@@ -397,7 +399,8 @@ int send_request(
 
if (rc != -EAGAIN) {
/* Any error other than HW queue full
-  (SW queue is full) */
+* (SW queue is full)
+*/
 #if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)

ssi_power_mgr_runtime_put_suspend(>plat_dev->dev);
 #endif
@@ -409,7 +412,8 @@ int send_request(
} while (1);
 
/* Additional completion descriptor is needed incase caller did not
-  enabled any DLLI/MLLI DOUT bit in the given sequence */
+* enabled any DLLI/MLLI DOUT bit in the given sequence
+*/
if (!is_dout) {
init_completion(_req->seq_compl);
ssi_req->user_cb = request_mgr_complete;
@@ -481,7 +485,8 @@ int send_request(
 
if (!is_dout) {
/* Wait upon sequence completion.
-   *  Return "0" -Operation done successfully. */
+*  Return "0" -Operation done successfully.
+*/
return wait_for_completion_interruptible(_req->seq_compl);
} else {
/* Operation still in process */
@@ -633,7 +638,8 @@ static void comp_handler(unsigned long devarg)
/* ISR-to-Tasklet latency */
if (request_mgr_handle->axi_completed) {
/* Only if actually reflects ISR-to-completion-handling 
latency, i.e.,
-  not duplicate as a result of interrupt after 
AXIM_MON_ERR clear, before end of loop */
+* not duplicate as a result of interrupt after 
AXIM_MON_ERR clear, before end of loop
+*/
END_CYCLE_COUNT_AT(drvdata->isr_exit_cycles, 
STAT_OP_TYPE_GENERIC, STAT_PHASE_1);
}
 
@@ -641,7 +647,8 @@ static void comp_handler(unsigned long devarg)
do {
proc_completions(drvdata);
/* At this point (after proc_completions()), 
request_mgr_handle->axi_completed is always 0.
-  The following assignment was changed to = 
(previously was +=) to conform KW restrictions. */
+* The following assignment was changed to = 
(previously was +=) to conform KW restrictions.
+*/
request_mgr_handle->axi_completed = 
CC_REG_FLD_GET(CRY_KERNEL, AXIM_MON_COMP, VALUE,

CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
} while (request_mgr_handle->axi_completed > 0);
@@ -663,9 +670,9 @@ static void comp_handler(unsigned long devarg)
 }
 
 /*
-resume the queue configuration - no need to take the lock as this happens 
inside
-the spin lock protection
-*/
+ * resume the queue configuration - no need to take the lock as this happens 
inside
+ * the spin lock protection
+ */
 #if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
 int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata *drvdata)
 {
@@ -679,9 +686,9 @@ int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata 
*drvdata)
 }
 
 /*
-suspend the queue configuration. Since it is used for the runtime suspend
-only verify 

[PATCH V2 03/27] Drivers: ccree: ssi_request_mgr.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_request_mgr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_request_mgr.h 
b/drivers/staging/ccree/ssi_request_mgr.h
index ea685bb7fa2b..c4036ab715f1 100644
--- a/drivers/staging/ccree/ssi_request_mgr.h
+++ b/drivers/staging/ccree/ssi_request_mgr.h
@@ -15,7 +15,7 @@
  */
 
 /* \file request_mgr.h
-   Request Manager
+ * Request Manager
  */
 
 #ifndef __REQUEST_MGR_H__
-- 
2.13.0

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[PATCH V2 01/27] Drivers: ccree: ssi_sysfs.h - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_sysfs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_sysfs.h 
b/drivers/staging/ccree/ssi_sysfs.h
index cd456c5dccc4..4893e014adf7 100644
--- a/drivers/staging/ccree/ssi_sysfs.h
+++ b/drivers/staging/ccree/ssi_sysfs.h
@@ -15,7 +15,7 @@
  */
 
 /* \file ssi_sysfs.h
-   ARM CryptoCell sysfs APIs
+ * ARM CryptoCell sysfs APIs
  */
 
 #ifndef __SSI_SYSFS_H__
-- 
2.13.0

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[PATCH V2 02/27] Drivers: ccree: ssi_sysfs.c - align block comments

[Derek Robson]

Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/ccree/ssi_sysfs.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_sysfs.c 
b/drivers/staging/ccree/ssi_sysfs.c
index 89021c009872..69e1ae491098 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -355,7 +355,8 @@ static struct ssi_drvdata *sys_get_drvdata(void)
 {
/* TODO: supporting multiple SeP devices would require avoiding
 * global "top_dir" and finding associated "top_dir" by traversing
-* up the tree to the kobject which matches one of the top_dir's */
+* up the tree to the kobject which matches one of the top_dir's
+*/
return sys_top_dir.drvdata;
 }
 
-- 
2.13.0

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[PATCH V2 00/27] Drivers: ccree - align block comments

[Derek Robson]

Fixed block comments across whole ccree driver

Version #1 has some trailing white space issue in a few patches


Derek Robson (27):
  Drivers: ccree: ssi_sysfs.h - align block comments
  Drivers: ccree: ssi_sysfs.c - align block comments
  Drivers: ccree: ssi_request_mgr.h - align block comments
  Drivers: ccree: ssi_request_mgr.c - align block comments
  Drivers: ccree: ssi_pm_ext.h - align block comments
  Drivers: ccree: ssi_pm_ext.c - align block comments
  Drivers: ccree: ssi_pm.h - align block comments
  Drivers: ccree: ssi_ivgen.c - align block comments
  Drivers: ccree: ssi_hash.h - align block comments
  Drivers: ccree: ssi_hash.c - align block comments
  Drivers: ccree: ssi_fips_local.c - align block comments
  Drivers: ccree: ssi_fips_ll.c - align block comments
  Drivers: ccree: ssi_fips_ext.c - align block comments
  Drivers: ccree: ssi_fips_data.h - align block comments
  Drivers: ccree: ssi_fips.h - align block comments
  Drivers: ccree: ssi_fips.c - align block comments
  Drivers: ccree: ssi_driver.h - align block comments
  Drivers: ccree: ssi_config.h - align block comments
  Drivers: ccree: ssi_cipher.h - align block comments
  Drivers: ccree: ssi_buffer_mgr.h - align block comments
  Drivers: ccree: ssi_buffer_mgr.c - align block comments
  Drivers: ccree: ssi_aead.h - align block comments
  Drivers: ccree: ssi_aead.c - align block comments
  Drivers: ccree: hash_defs.h - align block comments
  Drivers: ccree: cc_regs.h - align block comments
  Drivers: ccree: cc_hw_queue_defs.h - align block comments
  Drivers: ccree: cc_crypto_ctx.h - align block comments

 drivers/staging/ccree/cc_crypto_ctx.h| 17 +++---
 drivers/staging/ccree/cc_hw_queue_defs.h | 32 +--
 drivers/staging/ccree/cc_regs.h  | 13 ++---
 drivers/staging/ccree/hash_defs.h| 15 +++---
 drivers/staging/ccree/ssi_aead.c | 45 ++--
 drivers/staging/ccree/ssi_aead.h |  7 +--
 drivers/staging/ccree/ssi_buffer_mgr.c   | 87 +-
 drivers/staging/ccree/ssi_buffer_mgr.h   |  2 +-
 drivers/staging/ccree/ssi_cipher.h   |  2 +-
 drivers/staging/ccree/ssi_config.h   |  5 +-
 drivers/staging/ccree/ssi_driver.h   | 16 +++---
 drivers/staging/ccree/ssi_fips.c | 16 +++---
 drivers/staging/ccree/ssi_fips.h |  6 +--
 drivers/staging/ccree/ssi_fips_data.h| 93 
 drivers/staging/ccree/ssi_fips_ext.c | 46 
 drivers/staging/ccree/ssi_fips_ll.c  | 21 
 drivers/staging/ccree/ssi_fips_local.c   | 21 
 drivers/staging/ccree/ssi_hash.c |  9 ++--
 drivers/staging/ccree/ssi_hash.h |  2 +-
 drivers/staging/ccree/ssi_ivgen.c|  6 ++-
 drivers/staging/ccree/ssi_pm.h   |  2 +-
 drivers/staging/ccree/ssi_pm_ext.c   | 14 ++---
 drivers/staging/ccree/ssi_pm_ext.h   |  2 +-
 drivers/staging/ccree/ssi_request_mgr.c  | 37 +++--
 drivers/staging/ccree/ssi_request_mgr.h  |  2 +-
 drivers/staging/ccree/ssi_sysfs.c|  3 +-
 drivers/staging/ccree/ssi_sysfs.h|  2 +-
 27 files changed, 288 insertions(+), 235 deletions(-)

-- 
2.13.0

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