[PATCH 4/4] staging: mt7621-pci: Move open-braces to match kernel code style
Moves some open-braces to the end of the conditional statement to match the
kernel's coding style
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pci/pci-mt7621.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
b/drivers/staging/mt7621-pci/pci-mt7621.c
index 3c7978e..c12447d 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -532,8 +532,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
*(unsigned int *)(0xbe000620) |= 0x1<<19 | 0x1<<8 | 0x1<<7;
// set DATA
mdelay(1000);
- if ((RALINK_PCI0_STATUS & 0x1) == 0)
- {
+ if ((RALINK_PCI0_STATUS & 0x1) == 0) {
printk("PCIE0 no card, disable it(RST)\n");
ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST);
rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
@@ -543,8 +542,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
RALINK_PCI_PCIMSK_ADDR |= (1<<20); // enable pcie1 interrupt
}
- if ((RALINK_PCI1_STATUS & 0x1) == 0)
- {
+ if ((RALINK_PCI1_STATUS & 0x1) == 0) {
printk("PCIE1 no card, disable it(RST)\n");
ASSERT_SYSRST_PCIE(RALINK_PCIE1_RST);
rt_sysc_m32(RALINK_PCIE1_CLK_EN, 0, RALINK_CLKCFG1);
--
2.7.4
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[PATCH 3/4] staging: mt7621-pci: Add spaces after commas in pci-mt7621.c
Adds spaces after commas in parameter lists in pci-mt7621.c
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pci/pci-mt7621.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
b/drivers/staging/mt7621-pci/pci-mt7621.c
index c7932ae..3c7978e 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -399,10 +399,10 @@ set_phy_for_ssc(void)
if (reg >= 6) {
printk("* Xtal 25MHz *\n");
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4bc), 4, 2, 0x01); // RG_PE1_H_PLL_FBKSEL //Feedback clock select
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x49c), 0,31, 0x1800); // RG_PE1_H_LCDDS_PCW_NCPO //DDS NCPO
PCW (for host mode)
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4a4), 0,16, 0x18d);// RG_PE1_H_LCDDS_SSC_PRD //DDS SSC dither
period control
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4a8), 0,12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA //DDS SSC dither
amplitude control
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4a8), 16,12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA1//DDS SSC dither
amplitude control for initial
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x49c), 0, 31, 0x1800); // RG_PE1_H_LCDDS_PCW_NCPO //DDS NCPO
PCW (for host mode)
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4a4), 0, 16, 0x18d); // RG_PE1_H_LCDDS_SSC_PRD //DDS SSC dither
period control
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4a8), 0, 12, 0x4a);// RG_PE1_H_LCDDS_SSC_DELTA //DDS SSC dither
amplitude control
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET +
0x4a8), 16, 12, 0x4a);// RG_PE1_H_LCDDS_SSC_DELTA1//DDS SSC dither
amplitude control for initial
} else {
printk("* Xtal 20MHz *\n");
}
@@ -436,10 +436,10 @@ set_phy_for_ssc(void)
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 6,
2, 0x00); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode)
if (reg >= 6) { // 25MHz Xtal
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4bc), 4, 2, 0x01); // RG_PE1_H_PLL_FBKSEL //Feedback clock select
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x49c), 0,31, 0x1800); // RG_PE1_H_LCDDS_PCW_NCPO //DDS NCPO PCW (for
host mode)
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4a4), 0,16, 0x18d); // RG_PE1_H_LCDDS_SSC_PRD //DDS SSC dither
period control
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4a8), 0,12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA //DDS SSC dither
amplitude control
- set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4a8), 16,12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA1//DDS SSC dither
amplitude control for initial
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x49c), 0, 31, 0x1800);// RG_PE1_H_LCDDS_PCW_NCPO //DDS NCPO
PCW (for host mode)
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4a4), 0, 16, 0x18d); // RG_PE1_H_LCDDS_SSC_PRD //DDS SSC dither
period control
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4a8), 0, 12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA //DDS SSC dither
amplitude control
+ set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET +
0x4a8), 16, 12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA1//DDS SSC dither
amplitude control for initial
}
}
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a0), 5, 1,
0x01); // RG_PE1_LCDDS_CLK_PH_INV //DDS clock inversion
--
2.7.4
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[PATCH 2/4] staging: mt7621-pci: Fix spacing around equals sign
Add spaces in front of the equals sign in assignment operations
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pci/pci-mt7621.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
b/drivers/staging/mt7621-pci/pci-mt7621.c
index ded58ba..c7932ae 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -292,7 +292,7 @@ pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u
}
}
-struct pci_ops mt7621_pci_ops= {
+struct pci_ops mt7621_pci_ops = {
.read = pci_config_read,
.write = pci_config_write,
};
@@ -480,8 +480,8 @@ static int mt7621_pci_probe(struct platform_device *pdev)
unsigned long val = 0;
iomem_resource.start = 0;
- iomem_resource.end= ~0;
- ioport_resource.start= 0;
+ iomem_resource.end = ~0;
+ ioport_resource.start = 0;
ioport_resource.end = ~0;
val = RALINK_PCIE0_RST;
--
2.7.4
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[PATCH 1/4] staging: mt7621-pci: Fix spaces around parenthesis in pci-7621.c
Adds spaces before open parenthesis, and removes spaces after open parenthesis
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pci/pci-mt7621.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
b/drivers/staging/mt7621-pci/pci-mt7621.c
index b373d76..ded58ba 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -139,14 +139,14 @@
rt_sysc_m32(0, val, RALINK_RSTCTRL);\
else\
rt_sysc_m32(val, 0, RALINK_RSTCTRL);\
- } while(0)
+ } while (0)
#define DEASSERT_SYSRST_PCIE(val) \
do {\
if (rt_sysc_r32(SYSC_REG_CHIP_REV) == 0x00030101) \
rt_sysc_m32(val, 0, RALINK_RSTCTRL);\
else\
rt_sysc_m32(0, val, RALINK_RSTCTRL);\
- } while(0)
+ } while (0)
#define RALINK_CLKCFG1 0x30
#define RALINK_RSTCTRL 0x34
#define RALINK_GPIOMODE0x60
@@ -195,7 +195,7 @@ static int config_access(unsigned char access_type, struct
pci_bus *bus,
(func << 8) | (where & 0xfc) | 0x8000;
MV_WRITE(address_reg, address);
- switch(access_type) {
+ switch (access_type) {
case PCI_ACCESS_WRITE_1:
MV_WRITE_8(data_reg+(where&0x3), *data);
break;
@@ -206,7 +206,7 @@ static int config_access(unsigned char access_type, struct
pci_bus *bus,
MV_WRITE(data_reg, *data);
break;
case PCI_ACCESS_READ_1:
- MV_READ_8( data_reg+(where&0x3), data);
+ MV_READ_8(data_reg+(where&0x3), data);
break;
case PCI_ACCESS_READ_2:
MV_READ_16(data_reg+(where&0x3), data);
@@ -391,7 +391,7 @@ set_phy_for_ssc(void)
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100), 4, 1,
0x01); // rg_pe1_frc_phy_en//Force Port 1 enable control
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000), 5, 1,
0x00); // rg_pe1_phy_en//Port 0 disable
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100), 5, 1,
0x00); // rg_pe1_phy_en//Port 1 disable
- if(reg <= 5 && reg >= 3) { // 40MHz Xtal
+ if (reg <= 5 && reg >= 3) { // 40MHz Xtal
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490),
6, 2, 0x01); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode)
printk("* Xtal 40MHz *\n");
} else {// 25MHz | 20MHz Xtal
@@ -414,7 +414,7 @@ set_phy_for_ssc(void)
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 8, 4,
0x01); // RG_PE1_H_PLL_IC
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4ac), 16, 3,
0x00); // RG_PE1_H_PLL_BR
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 1, 3,
0x02); // RG_PE1_PLL_DIVEN
- if(reg <= 5 && reg >= 3) { // 40MHz Xtal
+ if (reg <= 5 && reg >= 3) { // 40MHz Xtal
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x414),
6, 2, 0x01); // rg_pe1_mstckdiv //value of da_pe1_mstckdiv
when force mode enable
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x414),
5, 1, 0x01); // rg_pe1_frc_mstckdiv //force mode enable of da_pe1_mstckdiv
}
@@ -430,7 +430,7 @@ set_phy_for_ssc(void)
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x400), 9, 2,
0x00); // rg_pe1_h_xtal_type
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000), 4, 1,
0x01); // rg_pe1_frc_phy_en//Force Port 0 enable control
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000), 5, 1,
0x00); // rg_pe1_phy_en//Port 0 disable
- if(reg <= 5 && reg >= 3) { // 40MHz Xtal
+ if (reg <= 5 && reg >= 3) { // 40MHz Xtal
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 6,
2, 0x01); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode)
} else {// 25MHz | 20MHz Xtal
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 6,
2, 0x00); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode)
@@ -449,7 +449,7 @@ set_phy_for_ssc(void)
set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 8, 4,
0x01); // RG_PE1_H_PLL_IC
set_p
Re: [PATCH] staging: mt7621-pinctrl: Replace unsigned with unsigned int
On Fri, Jul 06, 2018 at 05:37:49PM +0200, Greg Kroah-Hartman wrote: > Someone else sent this same change before you did, sorry :( Thanks for the review anyway. I realize now that I was looking at the wrong tree. ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH] staging: mt7621-pinctrl: Replace unsigned with unsigned int
Replaces instances of "unsigned" with "unsigned int" in pinctrl-mt7621.c
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c | 27 +
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
index 0c3e498..201df08 100644
--- a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
+++ b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
@@ -54,7 +54,7 @@ static int rt2880_get_group_count(struct pinctrl_dev
*pctrldev)
}
static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
-unsigned group)
+unsigned int group)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -65,9 +65,9 @@ static const char *rt2880_get_group_name(struct pinctrl_dev
*pctrldev,
}
static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
-unsigned group,
-const unsigned **pins,
-unsigned *num_pins)
+unsigned int group,
+const unsigned int **pins,
+unsigned int *num_pins)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -81,7 +81,8 @@ static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
}
static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
- struct pinctrl_map *map, unsigned num_maps)
+ struct pinctrl_map *map,
+ unsigned int num_maps)
{
int i;
@@ -94,7 +95,7 @@ static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev
*pctrldev,
static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
struct seq_file *s,
- unsigned offset)
+ unsigned int offset)
{
seq_printf(s, "ralink pio");
}
@@ -127,7 +128,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
struct device_node *np_config,
struct pinctrl_map **map,
- unsigned *num_maps)
+ unsigned int *num_maps)
{
int max_maps = 0;
struct pinctrl_map *tmp;
@@ -173,7 +174,7 @@ static int rt2880_pmx_func_count(struct pinctrl_dev
*pctrldev)
}
static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
-unsigned func)
+unsigned int func)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -181,9 +182,9 @@ static const char *rt2880_pmx_func_name(struct pinctrl_dev
*pctrldev,
}
static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
- unsigned func,
+ unsigned int func,
const char * const **groups,
- unsigned * const num_groups)
+ unsigned int * const num_groups)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -198,8 +199,8 @@ static int rt2880_pmx_group_get_groups(struct pinctrl_dev
*pctrldev,
}
static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
- unsigned func,
- unsigned group)
+ unsigned int func,
+ unsigned int group)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
u32 mode = 0;
@@ -243,7 +244,7 @@ static int rt2880_pmx_group_enable(struct pinctrl_dev
*pctrldev,
static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
struct pinctrl_gpio_range *range,
- unsigned pin)
+ unsigned int pin)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
--
2.7.4
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[PATCH] staging: mt7621-pinctrl: Style fixes to pinctrl-rt2880
Replaces instances of "unsigned" with "unsigned int"; fixes comma and tab
spacing.
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c | 35 +
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
index 0c3e498..6894510 100644
--- a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
+++ b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
@@ -54,7 +54,7 @@ static int rt2880_get_group_count(struct pinctrl_dev
*pctrldev)
}
static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
-unsigned group)
+unsigned int group)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -65,9 +65,9 @@ static const char *rt2880_get_group_name(struct pinctrl_dev
*pctrldev,
}
static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
-unsigned group,
-const unsigned **pins,
-unsigned *num_pins)
+unsigned int group,
+const unsigned int **pins,
+unsigned int *num_pins)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -81,7 +81,8 @@ static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
}
static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
- struct pinctrl_map *map, unsigned num_maps)
+ struct pinctrl_map *map,
+ unsigned int num_maps)
{
int i;
@@ -94,7 +95,7 @@ static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev
*pctrldev,
static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
struct seq_file *s,
- unsigned offset)
+ unsigned int offset)
{
seq_printf(s, "ralink pio");
}
@@ -103,7 +104,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
struct device_node *np,
struct pinctrl_map **map)
{
-const char *function;
+ const char *function;
int func = of_property_read_string(np, "ralink,function", );
int grps = of_property_count_strings(np, "ralink,group");
int i;
@@ -112,7 +113,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
return;
for (i = 0; i < grps; i++) {
- const char *group;
+ const char *group;
of_property_read_string_index(np, "ralink,group", i, );
@@ -127,7 +128,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
struct device_node *np_config,
struct pinctrl_map **map,
- unsigned *num_maps)
+ unsigned int *num_maps)
{
int max_maps = 0;
struct pinctrl_map *tmp;
@@ -173,7 +174,7 @@ static int rt2880_pmx_func_count(struct pinctrl_dev
*pctrldev)
}
static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
-unsigned func)
+unsigned int func)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -181,7 +182,7 @@ static const char *rt2880_pmx_func_name(struct pinctrl_dev
*pctrldev,
}
static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
- unsigned func,
+ unsigned int func,
const char * const **groups,
unsigned * const num_groups)
{
@@ -198,11 +199,11 @@ static int rt2880_pmx_group_get_groups(struct pinctrl_dev
*pctrldev,
}
static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
- unsigned func,
- unsigned group)
+ unsigned int func,
+ unsigned int group)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-u32 mode = 0;
+ u32 mode = 0;
u32 reg = SYSC_REG_GPIO_MODE;
int i;
int shift;
@@ -243,7 +244,7 @@ static int rt2880_pmx_group_enable(struct pinctrl_dev
*pctrldev,
static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
struct pinctrl_gpio_range *range,
- unsigned pin)
+
Re: [PATCH] staging: mt7621-pinctrl: Replaces "unsigned" with "unsigned int", fixes mixed indentation, and puts spaces after commas.
> The subject is over 72 characters or whatever the limit is and there > isn't a commit message. Dan, thanks for your help, I realize where I went wrong now. I will re-submit the patch fresh to fix the message subject. --Peter ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH] staging: mt7621-pinctrl: Replaces "unsigned" with "unsigned int", fixes mixed indentation, and puts spaces after commas.
Signed-off-by: Peter Vernia
---
drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c | 35 +
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
index 0c3e498..6894510 100644
--- a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
+++ b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c
@@ -54,7 +54,7 @@ static int rt2880_get_group_count(struct pinctrl_dev
*pctrldev)
}
static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
-unsigned group)
+unsigned int group)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -65,9 +65,9 @@ static const char *rt2880_get_group_name(struct pinctrl_dev
*pctrldev,
}
static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
-unsigned group,
-const unsigned **pins,
-unsigned *num_pins)
+unsigned int group,
+const unsigned int **pins,
+unsigned int *num_pins)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -81,7 +81,8 @@ static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
}
static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
- struct pinctrl_map *map, unsigned num_maps)
+ struct pinctrl_map *map,
+ unsigned int num_maps)
{
int i;
@@ -94,7 +95,7 @@ static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev
*pctrldev,
static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
struct seq_file *s,
- unsigned offset)
+ unsigned int offset)
{
seq_printf(s, "ralink pio");
}
@@ -103,7 +104,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
struct device_node *np,
struct pinctrl_map **map)
{
-const char *function;
+ const char *function;
int func = of_property_read_string(np, "ralink,function", );
int grps = of_property_count_strings(np, "ralink,group");
int i;
@@ -112,7 +113,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
return;
for (i = 0; i < grps; i++) {
- const char *group;
+ const char *group;
of_property_read_string_index(np, "ralink,group", i, );
@@ -127,7 +128,7 @@ static void rt2880_pinctrl_dt_subnode_to_map(struct
pinctrl_dev *pctrldev,
static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
struct device_node *np_config,
struct pinctrl_map **map,
- unsigned *num_maps)
+ unsigned int *num_maps)
{
int max_maps = 0;
struct pinctrl_map *tmp;
@@ -173,7 +174,7 @@ static int rt2880_pmx_func_count(struct pinctrl_dev
*pctrldev)
}
static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
-unsigned func)
+unsigned int func)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
@@ -181,7 +182,7 @@ static const char *rt2880_pmx_func_name(struct pinctrl_dev
*pctrldev,
}
static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
- unsigned func,
+ unsigned int func,
const char * const **groups,
unsigned * const num_groups)
{
@@ -198,11 +199,11 @@ static int rt2880_pmx_group_get_groups(struct pinctrl_dev
*pctrldev,
}
static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
- unsigned func,
- unsigned group)
+ unsigned int func,
+ unsigned int group)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-u32 mode = 0;
+ u32 mode = 0;
u32 reg = SYSC_REG_GPIO_MODE;
int i;
int shift;
@@ -243,7 +244,7 @@ static int rt2880_pmx_group_enable(struct pinctrl_dev
*pctrldev,
static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
struct pinctrl_gpio_range *range,
- unsigned pin)
+ unsigned int pin)
{
struct rt2880_priv *p = pinctrl_dev_get_drvdata(pc
