Re: [PATCH v9 02/24] dt-bindings: introduce silabs,wfx.yaml

2022-01-11 Thread Rob Herring
On Tue, Jan 11, 2022 at 06:14:02PM +0100, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Prepare the inclusion of the wfx driver in the kernel.
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 138 ++
>  1 file changed, 138 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml 
> b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> new file mode 100644
> index ..d12f262868cf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> @@ -0,0 +1,138 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020, Silicon Laboratories, Inc.
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Silicon Labs WFxxx devicetree bindings
> +
> +maintainers:
> +  - Jérôme Pouiller 
> +
> +description: >
> +  Support for the Wifi chip WFxxx from Silicon Labs. Currently, the only 
> device
> +  from the WFxxx series is the WF200 described here:
> + https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
> +
> +  The WF200 can be connected via SPI or via SDIO.
> +
> +  For SDIO:
> +
> +Declaring the WFxxx chip in device tree is mandatory (usually, the 
> VID/PID is
> +sufficient for the SDIO devices).
> +
> +It is recommended to declare a mmc-pwrseq on SDIO host above WFx. Without
> +it, you may encounter issues during reboot. The mmc-pwrseq should be
> +compatible with mmc-pwrseq-simple. Please consult
> +Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml for more
> +information.
> +
> +  For SPI:
> +
> +In add of the properties below, please consult
> +Documentation/devicetree/bindings/spi/spi-controller.yaml for optional 
> SPI
> +related properties.
> +
> +properties:
> +  compatible:
> +anyOf:
> +  - const: silabs,wf200# Chip alone without antenna
> +  - const: silabs,brd4001a # WGM160P Evaluation Board
> +  - const: silabs,brd8022a # WF200 Evaluation Board
> +  - const: silabs,brd8023a # WFM200 Evaluation Board

This still defines that compatible is a single entry. You need something 
like:

items:
  - enum:
  - silabs,brd4001a
  - silabs,brd8022a
  - silabs,brd8023a
  - const: silabs,wf200

You need a separate 'items' list for different number of compatible 
entries (e.g. if a single string is valid) and that is when you need to 
use 'oneOf'. Plenty of examples in the tree.

> +
> +  reg:
> +description:
> +  When used on SDIO bus,  must be set to 1. When used on SPI bus, 
> it is
> +  the chip select address of the device as defined in the SPI devices
> +  bindings.
> +maxItems: 1
> +
> +  spi-max-frequency: true
> +
> +  interrupts:
> +description: The interrupt line. Triggers IRQ_TYPE_LEVEL_HIGH and
> +  IRQ_TYPE_EDGE_RISING are both supported by the chip and the driver. 
> When

Unless there is a mode you can configure, supporting both is wrong even 
though edge will mostly work for a device that is really level.

What a driver supports is not relevant to the binding.

> +  SPI is used, this property is required. When SDIO is used, the 
> "in-band"
> +  interrupt provided by the SDIO bus is used unless an interrupt is 
> defined
> +  in the Device Tree.
> +maxItems: 1
> +
> +  reset-gpios:
> +description: (SPI only) Phandle of gpio that will be used to reset chip
> +  during probe. Without this property, you may encounter issues with warm
> +  boot. (For legacy purpose, the gpio in inverted when compatible ==
> +  "silabs,wfx-spi")

What legacy? This is a new binding.

> +
> +  For SDIO, the reset gpio should declared using a mmc-pwrseq.
> +maxItems: 1
> +
> +  wakeup-gpios:
> +description: Phandle of gpio that will be used to wake-up chip. Without 
> this
> +  property, driver will disable most of power saving features.
> +maxItems: 1
> +
> +  silabs,antenna-config-file:
> +$ref: /schemas/types.yaml#/definitions/string
> +description: Use an alternative file for antenna configuration (aka
> +  "Platform Data Set" in Silabs jargon). Default depends of "compatible"
> +  string. For "silabs,wf200", the default is 'wf200.pds'.
> +
> +  local-mac-address: true
> +
> +  mac-address: true
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +
> +examples:
> +  - |
> +#include 
> +#include 
> +
> +spi0 {

spi {

> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +wifi@0 {
> +compatible = "silabs,brd4001a", "silabs,wf200";
> +pinctrl-names = "default";
> +pinctrl-0 = <&wfx_irq &wfx_gpios>;
> +reg = <0>;
> +interrup

Re: [PATCH v9 02/24] dt-bindings: introduce silabs,wfx.yaml

2022-01-11 Thread Rob Herring
On Tue, 11 Jan 2022 18:14:02 +0100, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Prepare the inclusion of the wfx driver in the kernel.
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 138 ++
>  1 file changed, 138 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.example.dt.yaml:
 wifi@0: compatible: 'anyOf' conditional failed, one must be fixed:
['silabs,brd4001a', 'silabs,wf200'] is too long
Additional items are not allowed ('silabs,wf200' was unexpected)
'silabs,wf200' was expected
'silabs,brd8022a' was expected
'silabs,brd8023a' was expected
From schema: 
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.example.dt.yaml:
 wifi@1: compatible: 'anyOf' conditional failed, one must be fixed:
['silabs,brd8022a', 'silabs,wf200'] is too long
Additional items are not allowed ('silabs,wf200' was unexpected)
'silabs,wf200' was expected
'silabs,brd4001a' was expected
'silabs,brd8023a' was expected
From schema: 
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1578580

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v8 02/24] dt-bindings: introduce silabs,wfx.yaml

2021-10-05 Thread Rob Herring
On Tue, 05 Oct 2021 15:53:38 +0200, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Prepare the inclusion of the wfx driver in the kernel.
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 137 ++
>  1 file changed, 137 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml:39:31: [error] 
syntax error: mapping values are not allowed here (syntax)

dtschema/dtc warnings/errors:
make[1]: *** Deleting file 
'Documentation/devicetree/bindings/net/wireless/silabs,wfx.example.dts'
Traceback (most recent call last):
  File "/usr/local/bin/dt-extract-example", line 45, in 
binding = yaml.load(open(args.yamlfile, encoding='utf-8').read())
  File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/main.py", line 434, 
in load
return constructor.get_single_data()
  File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/constructor.py", 
line 120, in get_single_data
node = self.composer.get_single_node()
  File "_ruamel_yaml.pyx", line 706, in _ruamel_yaml.CParser.get_single_node
  File "_ruamel_yaml.pyx", line 724, in _ruamel_yaml.CParser._compose_document
  File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
  File "_ruamel_yaml.pyx", line 889, in 
_ruamel_yaml.CParser._compose_mapping_node
  File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
  File "_ruamel_yaml.pyx", line 891, in 
_ruamel_yaml.CParser._compose_mapping_node
  File "_ruamel_yaml.pyx", line 904, in _ruamel_yaml.CParser._parse_next_event
ruamel.yaml.scanner.ScannerError: mapping values are not allowed in this context
  in "", line 39, column 31
make[1]: *** [Documentation/devicetree/bindings/Makefile:20: 
Documentation/devicetree/bindings/net/wireless/silabs,wfx.example.dts] Error 1
make[1]: *** Waiting for unfinished jobs
./Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml:  mapping 
values are not allowed in this context
  in "", line 39, column 31
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml:
 ignoring, error parsing file
warning: no schema found in file: 
./Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
make: *** [Makefile:1441: dt_binding_check] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1536655

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v7 02/24] dt-bindings: introduce silabs,wfx.yaml

2021-09-23 Thread Rob Herring
On Mon, 20 Sep 2021 18:11:14 +0200, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Prepare the inclusion of the wfx driver in the kernel.
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 133 ++
>  1 file changed, 133 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v6 02/24] dt-bindings: introduce silabs,wfx.yaml

2021-09-17 Thread Rob Herring
On Fri, 17 Sep 2021 17:13:38 +0200, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Prepare the inclusion of the wfx driver in the kernel.
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 133 ++
>  1 file changed, 133 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:


doc reference errors (make refcheckdocs):
Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml: 
Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt

See https://patchwork.ozlabs.org/patch/1529457

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v5 02/24] dt-bindings: introduce silabs,wfx.yaml

2021-03-23 Thread Rob Herring
On Mon, 15 Mar 2021 14:24:39 +0100, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Prepare the inclusion of the wfx driver in the kernel.
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 133 ++
>  1 file changed, 133 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v6 02/13] dt-bindings: media: nxp, imx8mq-vpu: Update the bindings for G2 support

2021-03-23 Thread Rob Herring
On Thu, 18 Mar 2021 09:20:35 +0100, Benjamin Gaignard wrote:
> Introducing G2 hevc video decoder lead to modify the bindings to allow
> to get one node per VPUs.
> VPUs share one hardware control block which is provided as a phandle on
> an syscon.
> Each node got now one reg and one interrupt.
> Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2.
> 
> To be compatible with older DT the driver is still capable to use 'ctrl'
> reg-name even if it is deprecated now.
> 
> Signed-off-by: Benjamin Gaignard 
> ---
> version 5:
> - This version doesn't break the backward compatibilty between kernel
>   and DT.
> 
>  .../bindings/media/nxp,imx8mq-vpu.yaml| 53 ---
>  1 file changed, 34 insertions(+), 19 deletions(-)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp, imx8mq-vpu-ctrl' to syscon list

2021-03-23 Thread Rob Herring
On Thu, 18 Mar 2021 09:20:34 +0100, Benjamin Gaignard wrote:
> Add 'nxp,imx8mq-vpu-ctrl' in the list of possible syscon.
> It will used to access to the VPU control registers.
> 
> Signed-off-by: Benjamin Gaignard 
> ---
>  Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring 
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Re: [PATCH v10 2/6] dt: bindings: add mt7621-sysc device tree binding documentation

2021-03-08 Thread Rob Herring
On Sun, 07 Mar 2021 08:04:22 +0100, Sergio Paracuellos wrote:
> Adds device tree binding documentation for clocks in the
> MT7621 SOC.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../bindings/clock/mediatek,mt7621-sysc.yaml  | 68 +++
>  1 file changed, 68 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v3 2/5] dt-bindings: media: IMX8MQ VPU: document reset usage

2021-03-08 Thread Rob Herring
On Mon, 01 Mar 2021 16:17:51 +0100, Benjamin Gaignard wrote:
> Document IMX8MQ VPU bindings to add the phandle to the reset driver.
> 
> Provide an independent reset driver allow to the both VPUs to share
> their control/reset hardware block. The reset driver replace what
> was previously done be using the 'ctrl' registers inside the driver.
> 
> This breaks the compatibility between DTB and kernel but the driver
> is still in staging directory and limited to IMX8MQ SoC.
> 
> Signed-off-by: Benjamin Gaignard 
> ---
> version 3:
> - Fix error in VPU example node
> 
>  .../devicetree/bindings/media/nxp,imx8mq-vpu.yaml  | 14 +-
>  1 file changed, 9 insertions(+), 5 deletions(-)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v3 0/5] Reset driver for IMX8MQ VPU hardware block

2021-03-08 Thread Rob Herring
On Mon, Mar 08, 2021 at 11:22:17AM -0700, Rob Herring wrote:
> On Mon, Mar 01, 2021 at 04:17:49PM +0100, Benjamin Gaignard wrote:
> > The two VPUs inside IMX8MQ share the same control block which can be see
> > as a reset hardware block.
> > In order to be able to add the second VPU (for HECV decoding) it will be
> > more handy if the both VPU drivers instance don't have to share the
> > control block registers. This lead to implement it as an independ reset 
> > driver and to change the VPU driver to use it.
> > 
> > Please note that this series break the compatibility between the DTB and
> > kernel. This break is limited to IMX8MQ SoC and is done when the driver
> > is still in staging directory.
> 
> As this information will be lost, please put in the binding and dts 
> patch.

Actually, the adding the VPU reset binding doesn't break compatibility, 
so just the dts file changes needs it.

> 
> > 
> > version 3:
> > - Fix error in VPU example node
> > 
> > version 2:
> > - Document the change in VPU bindings
> >  
> > Benjamin Gaignard (5):
> >   dt-bindings: reset: IMX8MQ VPU reset
> >   dt-bindings: media: IMX8MQ VPU: document reset usage
> >   reset: Add reset driver for IMX8MQ VPU block
> >   media: hantro: Use reset driver
> >   arm64: dts: imx8mq: Use reset driver for VPU hardware block
> > 
> >  .../bindings/media/nxp,imx8mq-vpu.yaml|  14 +-
> >  .../bindings/reset/fsl,imx8mq-vpu-reset.yaml  |  54 ++
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi |  31 +++-
> >  drivers/reset/Kconfig |   8 +
> >  drivers/reset/Makefile|   1 +
> >  drivers/reset/reset-imx8mq-vpu.c  | 169 ++
> >  drivers/staging/media/hantro/Kconfig  |   1 +
> >  drivers/staging/media/hantro/imx8m_vpu_hw.c   |  61 ++-
> >  include/dt-bindings/reset/imx8mq-vpu-reset.h  |  16 ++
> >  9 files changed, 294 insertions(+), 61 deletions(-)
> >  create mode 100644 
> > Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
> >  create mode 100644 drivers/reset/reset-imx8mq-vpu.c
> >  create mode 100644 include/dt-bindings/reset/imx8mq-vpu-reset.h
> > 
> > -- 
> > 2.25.1
> > 
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Re: [PATCH v3 1/5] dt-bindings: reset: IMX8MQ VPU reset

2021-03-08 Thread Rob Herring
On Mon, Mar 01, 2021 at 04:17:50PM +0100, Benjamin Gaignard wrote:
> Document bindings for IMX8MQ VPU reset hardware block
> 
> Signed-off-by: Benjamin Gaignard 
> ---
>  .../bindings/reset/fsl,imx8mq-vpu-reset.yaml  | 54 +++
>  include/dt-bindings/reset/imx8mq-vpu-reset.h  | 16 ++
>  2 files changed, 70 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
>  create mode 100644 include/dt-bindings/reset/imx8mq-vpu-reset.h
> 
> diff --git 
> a/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml 
> b/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
> new file mode 100644
> index ..00020421c0e3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/fsl,imx8mq-vpu-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8MQ VPU Reset Controller
> +
> +maintainers:
> +  - Benjamin Gaignard 
> +
> +description: |
> +  The VPU reset controller is used to reset the video processor
> +  unit peripherals. Device nodes that need access to reset lines should
> +  specify them as a reset phandle in their corresponding node as
> +  specified in reset.txt.
> +
> +  For list of all valid reset indices see
> + for i.MX8MQ.
> +
> +properties:
> +  compatible:
> +items:
> +  - const: fsl,imx8mq-vpu-reset
> +  - const: syscon

Is there other functionality in the block? If so, add some details in 
'description' above.

> +
> +  reg:
> +maxItems: 1
> +
> +  clocks:
> +minItems: 1
> +maxItems: 3

Need to say what each clock is.

> +
> +  '#reset-cells':
> +const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +#include 
> +
> +vpu-reset@3832 {

reset-controller@...

> +compatible = "fsl,imx8mq-vpu-reset", "syscon";
> +reg = <0x3832 0x1>;
> +clocks = <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> +#reset-cells = <1>;
> +};
> diff --git a/include/dt-bindings/reset/imx8mq-vpu-reset.h 
> b/include/dt-bindings/reset/imx8mq-vpu-reset.h
> new file mode 100644
> index ..efcbe18177fe
> --- /dev/null
> +++ b/include/dt-bindings/reset/imx8mq-vpu-reset.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2021, Collabora
> + *
> + * i.MX7 System Reset Controller (SRC) driver
> + *
> + * Author: Benjamin Gaignard 
> + */
> +
> +#ifndef DT_BINDINGS_VPU_RESET_IMX8MQ
> +#define DT_BINDINGS_VPU_RESET_IMX8MQ
> +
> +#define IMX8MQ_RESET_VPU_RESET_G10
> +#define IMX8MQ_RESET_VPU_RESET_G21
> +
> +#endif
> -- 
> 2.25.1
> 
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Re: [PATCH v3 0/5] Reset driver for IMX8MQ VPU hardware block

2021-03-08 Thread Rob Herring
On Mon, Mar 01, 2021 at 04:17:49PM +0100, Benjamin Gaignard wrote:
> The two VPUs inside IMX8MQ share the same control block which can be see
> as a reset hardware block.
> In order to be able to add the second VPU (for HECV decoding) it will be
> more handy if the both VPU drivers instance don't have to share the
> control block registers. This lead to implement it as an independ reset 
> driver and to change the VPU driver to use it.
> 
> Please note that this series break the compatibility between the DTB and
> kernel. This break is limited to IMX8MQ SoC and is done when the driver
> is still in staging directory.

As this information will be lost, please put in the binding and dts 
patch.

> 
> version 3:
> - Fix error in VPU example node
> 
> version 2:
> - Document the change in VPU bindings
>  
> Benjamin Gaignard (5):
>   dt-bindings: reset: IMX8MQ VPU reset
>   dt-bindings: media: IMX8MQ VPU: document reset usage
>   reset: Add reset driver for IMX8MQ VPU block
>   media: hantro: Use reset driver
>   arm64: dts: imx8mq: Use reset driver for VPU hardware block
> 
>  .../bindings/media/nxp,imx8mq-vpu.yaml|  14 +-
>  .../bindings/reset/fsl,imx8mq-vpu-reset.yaml  |  54 ++
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi |  31 +++-
>  drivers/reset/Kconfig |   8 +
>  drivers/reset/Makefile|   1 +
>  drivers/reset/reset-imx8mq-vpu.c  | 169 ++
>  drivers/staging/media/hantro/Kconfig  |   1 +
>  drivers/staging/media/hantro/imx8m_vpu_hw.c   |  61 ++-
>  include/dt-bindings/reset/imx8mq-vpu-reset.h  |  16 ++
>  9 files changed, 294 insertions(+), 61 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml
>  create mode 100644 drivers/reset/reset-imx8mq-vpu.c
>  create mode 100644 include/dt-bindings/reset/imx8mq-vpu-reset.h
> 
> -- 
> 2.25.1
> 
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Re: [PATCH v10 8/9] dt-bindings: add documentation of xilinx clocking wizard

2021-03-06 Thread Rob Herring
On Wed, Feb 24, 2021 at 06:40:40PM +0530, Shubhrajyoti Datta wrote:
> Add the devicetree binding for the xilinx clocking wizard.
> 
> Signed-off-by: Shubhrajyoti Datta 
> ---
>  v6:
>  Fix a yaml warning
>  v7:
>  Add vendor prefix speed-grade
>  v8:
>  Fix the warnings
>  v10:
>  Add nr-outputs
> 
>  .../bindings/clock/xlnx,clocking-wizard.yaml   | 72 
> ++
>  1 file changed, 72 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml 
> b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> new file mode 100644
> index 000..280eb09
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#";
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#";
> +
> +title: Xilinx clocking wizard
> +
> +maintainers:
> +  - Shubhrajyoti Datta 
> +
> +description:
> +  The clocking wizard is a soft ip clocking block of Xilinx versal. It
> +  reads required input clock frequencies from the devicetree and acts as 
> clock
> +  clock output.
> +
> +properties:
> +  compatible:
> +const: xlnx,clocking-wizard

Not very specific. Only 1 version of this h/w?

> +
> +  reg:
> +maxItems: 1
> +
> +  "#clock-cells":
> +const: 1
> +
> +  clocks:
> +items:
> +  - description: clock input
> +  - description: axi clock
> +
> +  clock-names:
> +items:
> +  - const: clk_in1
> +  - const: s_axi_aclk
> +
> +
> +  xlnx,speed-grade:
> +$ref: /schemas/types.yaml#/definitions/uint32
> +enum: [1, 2, 3]
> +description:
> +  Speed grade of the device. Higher the speed grade faster is the FPGA 
> device.

How does one decide what value?

> +
> +  nr-outputs:

xlnx,nr-outputs

> +$ref: /schemas/types.yaml#/definitions/uint32
> +enum: [1, 2, 3, 4, 5, 6, 7, 8]

minimum: 1
maximum: 8

> +description:
> +  Number of outputs.
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +  - clocks
> +  - clock-names
> +  - xlnx,speed-grade
> +  - nr-outputs
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +wizard@b000  {

clock-controller@...

> +compatible = "xlnx,clocking-wizard";
> +reg = <0xb000 0x1>;
> +#clock-cells = <1>;
> +xlnx,speed-grade = <1>;
> +nr-outputs = <6>;
> +clock-names = "clk_in1", "s_axi_aclk";
> +clocks = <&clkc 15>, <&clkc 15>;
> +};
> +...
> -- 
> 2.1.1
> 
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Re: [PATCH v9 2/6] dt: bindings: add mt7621-clk device tree binding documentation

2021-03-05 Thread Rob Herring
On Thu, Feb 18, 2021 at 08:07:05AM +0100, Sergio Paracuellos wrote:
> Adds device tree binding documentation for clocks in the
> MT7621 SOC.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../bindings/clock/mediatek,mt7621-clk.yaml   | 66 +++
>  1 file changed, 66 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml 
> b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> new file mode 100644
> index ..842a0f2c9d40
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MT7621 Clock Device Tree Bindings
> +
> +maintainers:
> +  - Sergio Paracuellos 
> +
> +description: |
> +  The MT7621 has a PLL controller from where the cpu clock is provided
> +  as well as derived clocks for the bus and the peripherals. It also
> +  can gate SoC device clocks.
> +
> +  Each clock is assigned an identifier and client nodes use this identifier
> +  to specify the clock which they consume.
> +
> +  All these identifiers could be found in:
> +  [1]: .
> +
> +properties:
> +  compatible:
> +const: mediatek,mt7621-clk
> +
> +  "#clock-cells":
> +description:
> +  The first cell indicates the clock number, see [1] for available
> +  clocks.
> +const: 1
> +
> +  ralink,sysctl:
> +$ref: /schemas/types.yaml#/definitions/phandle
> +description:
> +  phandle of syscon used to control system registers
> +
> +  ralink,memctl:
> +$ref: /schemas/types.yaml#/definitions/phandle
> +description:
> +  phandle of syscon used to control memory registers

I assume one of these phandles are the main registers for the clocks? 
Make this a child node and drop that phandle.

> +
> +  clock-output-names:
> +maxItems: 8
> +
> +required:
> +  - compatible
> +  - '#clock-cells'
> +  - ralink,sysctl
> +  - ralink,memctl
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +#include 
> +
> +pll {
> +  compatible = "mediatek,mt7621-clk";
> +  #clock-cells = <1>;
> +  ralink,sysctl = <&sysc>;
> +  ralink,memctl = <&memc>;
> +  clock-output-names = "xtal", "cpu", "bus",
> +   "50m", "125m", "150m",
> +   "250m", "270m";
> +};
> -- 
> 2.25.1
> 
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Re: [PATCH v2 2/5] dt-bindings: media: IMX8MQ VPU: document reset usage

2021-03-01 Thread Rob Herring
On Fri, 26 Feb 2021 10:11:25 +0100, Benjamin Gaignard wrote:
> Document IMX8MQ VPU bindings to add the phandle to the reset driver.
> 
> Provide an independent reset driver allow to the both VPUs to share
> their control/reset hardware block. The reset driver replace what
> was previously done be using the 'ctrl' registers inside the driver.
> 
> This breaks the compatibility between DTB and kernel but the driver
> is still in staging directory and limited to IMX8MQ SoC.
> 
> Signed-off-by: Benjamin Gaignard 
> ---
>  .../devicetree/bindings/media/nxp,imx8mq-vpu.yaml | 11 ---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.example.dt.yaml:
 video-codec@3830: reg: [[942669824, 65536], [942735360, 65536], 
[942800896, 65536]] is too long
From schema: 
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml

See https://patchwork.ozlabs.org/patch/1444845

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v4 18/21] mfd: hi6421-spmi-pmic: move driver from staging

2021-02-05 Thread Rob Herring
On Tue, Jan 19, 2021 at 05:10:44PM +0100, Mauro Carvalho Chehab wrote:
> This driver is ready for mainstream. So, move it out of staging.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../mfd/hisilicon,hi6421-spmi-pmic.yaml   | 135 +
>  MAINTAINERS   |   7 +
>  drivers/mfd/Kconfig   |  15 +
>  drivers/mfd/Makefile  |   1 +
>  drivers/mfd/hi6421-spmi-pmic.c| 281 ++
>  drivers/staging/hikey9xx/Kconfig  |  16 -
>  drivers/staging/hikey9xx/Makefile |   1 -
>  drivers/staging/hikey9xx/hi6421-spmi-pmic.c   | 281 --
>  .../hikey9xx/hisilicon,hi6421-spmi-pmic.yaml  | 135 -
>  9 files changed, 439 insertions(+), 433 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
>  create mode 100644 drivers/mfd/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml 
> b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
> new file mode 100644
> index ..3b23ad56b31a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
> @@ -0,0 +1,135 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/hisilicon,hi6421-spmi-pmic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon 6421v600 SPMI PMIC
> +
> +maintainers:
> +  - Mauro Carvalho Chehab 
> +
> +description: |
> +  HiSilicon 6421v600 should be connected inside a MIPI System Power 
> Management
> +  (SPMI) bus. It provides interrupts and power supply.
> +
> +  The GPIO and interrupt settings are represented as part of the top-level 
> PMIC
> +  node.
> +
> +  The SPMI controller part is provided by
> +  drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml.
> +
> +properties:
> +  $nodename:
> +pattern: "pmic@[0-9a-f]"
> +
> +  compatible:
> +const: hisilicon,hi6421v600-spmi

Also, use the compatible string as the filename.
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Re: [PATCH v4 18/21] mfd: hi6421-spmi-pmic: move driver from staging

2021-02-05 Thread Rob Herring
On Tue, Jan 19, 2021 at 05:10:44PM +0100, Mauro Carvalho Chehab wrote:
> This driver is ready for mainstream. So, move it out of staging.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../mfd/hisilicon,hi6421-spmi-pmic.yaml   | 135 +
>  MAINTAINERS   |   7 +
>  drivers/mfd/Kconfig   |  15 +
>  drivers/mfd/Makefile  |   1 +
>  drivers/mfd/hi6421-spmi-pmic.c| 281 ++
>  drivers/staging/hikey9xx/Kconfig  |  16 -
>  drivers/staging/hikey9xx/Makefile |   1 -
>  drivers/staging/hikey9xx/hi6421-spmi-pmic.c   | 281 --
>  .../hikey9xx/hisilicon,hi6421-spmi-pmic.yaml  | 135 -
>  9 files changed, 439 insertions(+), 433 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
>  create mode 100644 drivers/mfd/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml 
> b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
> new file mode 100644
> index ..3b23ad56b31a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
> @@ -0,0 +1,135 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/hisilicon,hi6421-spmi-pmic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon 6421v600 SPMI PMIC
> +
> +maintainers:
> +  - Mauro Carvalho Chehab 
> +
> +description: |
> +  HiSilicon 6421v600 should be connected inside a MIPI System Power 
> Management
> +  (SPMI) bus. It provides interrupts and power supply.
> +
> +  The GPIO and interrupt settings are represented as part of the top-level 
> PMIC
> +  node.
> +
> +  The SPMI controller part is provided by
> +  drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml.
> +
> +properties:
> +  $nodename:
> +pattern: "pmic@[0-9a-f]"
> +
> +  compatible:
> +const: hisilicon,hi6421v600-spmi

'-spmi' is redundant.

> +
> +  reg:
> +maxItems: 1
> +
> +  '#interrupt-cells':
> +const: 2
> +
> +  interrupt-controller:
> +description:
> +  Identify that the PMIC is capable of behaving as an interrupt 
> controller.

Don't need a description here.

Don't you need 'interrupts' here to get the interrupts to the host?

> +
> +  gpios:
> +maxItems: 1

GPIO for what? It's preferred to have a named gpio.

> +
> +  regulators:
> +type: object
> +
> +properties:
> +  '#address-cells':
> +const: 1
> +
> +  '#size-cells':
> +const: 0
> +
> +patternProperties:
> +  '^ldo[0-9]+@[0-9a-f]$':
> +type: object
> +
> +$ref: "/schemas/regulator/regulator.yaml#"

   additionalProperties: false

Which will give you errors in the example.

> +
> +required:
> +  - compatible
> +  - reg
> +  - regulators
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +/* pmic properties */
> +
> +pmic: pmic@0 {
> +  compatible = "hisilicon,hi6421-spmi";
> +  reg = <0 0>;
> +
> +  #interrupt-cells = <2>;
> +  interrupt-controller;
> +  gpios = <&gpio28 0 0>;
> +
> +  regulators {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +ldo3: LDO3 {

LDO3: ldo3  {

is preferred and closer to what you defined above.

> +  regulator-name = "ldo3";
> +  regulator-min-microvolt = <150>;
> +  regulator-max-microvolt = <200>;
> +  regulator-boot-on;
> +};
> +
> +ldo4: LDO4 {
> +  regulator-name = "ldo4";
> +  regulator-min-microvolt = <1725000>;
> +  regulator-max-microvolt = <190>;
> +  regulator-boot-on;
> +};
> +
> +ldo9: LDO9 {
> +  regulator-name = "ldo9";
> +  regulator-min-microvolt = <175>;
> +  regulator-max-microvolt = <330>;
> +  regulator-boot-on;
> +};
> +
> +ldo15: LDO15 {
> +  regulator-name = "ldo15";
> +  regulator-min-microvolt = <180>;
> +  regulator-max-microvolt = <300>;
> +  regulator-always-on;
> +};
> +
> +ldo16: LDO16 {
> +  regulator-name = "ldo16";
> +  regulator-min-microvolt = <180>;
> +  regulator-max-microvolt = <300>;
> +  regulator-boot-on;
> +};
> +
> +ldo17: LDO17 {
> +  regulator-name = "ldo17";
> +  regulator-min-microvolt = <250>;
> +  regulator-max-microvolt = <330>;
> +};
> +
> +ldo33: LDO33 {
> +  regulator-name = "ldo33";
> +  regulator-min-microvolt = <250>;
> +  regulator-max-microvolt = <330>;
> +  regulator-boot

Re: [PATCH v4 17/21] spmi: hisi-spmi-controller: move driver from staging

2021-02-05 Thread Rob Herring
On Tue, Jan 19, 2021 at 05:10:43PM +0100, Mauro Carvalho Chehab wrote:
> The Hisilicon 6421v600 SPMI driver is ready for mainstream.
> 
> So, move it from staging.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../spmi/hisilicon,hisi-spmi-controller.yaml  |  75 
>  MAINTAINERS   |   7 +
>  drivers/spmi/Kconfig  |   9 +
>  drivers/spmi/Makefile |   1 +
>  drivers/spmi/hisi-spmi-controller.c   | 358 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   1 -
>  .../staging/hikey9xx/hisi-spmi-controller.c   | 358 --
>  .../hisilicon,hisi-spmi-controller.yaml   |  75 
>  9 files changed, 450 insertions(+), 445 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
>  create mode 100644 drivers/spmi/hisi-spmi-controller.c
>  delete mode 100644 drivers/staging/hikey9xx/hisi-spmi-controller.c
>  delete mode 100644 
> drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml 
> b/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
> new file mode 100644
> index ..21f68a9c2df1
> --- /dev/null
> +++ 
> b/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon SPMI controller
> +
> +maintainers:
> +  - Mauro Carvalho Chehab 
> +
> +description: |
> +  The HiSilicon SPMI BUS controller is found on some Kirin-based designs.
> +  It is a MIPI System Power Management (SPMI) controller.
> +
> +  The PMIC part is provided by
> +  drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml.
> +
> +properties:
> +  $nodename:
> +pattern: "spmi@[0-9a-f]"
> +
> +  compatible:
> +const: hisilicon,kirin970-spmi-controller

'-controller' is kind of redundant.

> +
> +  reg:
> +maxItems: 1
> +

> +  "#address-cells":
> +const: 2
> +
> +  "#size-cells":
> +const: 0

These 2 are covered by spmi.yaml

> +
> +  spmi-channel:
> +description: |
> +  number of the Kirin 970 SPMI channel where the SPMI devices are 
> connected.

Common to SPMI? If not, needs a vendor prefix.

Type? Range of values?

> +
> +required:
> +  - compatible
> +  - reg
> +  - spmi-channel

> +  - "#address-cells"
> +  - "#size-cells"

Covered by spmi.yaml.

> +
> +patternProperties:
> +  "^pmic@[0-9a-f]$":

Presumably you could have something besides a PMIC.

> +description: |
> +  PMIC properties, which are specific to the used SPMI PMIC device(s).
> +  When used in combination with HiSilicon 6421v600, the properties
> +  are documented at
> +  drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml.
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +bus {
> +  #address-cells = <2>;
> +  #size-cells = <2>;
> +
> +  spmi: spmi@fff24000 {
> +compatible = "hisilicon,kirin970-spmi-controller";
> +#address-cells = <2>;
> +#size-cells = <0>;
> +status = "ok";

Drop status.

> +reg = <0x0 0xfff24000 0x0 0x1000>;
> +spmi-channel = <2>;
> +
> +pmic@0 {
> +  reg = <0 0>;
> +  /* pmic properties */
> +};
> +  };
> +};
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8d858e8d5a52..85e5b6ab57ca 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7999,6 +7999,13 @@ F: drivers/crypto/hisilicon/sec2/sec_crypto.c
>  F:   drivers/crypto/hisilicon/sec2/sec_crypto.h
>  F:   drivers/crypto/hisilicon/sec2/sec_main.c
>  
> +HISILICON SPMI CONTROLLER DRIVER FOR HIKEY 970
> +M:   Mauro Carvalho Chehab 
> +L:   linux-ker...@vger.kernel.org
> +S:   Maintained
> +F:   
> Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
> +F:   drivers/spmi/hisi-spmi-controller.c
> +
>  HISILICON STAGING DRIVERS FOR HIKEY 960/970
>  M:   Mauro Carvalho Chehab 
>  L:   de...@driverdev.osuosl.org
> diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
> index a53bad541f1a..2874b6c26028 100644
> --- a/drivers/spmi/Kconfig
> +++ b/drivers/spmi/Kconfig
> @@ -11,6 +11,15 @@ menuconfig SPMI
>  
>  if SPMI
>  
> +config SPMI_HISI3670
> + tristate "Hisilicon 3670 SPMI Controller"
> + select IRQ_DOMAIN_HIERARCHY
> + depends on HAS_IOMEM
> + help
> +   If you say yes to this option, support will be included for the
> +   built-in SPMI PMIC Arbiter interface on Hisilicon 3670
> +   processors.
> +
>  config SPMI_MSM_PMIC_ARB
>   tristate "Qualcomm MSM SPMI Controller (PMIC Arbiter)"
>   select IRQ_DOMAIN_HIERARCHY
> diff --git a/drivers/spmi/Makefile b/drive

Re: [PATCH v4 5/5] phy: phy-hi3670-usb3: move driver from staging into phy

2021-02-05 Thread Rob Herring
On Tue, 19 Jan 2021 11:44:43 +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../bindings/phy/hisilicon,hi3670-usb3.yaml   |  73 ++
>  MAINTAINERS   |   9 +-
>  drivers/phy/hisilicon/Kconfig |  10 +
>  drivers/phy/hisilicon/Makefile|   1 +
>  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 668 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   2 -
>  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 668 --
>  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  73 --
>  9 files changed, 760 insertions(+), 755 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> 

Acked-by: Rob Herring 
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Re: [PATCH v2 4/4] phy: phy-hi3670-usb3: move driver from staging into phy

2021-01-22 Thread Rob Herring
On Tue, Jan 19, 2021 at 4:26 AM Mauro Carvalho Chehab
 wrote:
>
> Em Thu, 14 Jan 2021 19:47:31 -0600
> Rob Herring  escreveu:
>
> > On Thu, Jan 14, 2021 at 06:35:44PM +0100, Mauro Carvalho Chehab wrote:
> > > The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> > > for mainstream. Mode it from staging into the main driver's
> > > phy/ directory.
> > >
> > > Signed-off-by: Mauro Carvalho Chehab 
> > > ---
> > >  .../bindings/phy/phy-hi3670-usb3.yaml |  72 ++
> > >  MAINTAINERS   |   9 +-
> > >  drivers/phy/hisilicon/Kconfig |  10 +
> > >  drivers/phy/hisilicon/Makefile|   1 +
> > >  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 668 ++
> > >  drivers/staging/hikey9xx/Kconfig  |  11 -
> > >  drivers/staging/hikey9xx/Makefile |   2 -
> > >  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 668 --
> > >  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  72 --
> > >  9 files changed, 759 insertions(+), 754 deletions(-)
> > >  create mode 100644 
> > > Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> > >  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
> > >  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
> > >  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml 
> > > b/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> > > new file mode 100644
> > > index ..125a5d6546ae
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> > > @@ -0,0 +1,72 @@
> > > +# SPDX-License-Identifier: GPL-2.0
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Hisilicon Kirin970 USB PHY
> > > +
> > > +maintainers:
> > > +  - Mauro Carvalho Chehab 
> >
> > Blank line.
>
> Ok.
>
> >
> > > +description: |+
> > > +  Bindings for USB3 PHY on HiSilicon Kirin 970.
> > > +
> > > +properties:
> > > +  compatible:
> > > +const: hisilicon,hi3670-usb-phy
> > > +
> > > +  "#phy-cells":
> > > +const: 0
> > > +
> > > +  hisilicon,pericrg-syscon:
> > > +$ref: '/schemas/types.yaml#/definitions/phandle'
> > > +description: phandle of syscon used to control iso refclk.
> > > +
> > > +  hisilicon,pctrl-syscon:
> > > +$ref: '/schemas/types.yaml#/definitions/phandle'
> > > +description: phandle of syscon used to control usb tcxo.
> > > +
> > > +  hisilicon,sctrl-syscon:
> > > +$ref: '/schemas/types.yaml#/definitions/phandle'
> > > +description: phandle of syscon used to control phy deep sleep.
> > > +
> > > +  hisilicon,eye-diagram-param:
> > > +$ref: /schemas/types.yaml#/definitions/uint32
> > > +description: Eye diagram for phy.
> > > +
> > > +  hisilicon,tx-vboost-lvl:
> > > +$ref: /schemas/types.yaml#/definitions/uint32
> > > +description: TX level vboost for phy.
> > > +
> > > +required:
> > > +  - compatible
> > > +  - hisilicon,pericrg-syscon
> > > +  - hisilicon,pctrl-syscon
> > > +  - hisilicon,sctrl-syscon
> > > +  - hisilicon,eye-diagram-param
> > > +  - hisilicon,tx-vboost-lvl
> > > +  - "#phy-cells"
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > +  - |
> > > +bus {
> > > +  #address-cells = <2>;
> > > +  #size-cells = <2>;
> > > +
> > > +  usb3_otg_bc: usb3_otg_bc@ff20 {
> > > +compatible = "syscon", "simple-mfd";
> > > +reg = <0x0 0xff20 0x0 0x1000>;
> > > +
> > > +usb_phy {
> >
> > Is there a contiguous register region for this sub-block? If so, add
> > 'reg' even though Linux doesn't need it currently.
>
> No. The driver uses 4 syscon regions in order to access the needed
> registers:

I meant just for the parent device node. I assume these are the 'main'
registers? If not, then maybe it should be a child of one of the other
syscons.

'reg' would just be for documentation ATM. However, if the subblock
was reused on another chip, but at a different offset then reg would
become useful. You could handle that with a fixed offset when 'reg' is
missing, but adding it later would be too late.

Rob
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Re: [PATCH v2 10/13] mfd: hi6421-spmi-pmic: move driver from staging

2021-01-18 Thread Rob Herring
On Mon, 18 Jan 2021 14:28:11 +0100, Mauro Carvalho Chehab wrote:
> This driver is ready for mainstream. So, move it out of staging.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../mfd/hisilicon,hi6421-spmi-pmic.yaml   | 133 +++
>  MAINTAINERS   |   7 +
>  drivers/mfd/Kconfig   |  15 +
>  drivers/mfd/Makefile  |   1 +
>  drivers/mfd/hi6421-spmi-pmic.c| 342 ++
>  drivers/staging/hikey9xx/Kconfig  |  16 -
>  drivers/staging/hikey9xx/Makefile |   1 -
>  drivers/staging/hikey9xx/hi6421-spmi-pmic.c   | 342 --
>  .../hikey9xx/hisilicon,hi6421-spmi-pmic.yaml  | 133 ---
>  9 files changed, 498 insertions(+), 492 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
>  create mode 100644 drivers/mfd/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml:
 'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml:
 ignoring, error in schema: 
warning: no schema found in file: 
./Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml

See https://patchwork.ozlabs.org/patch/1428169

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v3 4/4] phy: phy-hi3670-usb3: move driver from staging into phy

2021-01-15 Thread Rob Herring
On Fri, 15 Jan 2021 09:10:03 +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../bindings/phy/phy-hi3670-usb3.yaml |  72 ++
>  MAINTAINERS   |   9 +-
>  drivers/phy/hisilicon/Kconfig |  10 +
>  drivers/phy/hisilicon/Makefile|   1 +
>  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 668 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   2 -
>  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 668 --
>  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  72 --
>  9 files changed, 759 insertions(+), 754 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
./Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml: $id: relative 
path/filename doesn't match actual path or filename
expected: http://devicetree.org/schemas/phy/phy-hi3670-usb3.yaml#

See https://patchwork.ozlabs.org/patch/1426831

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v2 4/4] phy: phy-hi3670-usb3: move driver from staging into phy

2021-01-14 Thread Rob Herring
On Thu, Jan 14, 2021 at 06:35:44PM +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../bindings/phy/phy-hi3670-usb3.yaml |  72 ++
>  MAINTAINERS   |   9 +-
>  drivers/phy/hisilicon/Kconfig |  10 +
>  drivers/phy/hisilicon/Makefile|   1 +
>  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 668 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   2 -
>  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 668 --
>  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  72 --
>  9 files changed, 759 insertions(+), 754 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml 
> b/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> new file mode 100644
> index ..125a5d6546ae
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon Kirin970 USB PHY
> +
> +maintainers:
> +  - Mauro Carvalho Chehab 

Blank line.

> +description: |+
> +  Bindings for USB3 PHY on HiSilicon Kirin 970.
> +
> +properties:
> +  compatible:
> +const: hisilicon,hi3670-usb-phy
> +
> +  "#phy-cells":
> +const: 0
> +
> +  hisilicon,pericrg-syscon:
> +$ref: '/schemas/types.yaml#/definitions/phandle'
> +description: phandle of syscon used to control iso refclk.
> +
> +  hisilicon,pctrl-syscon:
> +$ref: '/schemas/types.yaml#/definitions/phandle'
> +description: phandle of syscon used to control usb tcxo.
> +
> +  hisilicon,sctrl-syscon:
> +$ref: '/schemas/types.yaml#/definitions/phandle'
> +description: phandle of syscon used to control phy deep sleep.
> +
> +  hisilicon,eye-diagram-param:
> +$ref: /schemas/types.yaml#/definitions/uint32
> +description: Eye diagram for phy.
> +
> +  hisilicon,tx-vboost-lvl:
> +$ref: /schemas/types.yaml#/definitions/uint32
> +description: TX level vboost for phy.
> +
> +required:
> +  - compatible
> +  - hisilicon,pericrg-syscon
> +  - hisilicon,pctrl-syscon
> +  - hisilicon,sctrl-syscon
> +  - hisilicon,eye-diagram-param
> +  - hisilicon,tx-vboost-lvl
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +bus {
> +  #address-cells = <2>;
> +  #size-cells = <2>;
> +
> +  usb3_otg_bc: usb3_otg_bc@ff20 {
> +compatible = "syscon", "simple-mfd";
> +reg = <0x0 0xff20 0x0 0x1000>;
> +
> +usb_phy {

Is there a contiguous register region for this sub-block? If so, add 
'reg' even though Linux doesn't need it currently.

> +  compatible = "hisilicon,hi3670-usb-phy";
> +  #phy-cells = <0>;
> +  hisilicon,pericrg-syscon = <&crg_ctrl>;
> +  hisilicon,pctrl-syscon = <&pctrl>;
> +  hisilicon,sctrl-syscon = <&sctrl>;
> +  hisilicon,eye-diagram-param = <0xfdfee4>;
> +  hisilicon,tx-vboost-lvl = <0x5>;
> +};
> +  };
> +};
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Re: [PATCH v2 4/4] phy: phy-hi3670-usb3: move driver from staging into phy

2021-01-14 Thread Rob Herring
On Thu, 14 Jan 2021 18:35:44 +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../bindings/phy/phy-hi3670-usb3.yaml |  72 ++
>  MAINTAINERS   |   9 +-
>  drivers/phy/hisilicon/Kconfig |  10 +
>  drivers/phy/hisilicon/Makefile|   1 +
>  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 668 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   2 -
>  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 668 --
>  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  72 --
>  9 files changed, 759 insertions(+), 754 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
./Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml: $id: relative 
path/filename doesn't match actual path or filename
expected: http://devicetree.org/schemas/phy/phy-hi3670-usb3.yaml#

See https://patchwork.ozlabs.org/patch/1426545

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v4 08/15] dt-bindings: media: Add A31 MIPI CSI-2 bindings documentation

2021-01-11 Thread Rob Herring
On Thu, 31 Dec 2020 15:29:41 +0100, Paul Kocialkowski wrote:
> This introduces YAML bindings documentation for the A31 MIPI CSI-2
> controller.
> 
> Signed-off-by: Paul Kocialkowski 
> ---
>  .../media/allwinner,sun6i-a31-mipi-csi2.yaml  | 149 ++
>  1 file changed, 149 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v4 02/24] dt-bindings: introduce silabs,wfx.yaml

2021-01-07 Thread Rob Herring
On Wed, Dec 23, 2020 at 04:39:03PM +0100, Jerome Pouiller wrote:
> From: Jérôme Pouiller 

Commit message?

checkpatch.pl reports trailing whitespace errors.

> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 133 ++
>  1 file changed, 133 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml 
> b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> new file mode 100644
> index ..487d46c5fdc0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> @@ -0,0 +1,133 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020, Silicon Laboratories, Inc.
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Silicon Labs WFxxx devicetree bindings
> +
> +maintainers:
> +  - Jérôme Pouiller 
> +
> +description: >
> +  Support for the Wifi chip WFxxx from Silicon Labs. Currently, the only 
> device
> +  from the WFxxx series is the WF200 described here:
> + https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
> +  
> +  The WF200 can be connected via SPI or via SDIO.
> +  
> +  For SDIO:
> +  
> +Declaring the WFxxx chip in device tree is mandatory (usually, the 
> VID/PID is
> +sufficient for the SDIO devices).
> +  
> +It is recommended to declare a mmc-pwrseq on SDIO host above WFx. Without
> +it, you may encounter issues during reboot. The mmc-pwrseq should be
> +compatible with mmc-pwrseq-simple. Please consult
> +Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt for more
> +information.
> +  
> +  For SPI:
> +  
> +In add of the properties below, please consult
> +Documentation/devicetree/bindings/spi/spi-controller.yaml for optional 
> SPI
> +related properties.
> +
> +properties:
> +  compatible:
> +const: silabs,wf200
> +
> +  reg:
> +description:
> +  When used on SDIO bus,  must be set to 1. When used on SPI bus, 
> it is
> +  the chip select address of the device as defined in the SPI devices
> +  bindings.
> +maxItems: 1
> +
> +  spi-max-frequency: true
> +
> +  interrupts:
> +description: The interrupt line. Triggers IRQ_TYPE_LEVEL_HIGH and
> +  IRQ_TYPE_EDGE_RISING are both supported by the chip and the driver. 
> When
> +  SPI is used, this property is required. When SDIO is used, the 
> "in-band"
> +  interrupt provided by the SDIO bus is used unless an interrupt is 
> defined
> +  in the Device Tree.
> +maxItems: 1
> +
> +  reset-gpios:
> +description: (SPI only) Phandle of gpio that will be used to reset chip
> +  during probe. Without this property, you may encounter issues with warm
> +  boot. (For legacy purpose, the gpio in inverted when compatible ==
> +  "silabs,wfx-spi")
> +
> +  For SDIO, the reset gpio should declared using a mmc-pwrseq.
> +maxItems: 1
> +
> +  wakeup-gpios:
> +description: Phandle of gpio that will be used to wake-up chip. Without 
> this
> +  property, driver will disable most of power saving features.
> +maxItems: 1
> +
> +  silabs,antenna-config-file:
> +$ref: /schemas/types.yaml#/definitions/string
> +description: Use an alternative file for antenna configuration (aka
> +  "Platform Data Set" in Silabs jargon). Default is 'wf200.pds'.
> +
> +  local-mac-address: true
> +
> +  mac-address: true
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +
> +examples:
> +  - |
> +#include 
> +#include 
> +
> +spi0 {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +wifi@0 {
> +compatible = "silabs,wf200";
> +pinctrl-names = "default";
> +pinctrl-0 = <&wfx_irq &wfx_gpios>;
> +reg = <0>;
> +interrupts-extended = <&gpio 16 IRQ_TYPE_EDGE_RISING>;
> +wakeup-gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
> +reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
> +spi-max-frequency = <4200>;
> +};
> +};
> +
> +  - |
> +#include 
> +#include 
> +
> +wfx_pwrseq: wfx_pwrseq {
> +compatible = "mmc-pwrseq-simple";
> +pinctrl-names = "default";
> +pinctrl-0 = <&wfx_reset>;
> +reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
> +};
> +
> +mmc0 {
> +mmc-pwrseq = <&wfx_pwrseq>;
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +wifi@1 {
> +compatible = "silabs,wf200";
> +pinctrl-names = "default";
> +pinctrl-0 = <&wfx_wakeup>;
> +reg = <1>;
> +wakeup-gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
> +};
> +};
> +...
> -- 
> 2.29.2
> 
_

Re: [PATCH v5 2/6] dt: bindings: add mt7621-clk device tree binding documentation

2020-12-31 Thread Rob Herring
On Sun, Dec 20, 2020 at 10:37:20AM +0100, Sergio Paracuellos wrote:
> Adds device tree binding documentation for clocks in the
> MT7621 SOC.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../bindings/clock/mediatek,mt7621-clk.yaml   | 52 +++
>  1 file changed, 52 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml 
> b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> new file mode 100644
> index ..f58d01bdc82c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MT7621 Clock Device Tree Bindings
> +
> +maintainers:
> +  - Sergio Paracuellos 
> +
> +description: |
> +  The MT7621 has a PLL controller from where the cpu clock is provided
> +  as well as derived clocks for the bus and the peripherals. It also
> +  can gate SoC device clocks.
> +
> +  Each clock is assigned an identifier and client nodes use this identifier
> +  to specify the clock which they consume.
> +
> +  All these identifiers could be found in:
> +  [1]: .
> +
> +properties:
> +  compatible:
> +const: mediatek,mt7621-clk
> +
> +  "#clock-cells":
> +description:
> +  The first cell indicates the clock number, see [1] for available
> +  clocks.
> +const: 1
> +
> +  clock-output-names:
> +maxItems: 8
> +
> +required:
> +  - compatible
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +#include 
> +
> +pll {
> +  compatible = "mediatek,mt7621-clk";
> +  #clock-cells = <1>;
> +  clock-output-names = "xtal", "cpu", "bus",
> +   "50m", "125m", "150m",
> +   "250m", "270m";

How do you access this h/w. There's nothing defined like 'reg' or 
a parent node or...

The suggestion on v4 was to get rid of the child node by merging it with 
the parent like this:

+sysc: sysc@0 {
+  compatible = "mediatek,mt7621-sysc", "syscon";
+  reg = <0x0 0x100>;
+  #clock-cells = <1>;
+  clock-output-names = "xtal", "cpu", "bus",
+ "50m", "125m", "150m",
+ "250m", "270m";
+};

Whether you need child nodes or not really depends on what all is in the 
'mt7621-sysc' h/w block.

Rob
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Re: [PATCH v2 06/48] dt-bindings: clock: tegra: Document clocks sub-node

2020-12-21 Thread Rob Herring
On Thu, Dec 17, 2020 at 09:05:56PM +0300, Dmitry Osipenko wrote:
> Document "clocks" sub-node which describes Tegra SoC clocks that require
> a higher voltage of the core power domain in order to operate properly on
> a higher rates.

Seems like an odd reason to have a bunch of child nodes. It very much 
seems like a problem you'd need to solve after you design the binding 
which should be fixed within the kernel.

This is also above my threshold for 'convert to schema' first...

> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../bindings/clock/nvidia,tegra20-car.txt | 26 +++
>  .../bindings/clock/nvidia,tegra30-car.txt | 26 +++
>  2 files changed, 52 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt 
> b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
> index 6c5901b503d0..353354477785 100644
> --- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
> +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
> @@ -19,6 +19,16 @@ Required properties :
>In clock consumers, this cell represents the bit number in the CAR's
>array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
>  
> +Optional child sub-node "clocks" should contain nodes matching the clocks
> +on the Tegra SoC. Refer to Tegra TRM for mode details on the clock nodes.
> +
> +Required properties :
> +- compatible : Should be "nvidia,tegra20-clock".
> +- operating-points-v2: See ../bindings/opp/opp.txt for details.
> +- clocks : Should contain clock which corresponds to the node.
> +- power-domains: Phandle to a power domain node as described by generic
> + PM domain bindings.
> +
>  Example SoC include file:
>  
>  / {
> @@ -27,6 +37,22 @@ Example SoC include file:
>   reg = <0x60006000 0x1000>;
>   #clock-cells = <1>;
>   #reset-cells = <1>;
> +
> + clocks {
> + hdmi {
> + compatible = "nvidia,tegra20-clock";
> + operating-points-v2 = <&hdmi_opp_table>;
> + clocks = <&tegra_car TEGRA20_CLK_HDMI>;
> + power-domains = <&domain>;
> + };
> +
> + pll_m {
> + compatible = "nvidia,tegra20-clock";
> + operating-points-v2 = <&pll_m_opp_table>;
> + clocks = <&tegra_car TEGRA20_CLK_PLL_M>;
> + power-domains = <&domain>;
> + };
> + };
>   };
>  
>   usb@c5004000 {
> diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt 
> b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
> index 63618cde12df..bc7bbdaa9d3f 100644
> --- a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
> +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
> @@ -19,6 +19,16 @@ Required properties :
>In clock consumers, this cell represents the bit number in the CAR's
>array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
>  
> +Optional child sub-node "clocks" should contain nodes matching the clocks
> +on the Tegra SoC. Refer to Tegra TRM for mode details on the clock nodes.
> +
> +Required properties :
> +- compatible : Should be "nvidia,tegra30-clock".
> +- operating-points-v2: See ../bindings/opp/opp.txt for details.
> +- clocks : Should contain clock which corresponds to the node.
> +- power-domains: Phandle to a power domain node as described by generic
> + PM domain bindings.
> +
>  Example SoC include file:
>  
>  / {
> @@ -31,6 +41,22 @@ Example SoC include file:
>  
>   usb@c5004000 {
>   clocks = <&tegra_car TEGRA30_CLK_USB2>;
> +
> + clocks {
> + hdmi {
> + compatible = "nvidia,tegra30-clock";
> + operating-points-v2 = <&hdmi_opp_table>;
> + clocks = <&tegra_car TEGRA30_CLK_HDMI>;
> + power-domains = <&domain>;
> + };
> +
> + pll_m {
> + compatible = "nvidia,tegra30-clock";
> + operating-points-v2 = <&pll_m_opp_table>;
> + clocks = <&tegra_car TEGRA30_CLK_PLL_M>;
> + power-domains = <&domain>;
> + };
> + };
>   };
>  };
>  
> -- 
> 2.29.2
> 
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Re: [PATCH v2 04/48] dt-bindings: host1x: Document OPP and power domain properties

2020-12-21 Thread Rob Herring
On Thu, 17 Dec 2020 21:05:54 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and power domain properties of the Host1x bus
> and devices sitting on the bus.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../display/tegra/nvidia,tegra20-host1x.txt   | 49 +++
>  1 file changed, 49 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v2 05/48] media: dt: bindings: tegra-vde: Document OPP and power domain properties

2020-12-21 Thread Rob Herring
On Thu, 17 Dec 2020 21:05:55 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and power domain properties of the video
> decoder engine.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../devicetree/bindings/media/nvidia,tegra-vde.txt   | 12 
>  1 file changed, 12 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v2 02/48] dt-bindings: memory: tegra30: emc: Replace core regulator with power domain

2020-12-21 Thread Rob Herring
On Thu, Dec 17, 2020 at 09:05:52PM +0300, Dmitry Osipenko wrote:
> Power domain fits much better than a voltage regulator in regards to
> a proper hardware description and from a software perspective as well.
> Hence replace the core regulator with the power domain. Note that this
> doesn't affect any existing DTBs because we haven't started to use the
> regulator yet, and thus, it's okay to change it.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../bindings/memory-controllers/nvidia,tegra30-emc.yaml | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git 
> a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
>  
> b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
> index 0a2e2c0d0fdd..7b4af9169b0b 100644
> --- 
> a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
> +++ 
> b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
> @@ -39,9 +39,9 @@ properties:
>  description:
>Phandle of the Memory Controller node.
>  
> -  core-supply:
> +  power-domains:
>  description:
> -  Phandle of voltage regulator of the SoC "core" power domain.
> +  Phandle to the SoC "core" power domain.

power-domains needs to define how many (maxItems).

>  
>operating-points-v2:
>  description:
> @@ -241,7 +241,7 @@ examples:
>  
>  nvidia,memory-controller = <&mc>;
>  operating-points-v2 = <&dvfs_opp_table>;
> -core-supply = <&vdd_core>;
> +power-domains = <&domain>;
>  
>  #interconnect-cells = <0>;
>  
> -- 
> 2.29.2
> 
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Re: [PATCH v2 01/48] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain

2020-12-21 Thread Rob Herring
On Thu, 17 Dec 2020 21:05:51 +0300, Dmitry Osipenko wrote:
> Power domain fits much better than a voltage regulator in regards to
> a proper hardware description and from a software perspective as well.
> Hence replace the core regulator with the power domain. Note that this
> doesn't affect any existing DTBs because we haven't started to use the
> regulator yet, and thus, it's okay to change it.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../bindings/memory-controllers/nvidia,tegra20-emc.txt| 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation

2020-12-17 Thread Rob Herring
On Thu, Dec 17, 2020 at 2:58 AM Stephen Boyd  wrote:
>
> Quoting Sergio Paracuellos (2020-11-22 01:55:52)
> > Adds device tree binding documentation for clocks in the
> > MT7621 SOC.
> >
> > Signed-off-by: Sergio Paracuellos 
> > ---
> >  .../bindings/clock/mediatek,mt7621-clk.yaml   | 67 +++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> >
>
> Rob?

Send to the DT list please.

But I agree with Stephen's comment. Either make the syscon complete
(fully describe the h/w, not just what you need ATM) to show the need
for child nodes or get rid of the child nodes.

Rob
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Re: [PATCH 1/8] dt-bindings: pinctrl: rt2880: properly redo bindings

2020-12-15 Thread Rob Herring
On Sun, 13 Dec 2020 17:17:14 +0100, Sergio Paracuellos wrote:
> When this bindings where applied there weren't already
> reviewed and some old hacks was being used to properly
> pass the schemas checks. This commits fix them up:
>  - Instead of using 'if-then' clause use '-pins$'.
>  - 'groups' and 'function' are included inside a new
>'^(.*-)?pinmux$' node.
>  - compatible string is not an 'enum' but a 'const'.
>  - 'pinctrl-0' and 'pinctrl-names' removed since they are
> used in consumer nodes.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../pinctrl/ralink,rt2880-pinmux.yaml | 62 +--
>  1 file changed, 28 insertions(+), 34 deletions(-)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v3 08/15] dt-bindings: media: Add A31 MIPI CSI-2 bindings documentation

2020-12-14 Thread Rob Herring
On Mon, Dec 14, 2020 at 12:35:09PM +0100, Maxime Ripard wrote:
> On Fri, Dec 11, 2020 at 04:57:01PM +0100, Paul Kocialkowski wrote:
> > This introduces YAML bindings documentation for the A31 MIPI CSI-2
> > controller.
> > 
> > Signed-off-by: Paul Kocialkowski 
> > ---
> >  .../media/allwinner,sun6i-a31-mipi-csi2.yaml  | 149 ++
> >  1 file changed, 149 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> > 
> > diff --git 
> > a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> >  
> > b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> > new file mode 100644
> > index ..4d0bab541da1
> > --- /dev/null
> > +++ 
> > b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> > @@ -0,0 +1,149 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Allwinner A31 MIPI CSI-2 Device Tree Bindings
> > +
> > +maintainers:
> > +  - Paul Kocialkowski 
> > +
> > +properties:
> > +  compatible:
> > +oneOf:
> > +  - const: allwinner,sun6i-a31-mipi-csi2
> > +  - items:
> > +  - const: allwinner,sun8i-v3s-mipi-csi2
> > +  - const: allwinner,sun6i-a31-mipi-csi2
> > +
> > +  reg:
> > +maxItems: 1
> > +
> > +  interrupts:
> > +maxItems: 1
> > +
> > +  clocks:
> > +items:
> > +  - description: Bus Clock
> > +  - description: Module Clock
> > +
> > +  clock-names:
> > +items:
> > +  - const: bus
> > +  - const: mod
> > +
> > +  phys:
> > +items:
> > +  - description: MIPI D-PHY
> 
> This should be written as
> 
> phys:
>   description: ...

Then you need 'maxItems: 1' or just that. I guess there is some value in 
saying it is a D-PHY.

Rob

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Re: [PATCH v3 06/15] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port

2020-12-14 Thread Rob Herring
On Fri, 11 Dec 2020 16:56:59 +0100, Paul Kocialkowski wrote:
> The A31 CSI controller supports two distinct input interfaces:
> parallel and an external MIPI CSI-2 bridge. The parallel interface
> is often connected to a set of hardware pins while the MIPI CSI-2
> bridge is an internal FIFO-ish link. As a result, these two inputs
> are distinguished as two different ports.
> 
> Note that only one of the two may be present on a controller instance.
> For example, the V3s has one controller dedicated to MIPI-CSI2 and one
> dedicated to parallel.
> 
> Update the binding with an explicit ports node that holds two distinct
> port nodes: one for parallel input and one for MIPI CSI-2.
> 
> This is backward-compatible with the single-port approach that was
> previously taken for representing the parallel interface port, which
> stays enumerated as fwnode port 0.
> 
> Note that additional ports may be added in the future, especially to
> support feeding the CSI controller's output to the ISP.
> 
> Signed-off-by: Paul Kocialkowski 
> ---
>  .../media/allwinner,sun6i-a31-csi.yaml| 88 ---
>  1 file changed, 75 insertions(+), 13 deletions(-)
> 

Reviewed-by: Rob Herring 

Though, it may need updating to use video-interfaces and graph 
schemas[1] depending what lands first.

[1] 
https://lore.kernel.org/linux-devicetree/20201210211625.3070388-4-r...@kernel.org/
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Re: [PATCH v2 16/19] dt-bindings: media: Add A83T MIPI CSI-2 bindings documentation

2020-12-10 Thread Rob Herring
On Sat, 28 Nov 2020 15:28:36 +0100, Paul Kocialkowski wrote:
> This introduces YAML bindings documentation for the A83T MIPI CSI-2
> controller.
> 
> Signed-off-by: Paul Kocialkowski 
> ---
>  .../media/allwinner,sun8i-a83t-mipi-csi2.yaml | 147 ++
>  1 file changed, 147 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml
> 

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Re: [PATCH v1 2/2] Staging: silabs si4455 serial driver: docs device tree binding

2020-12-10 Thread Rob Herring
On Thu, 10 Dec 2020 12:21:56 +, József Horváth wrote:
> add: device tree binding schema
> 
> Signed-off-by: József Horváth 
> ---
>  .../bindings/serial/silabs,si4455.yaml| 53 +++
>  MAINTAINERS   |  2 +-
>  2 files changed, 54 insertions(+), 1 deletion(-)
>  create mode 100644 
> Documentation/devicetree/bindings/serial/silabs,si4455.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Error: 
Documentation/devicetree/bindings/serial/silabs,si4455.example.dts:19.9-14 
syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:342: 
Documentation/devicetree/bindings/serial/silabs,si4455.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [Makefile:1364: dt_binding_check] Error 2


See https://patchwork.ozlabs.org/patch/1414082

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v1 2/2] Staging: silabs si4455 serial driver: docs device tree binding

2020-12-10 Thread Rob Herring
On Thu, Dec 10, 2020 at 12:21:56PM +, József Horváth wrote:
> add: device tree binding schema

For the subject, follow conventions of the directory. Something like:

dt-bindings: serial: Add SiLabs SI4455 schema

> Signed-off-by: József Horváth 
> ---
>  .../bindings/serial/silabs,si4455.yaml| 53 +++
>  MAINTAINERS   |  2 +-
>  2 files changed, 54 insertions(+), 1 deletion(-)
>  create mode 100644 
> Documentation/devicetree/bindings/serial/silabs,si4455.yaml
> 
> diff --git a/Documentation/devicetree/bindings/serial/silabs,si4455.yaml 
> b/Documentation/devicetree/bindings/serial/silabs,si4455.yaml
> new file mode 100644
> index ..80a73a61755b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/silabs,si4455.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/serial/silabs,si4455.yaml#";
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#";
> +
> +title: Silicon Labs Si4455 device tree bindings

Add 'description' with some info on this h/w and possibly a link to 
datasheet if available.

> +
> +maintainers:
> +  - József Horváth 
> +
> +allOf:
> +  - $ref: "/schemas/serial.yaml#"
> +
> +properties:
> +  compatible:
> +const: silabs,si4455
> +
> +  reg:
> +maxItems: 1
> +
> +  interrupts:
> +maxItems: 1
> +
> +  spi-max-frequency:
> +description: maximum clock frequency on SPI port
> +maximum: 50
> +
> +  shutdown-gpios:
> +description: gpio pin for SDN
> +maxItems: 1
> +
> +required:
> +  - reg
> +  - interrupts
> +  - spi-max-frequency
> +  - shutdown-gpios
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +&spi0 {
> +  serial0: si4455@0 {
> +compatible = "silabs,si4455";
> +reg = <0>;
> +interrupt-parent = <&gpio>;
> +interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +shutdown-gpios = <&gpio 26 1>;
> +spi-max-frequency = <30>;
> +  };
> +};
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a29bc17d446d..16cc96971ac2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15937,7 +15937,7 @@ F:drivers/platform/x86/touchscreen_dmi.c
>  SILICON LABS SI4455 SERIAL DRIVER
>  M:   József Horváth 
>  S:   Maintained
> -F:   Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt

This is a new file, right?

> +F:   Documentation/devicetree/bindings/serial/silabs,si4455.yaml
>  F:   drivers/tty/serial/si4455.c
>  F:   drivers/tty/serial/si4455_api.h
>  
> -- 
> 2.17.1
> 
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Re: [PATCH v2 1/2] dt-bindings: pinctrl: rt2880: add binding document

2020-12-10 Thread Rob Herring
On Tue, Dec 08, 2020 at 08:55:22AM +0100, Sergio Paracuellos wrote:
> The commit adds rt2880 compatible node in binding document.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../pinctrl/ralink,rt2880-pinmux.yaml | 70 +++
>  1 file changed, 70 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml 
> b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml
> new file mode 100644
> index ..7dea3e26d99e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/ralink,rt2880-pinmux.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ralink rt2880 pinmux controller
> +
> +maintainers:
> +  - Sergio Paracuellos 
> +
> +description:
> +  The rt2880 pinmux can only set the muxing of pin groups. muxing indiviual 
> pins
> +  is not supported. There is no pinconf support.
> +
> +properties:
> +  compatible:
> +enum:
> +  - ralink,rt2880-pinmux

What's the control interface as you have no 'reg' property.

> +
> +  pinctrl-0:
> +description:
> +  A phandle to the node containing the subnodes containing default
> +  configurations. This is for pinctrl hogs.
> +
> +  pinctrl-names:
> +description:
> +  A pinctrl state named "default" can be defined.
> +const: default

These 2 properties go in consumer nodes.

> +
> +required:
> +  - compatible
> +
> +patternProperties:
> +  '[a-z0-9_-]+':
> +if:
> +  type: object
> +  description: node for pinctrl.
> +  $ref: "pinmux-node.yaml"
> +then:

For new bindings, don't do this hack. Just name the nodes '-pins$'

> +  properties:
> +groups:
> +  description: Name of the pin group to use for the functions.
> +  enum: [i2c, spi, uart1, uart2, uart3, rgmii1, rgmii2, mdio,
> + pcie, sdhci]
> +function:
> +  description: The mux function to select
> +  enum: [gpio, i2c, spi, uart1, uart2, uart3, rgmii1, rgmii2,
> + mdio, nand1, nand2, sdhci]

 additionalProperties: false
 
> +
> +additionalProperties: false
> +
> +examples:
> +  # Pinmux controller node
> +  - |
> +pinctrl {
> +  compatible = "ralink,rt2880-pinmux";
> +  pinctrl-names = "default";
> +  pinctrl-0 = <&state_default>;
> +
> +  state_default: pinctrl0 {
> +  };
> +
> +  i2c_pins: i2c0 {
> +i2c0 {
> +  groups = "i2c";
> +  function = "i2c";
> +};
> +  };
> +};
> -- 
> 2.25.1
> 
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Re: [PATCH] Staging: silabs si4455 serial driver

2020-12-09 Thread Rob Herring
On Wed, Dec 9, 2020 at 5:17 AM Info  wrote:
>
> This is a serial port driver for
> Silicon Labs Si4455 Sub-GHz transciver.
>
> Signed-off-by: József Horváth 
> ---
>  .../bindings/staging/serial/silabs,si4455.txt |   39 +

Looks straightforward enough to not be in staging. Plus
bindings/staging/serial is not a directory I want.

DT bindings are in DT schema format now. See
Documentation/devicetree/writing-schema.rst.

>  drivers/staging/Kconfig   |2 +
>  drivers/staging/Makefile  |1 +
>  drivers/staging/si4455/Kconfig|8 +
>  drivers/staging/si4455/Makefile   |2 +
>  drivers/staging/si4455/TODO   |3 +
>  drivers/staging/si4455/si4455.c   | 1465 +
>  drivers/staging/si4455/si4455_api.h   |   56 +
>  8 files changed, 1576 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
>  create mode 100644 drivers/staging/si4455/Kconfig
>  create mode 100644 drivers/staging/si4455/Makefile
>  create mode 100644 drivers/staging/si4455/TODO
>  create mode 100644 drivers/staging/si4455/si4455.c
>  create mode 100644 drivers/staging/si4455/si4455_api.h
>
> diff --git
> a/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> new file mode 100644
> index ..abd659b7b952
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> @@ -0,0 +1,39 @@
> +* Silicon Labs Si4455 EASY-TO-USE, LOW-CURRENT OOK/(G)FSK SUB-GHZ
> TRANSCEIVER
> +
> +Required properties:
> +- compatible: Should be one of the following:
> +  - "silabs,si4455" for Silicon Labs Si4455-B1A or Si4455-C2A (driver
> automatically detects the part info),

Either do this or...

> +  - "silabs,si4455b1a" for Silicon Labs Si4455-B1A,
> +  - "silabs,si4455c2a" for Silicon Labs Si4455-C2A,

this. Not both. I assume there's an id register or something you can
read to determine which one. That's fine, but consider if there's any
power sequencing differences that you'd need to handle before you can
read that register.

> +- reg: SPI chip select number.
> +- interrupts: Specifies the interrupt source of the parent interrupt
> +  controller. The format of the interrupt specifier depends on the
> +  parent interrupt controller.
> +- clocks: phandle to the IC source clock (only external clock source
> supported).
> +- spi-max-frequency: maximum clock frequency on SPI port
> +- shdn-gpios: gpio pin for SDN

shutdown-gpios is the semi-standard name.

> +
> +Example:
> +
> +/ {
> +   clocks {
> +si4455_1_2_osc: si4455_1_2_osc {
> +compatible = "fixed-clock";
> +#clock-cells = <0>;
> +clock-frequency  = <3000>;
> +};
> +   };

Don't need to show this for the example.

> +};
> +
> +&spi0 {
> +   si4455: si4455@0 {
> +   compatible = "silabs,si4455";
> +   reg = <0>;
> +   clocks = <&si4455_1_2_osc>;
> +   interrupt-parent = <&gpio>;
> +   interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +shdn-gpios = <&gpio 26 1>;
> +status = "okay";

Don't show status in examples.

> +spi-max-frequency = <300>;
> +   };
> +};
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Re: [PATCH v2 06/19] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port

2020-12-08 Thread Rob Herring
On Wed, Dec 02, 2020 at 03:16:44PM +0100, Paul Kocialkowski wrote:
> Hi,
> 
> On Tue 01 Dec 20, 11:43, Maxime Ripard wrote:
> > On Sat, Nov 28, 2020 at 03:28:26PM +0100, Paul Kocialkowski wrote:
> > > The A31 CSI controller supports two distinct input interfaces:
> > > parallel and an external MIPI CSI-2 bridge. The parallel interface
> > > is often connected to a set of hardware pins while the MIPI CSI-2
> > > bridge is an internal FIFO-ish link. As a result, these two inputs
> > > are distinguished as two different ports.
> > > 
> > > Note that only one of the two may be present on a controller instance.
> > > For example, the V3s has one controller dedicated to MIPI-CSI2 and one
> > > dedicated to parallel.
> > > 
> > > Update the binding with an explicit ports node that holds two distinct
> > > port nodes: one for parallel input and one for MIPI CSI-2.
> > > 
> > > This is backward-compatible with the single-port approach that was
> > > previously taken for representing the parallel interface port, which
> > > stays enumerated as fwnode port 0. However, it is now marked as
> > > deprecated and the multi-port approach should be preferred.
> > > 
> > > Note that additional ports may be added in the future, especially to
> > > support feeding the CSI controller's output to the ISP.
> > > 
> > > Signed-off-by: Paul Kocialkowski 
> > > ---
> > >  .../media/allwinner,sun6i-a31-csi.yaml| 86 ---
> > >  1 file changed, 73 insertions(+), 13 deletions(-)
> > > 
> > > diff --git 
> > > a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml 
> > > b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
> > > index 1fd9b5532a21..3bcee2d44f3c 100644
> > > --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
> > > +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
> > > @@ -43,6 +43,7 @@ properties:
> > ># See ./video-interfaces.txt for details
> > >port:
> > >  type: object
> > > +deprecated: true
> > 
> > I'm not sure we want to deprecate it. There's some SoCs with the same
> > controller but without the MIPI-CSI block where this would be completely
> > valid
> 
> I think we'll need to deprecate it when adding support for the ISP anyway,
> so I figured we might as well do it now. But I'm okay to postpone this for 
> now.
> 
> > >  properties:
> > >endpoint:
> > > @@ -67,6 +68,59 @@ properties:
> > >  
> > >  additionalProperties: false
> > >  
> > > +  ports:
> > > +type: object
> > > +
> > > +properties:
> > > +  port@0:
> > > +type: object
> > > +description: Parallel input port, connect to a parallel sensor
> > > +
> > > +properties:
> > > +  reg:
> > > +const: 0
> > > +
> > > +  endpoint:
> > > +type: object
> > > +
> > > +properties:
> > > +  remote-endpoint: true
> > > +
> > > +  bus-width:
> > > +enum: [ 8, 10, 12, 16 ]
> > > +
> > > +  pclk-sample: true
> > > +  hsync-active: true
> > > +  vsync-active: true
> > > +
> > > +required:
> > > +  - bus-width
> > > +  - remote-endpoint
> > > +
> > > +required:
> > > +  - endpoint
> > > +
> > > +additionalProperties: false
> > > +
> > > +  port@1:
> > > +type: object
> > > +description: MIPI CSI-2 bridge input port
> > > +
> > > +properties:
> > > +  reg:
> > > +const: 1
> > > +
> > > +  endpoint:
> > > +type: object
> > > +
> > > +properties:
> > > +  remote-endpoint: true
> > > +
> > > +required:
> > > +  - remote-endpoint
> > > +
> > > +additionalProperties: false
> > 
> > There's a schema for the OF-graph now, you'll want to use it.
> 
> I didn't know that, thanks for the tip! Will look into it.

There's about to be. Don't use what's in graph.yaml (in dt-schema) yet.

Rob
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Re: [PATCH v3 5/6] dt-bindings: media: cedrus: Add V3s compatible

2020-12-01 Thread Rob Herring
On Mon, 16 Nov 2020 13:56:16 +0100, Martin Cerveny wrote:
> Allwinner V3s SoC contains video engine. Add compatible for it.
> 
> Signed-off-by: Martin Cerveny 
> ---
>  .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring 
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Re: [PATCH v3 2/6] dt-bindings: sram: allwinner, sun4i-a10-system-control: Add V3s compatibles

2020-12-01 Thread Rob Herring
On Mon, 16 Nov 2020 13:56:13 +0100, Martin Cerveny wrote:
> Allwinner V3s has system control similar to that in H3.
> Add compatibles for system control with SRAM C1 region.
> 
> Signed-off-by: Martin Cerveny 
> ---
>  .../bindings/sram/allwinner,sun4i-a10-system-control.yaml  | 3 +++
>  1 file changed, 3 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v3 2/5] dt: bindings: add mt7621-clk device tree binding documentation

2020-11-21 Thread Rob Herring
On Fri, Nov 13, 2020 at 04:46:29PM +0100, Sergio Paracuellos wrote:
> Adds device tree binding documentation for clocks in the
> MT7621 SOC.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../bindings/clock/mediatek,mt7621-clk.yaml   | 61 +++
>  1 file changed, 61 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml 
> b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> new file mode 100644
> index ..363bd9880e29
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MT7621 Clock Device Tree Bindings
> +
> +maintainers:
> +  - Sergio Paracuellos 
> +
> +description: |
> +  The MT7621 has a PLL controller from where the cpu clock is provided
> +  as well as derived clocks for the bus and the peripherals. It also
> +  can gate SoC device clocks.
> +
> +  Each clock is assigned an identifier and client nodes use this identifier
> +  to specify the clock which they consume.
> +
> +  All these identifiers could be found in:
> +  [1]: .
> +
> +properties:
> +  compatible:
> +const: mediatek,mt7621-clk
> +
> +  ralink,sysctl:
> +$ref: /schemas/types.yaml#/definitions/phandle
> +description:
> +  phandle to the syscon which is in the same address area with syscon
> +  device.
> +
> +  "#clock-cells":
> +description:
> +  The first cell indicates the clock gate number, see [1] for available
> +  clocks.
> +const: 1
> +
> +  clock-output-names:
> +maxItems: 8
> +
> +required:
> +  - compatible
> +  - ralink,sysctl
> +  - '#clock-cells'
> +  - clock-output-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +#include 
> +
> +pll {
> +  compatible = "mediatek,mt7621-clk";
> +  ralink,sysctl = <&sysc>;

If this is the only control interface, then make this a child of 'sysc'. 
And use 'reg' if there's a dedicated range of registers.

> +  #clock-cells = <1>;
> +  clock-output-names = "xtal", "cpu", "bus",
> +   "50m", "125m", "150m",
> +   "250m", "270m";
> +};
> -- 
> 2.25.1
> 
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Re: [PATCH v3 1/5] dt-bindings: clock: add dt binding header for mt7621 clocks

2020-11-21 Thread Rob Herring
On Fri, 13 Nov 2020 16:46:28 +0100, Sergio Paracuellos wrote:
> Adds dt binding header for 'mediatek,mt7621-clk' clocks.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  include/dt-bindings/clock/mt7621-clk.h | 41 ++
>  1 file changed, 41 insertions(+)
>  create mode 100644 include/dt-bindings/clock/mt7621-clk.h
> 

Acked-by: Rob Herring 
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Re: [PATCH 2/7] dt: bindings: add mt7621-pll device tree binding documentation

2020-11-16 Thread Rob Herring
On Wed, 11 Nov 2020 17:30:08 +0100, Sergio Paracuellos wrote:
> Adds device tree binding documentation for PLL controller in
> the MT7621 SOC.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../bindings/clock/mediatek,mt7621-pll.yaml   | 51 +++
>  1 file changed, 51 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH 3/8] mfd: hi6421-spmi-pmic: move driver from staging

2020-11-16 Thread Rob Herring
On Mon, 16 Nov 2020 13:59:29 +0100, Mauro Carvalho Chehab wrote:
> This driver is ready for mainstream. So, move it out of staging.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../mfd/hisilicon,hi6421-spmi-pmic.yaml   | 159 
>  MAINTAINERS   |   7 +
>  drivers/mfd/Kconfig   |  15 +
>  drivers/mfd/Makefile  |   1 +
>  drivers/mfd/hi6421-spmi-pmic.c| 342 ++
>  drivers/staging/hikey9xx/Kconfig  |  16 -
>  drivers/staging/hikey9xx/Makefile |   1 -
>  drivers/staging/hikey9xx/hi6421-spmi-pmic.c   | 342 --
>  .../hikey9xx/hisilicon,hi6421-spmi-pmic.yaml  | 159 
>  9 files changed, 524 insertions(+), 518 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
>  create mode 100644 drivers/mfd/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hi6421-spmi-pmic.c
>  delete mode 100644 drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml:
 'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml:
 ignoring, error in schema: 
warning: no schema found in file: 
./Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml


See https://patchwork.ozlabs.org/patch/1400898

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH 2/8] spmi: hi6421-spmi-pmic: move driver from staging

2020-11-16 Thread Rob Herring
On Mon, 16 Nov 2020 13:59:28 +0100, Mauro Carvalho Chehab wrote:
> The Hisilicon 6421v600 SPMI driver is ready for mainstream.
> 
> So, move it from staging.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../spmi/hisilicon,hisi-spmi-controller.yaml  |  62 +++
>  MAINTAINERS   |   7 +
>  drivers/spmi/Kconfig  |   9 +
>  drivers/spmi/Makefile |   1 +
>  drivers/spmi/hisi-spmi-controller.c   | 358 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   1 -
>  .../staging/hikey9xx/hisi-spmi-controller.c   | 358 --
>  .../hisilicon,hisi-spmi-controller.yaml   |  62 ---
>  9 files changed, 437 insertions(+), 432 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
>  create mode 100644 drivers/spmi/hisi-spmi-controller.c
>  delete mode 100644 drivers/staging/hikey9xx/hisi-spmi-controller.c
>  delete mode 100644 
> drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml:34:2:
 [warning] wrong indentation: expected 2 but found 1 (indentation)

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml:
 'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml:
 ignoring, error in schema: 
warning: no schema found in file: 
./Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.example.dts:29.20-31.15:
 Warning (unit_address_vs_reg): /example-0/bus/spmi@fff24000/pmic@0: node has a 
unit name, but no reg or ranges property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.example.dt.yaml:
 spmi@fff24000: pmic@0: 'reg' is a required property
From schema: 
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/spmi.yaml


See https://patchwork.ozlabs.org/patch/1400897

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH 1/8] phy: phy-hi3670-usb3: move driver from staging into phy

2020-11-16 Thread Rob Herring
On Mon, 16 Nov 2020 13:59:27 +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../bindings/phy/phy-hi3670-usb3.yaml |  72 ++
>  MAINTAINERS   |   9 +-
>  drivers/phy/hisilicon/Kconfig |  10 +
>  drivers/phy/hisilicon/Makefile|   1 +
>  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 671 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   2 -
>  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 671 --
>  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  72 --
>  9 files changed, 762 insertions(+), 757 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
./Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml: $id: relative 
path/filename doesn't match actual path or filename
expected: http://devicetree.org/schemas/phy/phy-hi3670-usb3.yaml#


See https://patchwork.ozlabs.org/patch/1400895

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH 1/8] phy: phy-hi3670-usb3: move driver from staging into phy

2020-11-16 Thread Rob Herring
On Mon, Nov 16, 2020 at 01:59:27PM +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's

s/Mode/Move/

> phy/ directory.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../bindings/phy/phy-hi3670-usb3.yaml |  72 ++
>  MAINTAINERS   |   9 +-
>  drivers/phy/hisilicon/Kconfig |  10 +
>  drivers/phy/hisilicon/Makefile|   1 +
>  drivers/phy/hisilicon/phy-hi3670-usb3.c   | 671 ++
>  drivers/staging/hikey9xx/Kconfig  |  11 -
>  drivers/staging/hikey9xx/Makefile |   2 -
>  drivers/staging/hikey9xx/phy-hi3670-usb3.c| 671 --
>  drivers/staging/hikey9xx/phy-hi3670-usb3.yaml |  72 --

I assume this is only a move? Use '-M' option.

>  9 files changed, 762 insertions(+), 757 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.c
>  delete mode 100644 drivers/staging/hikey9xx/phy-hi3670-usb3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml 
> b/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> new file mode 100644
> index ..125a5d6546ae
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-hi3670-usb3.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon Kirin970 USB PHY
> +
> +maintainers:
> +  - Mauro Carvalho Chehab 
> +description: |+
> +  Bindings for USB3 PHY on HiSilicon Kirin 970.
> +
> +properties:
> +  compatible:
> +const: hisilicon,hi3670-usb-phy
> +
> +  "#phy-cells":
> +const: 0
> +
> +  hisilicon,pericrg-syscon:
> +$ref: '/schemas/types.yaml#/definitions/phandle'
> +description: phandle of syscon used to control iso refclk.
> +
> +  hisilicon,pctrl-syscon:
> +$ref: '/schemas/types.yaml#/definitions/phandle'
> +description: phandle of syscon used to control usb tcxo.
> +
> +  hisilicon,sctrl-syscon:
> +$ref: '/schemas/types.yaml#/definitions/phandle'
> +description: phandle of syscon used to control phy deep sleep.
> +
> +  hisilicon,eye-diagram-param:
> +$ref: /schemas/types.yaml#/definitions/uint32
> +description: Eye diagram for phy.
> +
> +  hisilicon,tx-vboost-lvl:
> +$ref: /schemas/types.yaml#/definitions/uint32
> +description: TX level vboost for phy.
> +
> +required:
> +  - compatible
> +  - hisilicon,pericrg-syscon
> +  - hisilicon,pctrl-syscon
> +  - hisilicon,sctrl-syscon
> +  - hisilicon,eye-diagram-param
> +  - hisilicon,tx-vboost-lvl
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +bus {
> +  #address-cells = <2>;
> +  #size-cells = <2>;
> +
> +  usb3_otg_bc: usb3_otg_bc@ff20 {
> +compatible = "syscon", "simple-mfd";
> +reg = <0x0 0xff20 0x0 0x1000>;
> +
> +usb_phy {
> +  compatible = "hisilicon,hi3670-usb-phy";
> +  #phy-cells = <0>;
> +  hisilicon,pericrg-syscon = <&crg_ctrl>;
> +  hisilicon,pctrl-syscon = <&pctrl>;
> +  hisilicon,sctrl-syscon = <&sctrl>;
> +  hisilicon,eye-diagram-param = <0xfdfee4>;
> +  hisilicon,tx-vboost-lvl = <0x5>;
> +};
> +  };
> +};
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e451dcce054f..14266bb79ff8 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -18083,7 +18083,7 @@ L:linux-...@vger.kernel.org
>  S:   Maintained
>  F:   drivers/usb/roles/intel-xhci-usb-role-switch.c
>  
> -USB IP DRIVER FOR HISILICON KIRIN
> +USB IP DRIVER FOR HISILICON KIRIN 960
>  M:   Yu Chen 
>  M:   Binghui Wang 
>  L:   linux-...@vger.kernel.org
> @@ -18091,6 +18091,13 @@ S:   Maintained
>  F:   Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml
>  F:   drivers/phy/hisilicon/phy-hi3660-usb3.c
>  
> +USB IP DRIVER FOR HISILICON KIRIN 970
> +M:   Mauro Carvalho Chehab 
> +L:   linux-...@vger.kernel.org
> +S:   Maintained
> +F:   Documentation/devicetree/bindings/phy/hisilicon,kirin970-usb3.yaml
> +F:   drivers/phy/hisilicon/phy-kirin970-usb3.c
> +
>  USB ISP116X DRIVER
>  M:   Olav Kongas 
>  L:   linux-...@vger.kernel.org
> diff --git a/drivers/phy/hisilicon/Kconfig b/drivers/phy/hisilicon/Kconfig
> index 1c73053bcc98..4d008cfc279c 100644
> --- a/drivers/phy/hisilicon/Kconfig
> +++ b/drivers/phy/hisilicon/Kconfig
> @@ -23,6 +23,16 @@ config PHY_HI3660_USB
>  
> To compile this driver as a module, choose M here.
>  
> +config PHY_HI3670_USB
> + tristate "hi3670 USB PHY support"
> + depends on (ARCH_HISI && ARM64) || COMPILE_TEST
> + select GENERIC_PHY
> + select MFD_SYSCON
> + help
> +   

Re: [PATCH v1 04/30] media: dt: bindings: tegra-vde: Document OPP and voltage regulator properties

2020-11-09 Thread Rob Herring
On Thu, 05 Nov 2020 02:44:01 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and voltage regulator properties of the
> video decoder engine.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../devicetree/bindings/media/nvidia,tegra-vde.txt   | 12 
>  1 file changed, 12 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v1 06/30] dt-bindings: usb: tegra-ehci: Document OPP and voltage regulator properties

2020-11-09 Thread Rob Herring
On Thu, 05 Nov 2020 02:44:03 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and voltage regulator properties of the
> Tegra EHCI controller.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v1 05/30] dt-binding: usb: ci-hdrc-usb2: Document OPP and voltage regulator properties

2020-11-09 Thread Rob Herring
On Thu, 05 Nov 2020 02:44:02 +0300, Dmitry Osipenko wrote:
> Document new OPP table and NVIDIA Tegra-specific voltage regulator
> properties.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 4 
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v1 03/30] dt-bindings: pwm: tegra: Document OPP and voltage regulator properties

2020-11-09 Thread Rob Herring
On Thu, 05 Nov 2020 02:44:00 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and voltage regulator properties of the
> PWM controller.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt  | 13 +
>  1 file changed, 13 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v1 02/30] dt-bindings: mmc: tegra: Document OPP and voltage regulator properties

2020-11-09 Thread Rob Herring
On Thu, 05 Nov 2020 02:43:59 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and voltage regulator properties of the
> SDHCI controller.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 12 
>  1 file changed, 12 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v1 01/30] dt-bindings: host1x: Document OPP and voltage regulator properties

2020-11-09 Thread Rob Herring
On Thu, 05 Nov 2020 02:43:58 +0300, Dmitry Osipenko wrote:
> Document new DVFS OPP table and voltage regulator properties of the
> Host1x bus and devices sitting on the bus.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../display/tegra/nvidia,tegra20-host1x.txt   | 56 +++
>  1 file changed, 56 insertions(+)
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v4 1/4] dt-bindings: phy: Add binding for Mediatek MT7621 PCIe PHY

2020-11-04 Thread Rob Herring
On Sat, 31 Oct 2020 13:22:43 +0100, Sergio Paracuellos wrote:
> Add bindings to describe Mediatek MT7621 PCIe PHY.
> 
> Signed-off-by: Sergio Paracuellos 
> ---
>  .../bindings/phy/mediatek,mt7621-pci-phy.yaml | 36 +++
>  1 file changed, 36 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v3 02/24] dt-bindings: introduce silabs,wfx.yaml

2020-11-04 Thread Rob Herring
On Wed, 04 Nov 2020 16:51:45 +0100, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 131 ++
>  1 file changed, 131 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml:
 'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml:
 ignoring, error in schema: 
warning: no schema found in file: 
./Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml


See https://patchwork.ozlabs.org/patch/1394182

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v7 1/7] dt-bindings: add documentation of xilinx clocking wizard

2020-11-04 Thread Rob Herring
On Wed, Nov 04, 2020 at 08:36:41PM +0530, Shubhrajyoti Datta wrote:
> Add the devicetree binding for the xilinx clocking wizard.
> 
> Signed-off-by: Shubhrajyoti Datta 
> ---
> v6:
> Fix a yaml warning
> v7:
> Add vendor prefix speed-grade
> 
>  .../bindings/clock/xlnx,clocking-wizard.yaml   | 65 
> ++
>  1 file changed, 65 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml 
> b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> new file mode 100644
> index 000..a19b9bb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx clocking wizard
> +
> +maintainers:
> +  - Shubhrajyoti Datta 
> +
> +description: |
> +  The clocking wizard is a soft ip clocking block of Xilinx versal. It
> +  reads required input clock frequencies from the devicetree and acts as 
> clock
> +  clock output.
> +
> +select: false

Why? That's one way to make the example pass with your schema...

> +
> +properties:
> +  compatible:
> +  - enum:
> +  - xlnx,clocking-wizard
> +
> +  "#clock-cells":
> +const: 1
> +
> +  clocks:
> +items:
> +  - description: clock input
> +  - description: axi clock
> +
> +  clock-names:
> +items:
> +  - const: clk_in1
> +  - const: s_axi_aclk
> +
> +  xlnx,speed-grade:
> +  - $ref: /schemas/types.yaml#/definitions/uint32
> +  - enum: [1, 2, 3]
> +description:
> +  Speed grade of the device.
> +
> +required:
> +  - compatible
> +  - "#clock-cells"
> +  - clocks
> +  - clock-names
> +  - speed-grade
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +clock-generator@4004 {
> +#clock-cells = <1>;
> +reg = <0x4004 0x1000>;
> +compatible = "xlnx,clocking-wizard";
> +xlnx,speed-grade = <1>;
> +clock-names = "clk_in1", "s_axi_aclk";
> +clocks = <&clkc 15>, <&clkc 15>;
> +clock-output-names = "clk_out1", "clk_out2",
> +"clk_out3", "clk_out4", "clk_out5",
> +"clk_out6", "clk_out7";
> +};
> +...
> -- 
> 2.1.1
> 
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Re: [PATCH v7 1/7] dt-bindings: add documentation of xilinx clocking wizard

2020-11-04 Thread Rob Herring
On Wed, 04 Nov 2020 20:36:41 +0530, Shubhrajyoti Datta wrote:
> Add the devicetree binding for the xilinx clocking wizard.
> 
> Signed-off-by: Shubhrajyoti Datta 
> ---
> v6:
> Fix a yaml warning
> v7:
> Add vendor prefix speed-grade
> 
>  .../bindings/clock/xlnx,clocking-wizard.yaml   | 65 
> ++
>  1 file changed, 65 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml:21:7: 
[warning] wrong indentation: expected 4 but found 6 (indentation)
./Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml:38:7: 
[warning] wrong indentation: expected 4 but found 6 (indentation)
./Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml:40:5: 
[error] syntax error: expected , but found '' 
(syntax)

dtschema/dtc warnings/errors:
Traceback (most recent call last):
  File "/usr/local/bin/dt-extract-example", line 45, in 
binding = yaml.load(open(args.yamlfile, encoding='utf-8').read())
  File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/main.py", line 343, 
in load
return constructor.get_single_data()
  File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/constructor.py", 
line 111, in get_single_data
node = self.composer.get_single_node()
  File "_ruamel_yaml.pyx", line 706, in _ruamel_yaml.CParser.get_single_node
  File "_ruamel_yaml.pyx", line 724, in _ruamel_yaml.CParser._compose_document
  File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
  File "_ruamel_yaml.pyx", line 889, in 
_ruamel_yaml.CParser._compose_mapping_node
  File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
  File "_ruamel_yaml.pyx", line 891, in 
_ruamel_yaml.CParser._compose_mapping_node
  File "_ruamel_yaml.pyx", line 904, in _ruamel_yaml.CParser._parse_next_event
ruamel.yaml.parser.ParserError: while parsing a block mapping
  in "", line 20, column 3
did not find expected key
  in "", line 40, column 5
make[1]: *** [Documentation/devicetree/bindings/Makefile:20: 
Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.example.dts] Error 
1
make[1]: *** Deleting file 
'Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.example.dts'
make[1]: *** Waiting for unfinished jobs
make[1]: *** [Documentation/devicetree/bindings/Makefile:59: 
Documentation/devicetree/bindings/processed-schema-examples.json] Error 123
make: *** [Makefile:1364: dt_binding_check] Error 2


See https://patchwork.ozlabs.org/patch/1394053

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH v3 09/11] dt-bindings: pwm: Add binding for RPi firmware PWM bus

2020-11-04 Thread Rob Herring
On Wed, 04 Nov 2020 11:39:35 +0100, Nicolas Saenz Julienne wrote:
> The PWM bus controlling the fan in RPi's official PoE hat can only be
> controlled by the board's co-processor.
> 
> Signed-off-by: Nicolas Saenz Julienne 
> Reviewed-by: Rob Herring 
> 
> ---
> 
> Changes since v1:
>  - Update bindings to use 2 #pwm-cells
> 
>  .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 20 +++
>  .../pwm/raspberrypi,firmware-pwm.h| 13 
>  2 files changed, 33 insertions(+)
>  create mode 100644 include/dt-bindings/pwm/raspberrypi,firmware-pwm.h
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.example.dt.yaml:
 firmware: pwm:#pwm-cells:0:0: 2 was expected
From schema: 
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml


See https://patchwork.ozlabs.org/patch/1393804

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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Re: [PATCH 07/14] dt-bindings: media: i2c: Add A31 MIPI CSI-2 bindings documentation

2020-10-30 Thread Rob Herring
On Fri, Oct 23, 2020 at 07:45:39PM +0200, Paul Kocialkowski wrote:
> This introduces YAML bindings documentation for the A31 MIPI CSI-2
> controller.
> 
> Signed-off-by: Paul Kocialkowski 
> ---
>  .../media/allwinner,sun6i-a31-mipi-csi2.yaml  | 168 ++
>  1 file changed, 168 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml 
> b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> new file mode 100644
> index ..9adc0bc27033
> --- /dev/null
> +++ 
> b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
> @@ -0,0 +1,168 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license new bindings.

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner A31 MIPI CSI-2 Device Tree Bindings
> +
> +maintainers:
> +  - Paul Kocialkowski 
> +
> +properties:
> +  compatible:
> +oneOf:
> +  - const: allwinner,sun6i-a31-mipi-csi2
> +  - items:
> +  - const: allwinner,sun8i-v3s-mipi-csi2
> +  - const: allwinner,sun6i-a31-mipi-csi2
> +
> +  reg:
> +maxItems: 1
> +
> +  interrupts:
> +maxItems: 1
> +
> +  clocks:
> +items:
> +  - description: Bus Clock
> +  - description: Module Clock
> +
> +  clock-names:
> +items:
> +  - const: bus
> +  - const: mod
> +
> +  phys:
> +items:
> +  - description: MIPI D-PHY
> +
> +  phy-names:
> +items:
> +  - const: dphy
> +
> +  resets:
> +maxItems: 1
> +
> +  # See ./video-interfaces.txt for details
> +  ports:
> +type: object
> +
> +properties:
> +  port@0:
> +type: object
> +description: Input port, connect to a MIPI CSI-2 sensor
> +
> +properties:
> +  reg:
> +const: 0
> +
> +  endpoint:
> +type: object
> +
> +properties:
> +  remote-endpoint: true
> +
> +  bus-type:
> +const: 4
> +
> +  clock-lanes:
> +maxItems: 1
> +
> +  data-lanes:
> +minItems: 1
> +maxItems: 4
> +
> +required:
> +  - bus-type
> +  - data-lanes
> +  - remote-endpoint
> +
> +additionalProperties: false
> +
> +required:
> +  - endpoint
> +
> +additionalProperties: false
> +
> +  port@1:
> +type: object
> +description: Output port, connect to a CSI controller
> +
> +properties:
> +  reg:
> +const: 1
> +
> +  endpoint:
> +type: object
> +
> +properties:
> +  remote-endpoint: true
> +
> +  bus-type:
> +const: 4
> +
> +additionalProperties: false
> +
> +required:
> +  - endpoint
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - resets
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +#include 
> +#include 
> +#include 
> +
> +mipi_csi2: mipi-csi2@1cb1000 {

I agree with using 'csi' here as that is at least aligned with 'dsi' 
meaning the host side of the protocol. We've not been consistent here...

> +compatible = "allwinner,sun8i-v3s-mipi-csi2",
> + "allwinner,sun6i-a31-mipi-csi2";
> +reg = <0x01cb1000 0x1000>;
> +interrupts = ;
> +clocks = <&ccu CLK_BUS_CSI>,
> + <&ccu CLK_CSI1_SCLK>;
> +clock-names = "bus", "mod";
> +resets = <&ccu RST_BUS_CSI>;
> +
> +phys = <&dphy>;
> +phy-names = "dphy";
> +
> +ports {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +mipi_csi2_in: port@0 {
> +reg = <0>;
> +
> +mipi_csi2_in_ov5648: endpoint {
> +bus-type = <4>; /* MIPI CSI-2 D-PHY */
> +clock-lanes = <0>;
> +data-lanes = <1 2 3 4>;
> +
> +remote-endpoint = <&ov5648_out_mipi_csi2>;
> +};
> +};
> +
> +mipi_csi2_out: port@1 {
> +reg = <1>;
> +
> +mipi_csi2_out_csi0: endpoint {
> +bus-type = <4>; /* MIPI CSI-2 D-PHY */
> +remote-endpoint = <&csi0_in_mipi_csi2>;
> +};
> +};
> +};
> +};
> +
> +...
> -- 
> 2.28.0
> 
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Re: [PATCH v2 08/10] dt-bindings: pwm: Add binding for RPi firmware PWM bus

2020-10-30 Thread Rob Herring
On Thu, 22 Oct 2020 17:58:55 +0200, Nicolas Saenz Julienne wrote:
> The PWM bus controlling the fan in RPi's official PoE hat can only be
> controlled by the board's co-processor.
> 
> Signed-off-by: Nicolas Saenz Julienne 
> 
> ---
> Changes since v1:
>  - Update bindings to use 2 #pwm-cells
> 
>  .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 20 +++
>  .../pwm/raspberrypi,firmware-pwm.h| 13 
>  2 files changed, 33 insertions(+)
>  create mode 100644 include/dt-bindings/pwm/raspberrypi,firmware-pwm.h
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v6 5/9] media: staging: rkisp1: remove unecessary clocks

2020-10-29 Thread Rob Herring
On Tue, Oct 20, 2020 at 2:39 PM Helen Koike  wrote:
>
> aclk_isp_wrap is a child of aclk_isp, and hclk_isp_wrap is a child of
> hclk_isp, thus we can remove parents from the list.
>
> Also, for the isp0, we only need the ISP clock, ACLK and HCLK.
> In the future we'll need a pixel clock for RK3288 and RK3399, and a JPEG
> clock for RK3288.
>
> So with the goal to cleanup the dt-bindings and remove it from staging,
> simplify clock names to isp, aclk and hclk.
>
> Assigned clocks are meant to refer to the full path in the clock tree,
> i.e. the leaf in the tree.
> For instance, in RK3399, the clock responsible for ACLK (ISP AXI CLOCK)
> is aclk_isp0_wrapper.
>
> For reference, this is the isp clock topology on RK3399:
>
>  xin24m
> pll_npll
>npll
>   clk_isp1
>   clk_isp0
> pll_cpll
>cpll
>   aclk_isp1
>  aclk_isp1_noc
>  hclk_isp1
> aclk_isp1_wrapper
> hclk_isp1_noc
>   aclk_isp0
>  hclk_isp1_wrapper
>  aclk_isp0_wrapper
>  aclk_isp0_noc
>  hclk_isp0
> hclk_isp0_wrapper
> hclk_isp0_noc
>  pclkin_isp1_wrapper
>
> Signed-off-by: Helen Koike 
> Reviewed-by: Tomasz Figa 
>
> ---
>
> Changes in V6:
> - Define clocks in the top level, and use if/else schema to define how
>   many for each compatible as sugested by Rob Herring on
>   
> https://patchwork.linuxtv.org/project/linux-media/patch/20200722155533.252844-6-helen.ko...@collabora.com/#122626
> ---
>  .../bindings/media/rockchip-isp1.yaml         | 44 +--
>  drivers/staging/media/rkisp1/rkisp1-dev.c |  8 ++--
>  2 files changed, 33 insertions(+), 19 deletions(-)

Reviewed-by: Rob Herring 
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Re: [PATCH v2 02/24] dt-bindings: introduce silabs,wfx.yaml

2020-10-26 Thread Rob Herring
On Tue, Oct 20, 2020 at 02:57:55PM +0200, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 133 ++
>  1 file changed, 133 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml 
> b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> new file mode 100644
> index ..2605e9fed185
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> @@ -0,0 +1,133 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020, Silicon Laboratories, Inc.
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Silicon Labs WFxxx devicetree bindings
> +
> +maintainers:
> +  - Jérôme Pouiller 
> +
> +description: >
> +  Support for the Wifi chip WFxxx from Silicon Labs. Currently, the only 
> device
> +  from the WFxxx series is the WF200 described here:
> + https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
> +  
> +  The WF200 can be connected via SPI or via SDIO.
> +  
> +  For SDIO:
> +  
> +Declaring the WFxxx chip in device tree is mandatory (usually, the 
> VID/PID is
> +sufficient for the SDIO devices).
> +  
> +It is recommended to declare a mmc-pwrseq on SDIO host above WFx. Without
> +it, you may encounter issues during reboot. The mmc-pwrseq should be
> +compatible with mmc-pwrseq-simple. Please consult
> +Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt for more
> +information.
> +  
> +  For SPI:
> +  
> +In add of the properties below, please consult
> +Documentation/devicetree/bindings/spi/spi-controller.yaml for optional 
> SPI
> +related properties.
> +
> +properties:
> +  compatible:
> +const: silabs,wf200
> +
> +  reg:
> +description:
> +  When used on SDIO bus,  must be set to 1. When used on SPI bus, 
> it is
> +  the chip select address of the device as defined in the SPI devices
> +  bindings.
> +maxItems: 1
> +
> +  spi-max-frequency: true
> +
> +  interrupts:
> +description: The interrupt line. Triggers IRQ_TYPE_LEVEL_HIGH and
> +  IRQ_TYPE_EDGE_RISING are both supported by the chip and the driver. 
> When
> +  SPI is used, this property is required. When SDIO is used, the 
> "in-band"
> +  interrupt provided by the SDIO bus is used unless an interrupt is 
> defined
> +  in the Device Tree.
> +maxItems: 1
> +
> +  reset-gpios:
> +description: (SPI only) Phandle of gpio that will be used to reset chip
> +  during probe. Without this property, you may encounter issues with warm
> +  boot. (For legacy purpose, the gpio in inverted when compatible ==
> +  "silabs,wfx-spi")
> +
> +  For SDIO, the reset gpio should declared using a mmc-pwrseq.
> +maxItems: 1
> +
> +  wakeup-gpios:
> +description: Phandle of gpio that will be used to wake-up chip. Without 
> this
> +  property, driver will disable most of power saving features.
> +maxItems: 1
> +
> +  config-file:

If this is antenna data/config, then make the property name more 
specific. And it needs a vendor prefix as it is vendor specific.

> +description: Use an alternative file as PDS. Default is `wf200.pds`.
> +
> +  local-mac-address:
> +$ref: /net/ethernet-controller.yaml#/properties/local-mac-address
> +
> +  mac-address:
> +$ref: /net/ethernet-controller.yaml#/properties/mac-address

I'd rather see these properties refactored out to their own file. We 
should probably have a wifi-controller.yaml that has these as well as 
enforcing the node name 'wifi'.

> +
> +additionalProperties: true

What properties? This shouldn't be true. If you need spi-cpol or 
spi-cpha, then you should list those. Really, if the SPI mode of the 
device is fixed, then you should never use those. 

> +
> +required:
> +  - compatible
> +  - reg
> +
> +examples:
> +  - |
> +#include 
> +#include 
> +
> +spi0 {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +wfx@0 {
> +compatible = "silabs,wf200";
> +pinctrl-names = "default";
> +pinctrl-0 = <&wfx_irq &wfx_gpios>;
> +reg = <0>;
> +interrupts-extended = <&gpio 16 IRQ_TYPE_EDGE_RISING>;
> +wakeup-gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
> +reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
> +spi-max-frequency = <4200>;
> +};
> +};
> +
> +  - |
> +#include 
> +#include 
> +
> +wfx_pwrseq: wfx_pwrseq {
> +compatible = "mmc-pwrseq-simple";
> +pinctrl-names = "default";
> +pinctrl-0 = <&wfx_reset>;
> +reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
> +};
> +
> +   

Re: [PATCH v5 5/9] media: staging: rkisp1: remove unecessary clocks

2020-10-20 Thread Rob Herring
On Wed, Oct 14, 2020 at 11:46 AM Helen Koike  wrote:
>
> Hi Rob,
>
> Thnaks for your reply.
>
> On 9/22/20 11:24 AM, Rob Herring wrote:
> > On Wed, Jul 22, 2020 at 9:56 AM Helen Koike  
> > wrote:
> >>
> >> aclk_isp_wrap is a child of aclk_isp, and hclk_isp_wrap is a child of
> >> hclk_isp, thus we can remove parents from the list.
> >>
> >> Also, for the isp0, we only need the ISP clock, ACLK and HCLK.
> >> In the future we'll need a pixel clock for RK3288 and RK3399, and a JPEG
> >> clock for RK3288.
> >>
> >> So with the goal to cleanup the dt-bindings and remove it from staging,
> >> simplify clock names to isp, aclk and hclk.
> >>
> >> Assigned clocks are meant to refer to the full path in the clock tree,
> >> i.e. the leaf in the tree.
> >> For instance, in RK3399, the clock responsible for ACLK (ISP AXI CLOCK)
> >> is aclk_isp0_wrapper.
> >>
> >> For reference, this is the isp clock topology on RK3399:
> >>
> >>  xin24m
> >> pll_npll
> >>npll
> >>   clk_isp1
> >>   clk_isp0
> >> pll_cpll
> >>cpll
> >>   aclk_isp1
> >>  aclk_isp1_noc
> >>  hclk_isp1
> >> aclk_isp1_wrapper
> >> hclk_isp1_noc
> >>   aclk_isp0
> >>  hclk_isp1_wrapper
> >>  aclk_isp0_wrapper
> >>  aclk_isp0_noc
> >>  hclk_isp0
> >> hclk_isp0_wrapper
> >> hclk_isp0_noc
> >>  pclkin_isp1_wrapper
> >>
> >> Signed-off-by: Helen Koike 
> >>
> >> ---
> >> Changes in V5:
> >> - Use if/then schema as suggested by Rob Herring on
> >> https://patchwork.linuxtv.org/project/linux-media/patch/20200702191322.2639681-6-helen.ko...@collabora.com/#119729
> >>
> >> Changes in V4:
> >> - update binding according to suggestion by Robin Murphy
> >> on https://patchwork.kernel.org/patch/11475007/
> >>
> >> Changes in V3:
> >> - this is a new patch in the series
> >> ---
> >>  .../bindings/media/rockchip-isp1.yaml | 50 ---
> >>  drivers/staging/media/rkisp1/rkisp1-dev.c |  8 ++-
> >>  2 files changed, 36 insertions(+), 22 deletions(-)
> >>
> >> diff --git 
> >> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >>  
> >> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >> index 62a6b9c959498..23c677d15037a 100644
> >> --- 
> >> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >> +++ 
> >> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >> @@ -24,20 +24,10 @@ properties:
> >>  maxItems: 1
> >>
> >>clocks:
> >> -items:
> >> -  - description: ISP clock
> >> -  - description: ISP AXI clock clock
> >> -  - description: ISP AXI clock  wrapper clock
> >> -  - description: ISP AHB clock clock
> >> -  - description: ISP AHB wrapper clock
> >> +minItems: 3
> >
> > You need maxItems here too or it will always be 3.
> >
> >>
> >>clock-names:
> >> -items:
> >> -  - const: clk_isp
> >> -  - const: aclk_isp
> >> -  - const: aclk_isp_wrap
> >> -  - const: hclk_isp
> >> -  - const: hclk_isp_wrap
> >> +minItems: 3
> >>
> >>iommus:
> >>  maxItems: 1
> >> @@ -116,6 +106,34 @@ required:
> >>- power-domains
> >>- ports
> >>
> >> +if:
> >> +  properties:
> >> +compatible:
> >> +  contains:
> >> +const: rockchip,rk3399-cif-isp
> >> +then:
> >> +  properties:
> >> +clocks:
> >> +  maxItems: 4
> >> +  minItems: 3
> >
> > For a single compatible you shouldn't really have a variable number of 
> > clocks.
>
> I'm not entirely sure how to make this separation, since isp0 and isp1 (not 
> yet supported)
> would use the same compatible.
> Unless if we separate in two compatibles, but maybe this is an overhead just 
> for an extra clock.
> What do you think?

In that case, it's fin

Re: [PATCH 01/23] dt-bindings: introduce silabs,wfx.yaml

2020-10-13 Thread Rob Herring
On Mon, Oct 12, 2020 at 12:46:26PM +0200, Jerome Pouiller wrote:
> From: Jérôme Pouiller 
> 
> Signed-off-by: Jérôme Pouiller 
> ---
>  .../bindings/net/wireless/silabs,wfx.yaml | 125 ++
>  1 file changed, 125 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml 
> b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> new file mode 100644
> index ..43b5630c0407
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
> @@ -0,0 +1,125 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020, Silicon Laboratories, Inc.
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Silicon Labs WFxxx devicetree bindings
> +
> +maintainers:
> +  - Jérôme Pouiller 
> +
> +description:
> +  The WFxxx chip series can be connected via SPI or via SDIO.

What does this chip do? WiFi or some other wireless?

> +
> +  For SDIO':'
> +
> +The driver is able to detect a WFxxx chip on SDIO bus by matching its 
> Vendor
> +ID and Product ID. However, driver will only provide limited features in
> +this case. Thus declaring WFxxx chip in device tree is recommended (and 
> may
> +become mandatory in the future).
> +
> +In addition, it is recommended to declare a mmc-pwrseq on SDIO host above
> +WFx. Without it, you may encounter issues with warm boot. The mmc-pwrseq
> +should be compatible with mmc-pwrseq-simple. Please consult
> +Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt for more
> +information.
> +
> +  For SPI':'
> +
> +In add of the properties below, please consult
> +Documentation/devicetree/bindings/spi/spi-controller.yaml for optional 
> SPI
> +related properties.
> +
> +  Note that in add of the properties below, the WFx driver also supports
> +  `mac-address` and `local-mac-address` as described in
> +  Documentation/devicetree/bindings/net/ethernet.txt

Note what ethernet.txt contains... This should have a $ref to 
ethernet-controller.yaml to express the above.

You can add 'mac-address: true' if you want to be explicit about what 
properties are used.

> +
> +properties:
> +  compatible:
> +const: silabs,wf200

blank line between each DT property.

> +  reg:
> +description:
> +  When used on SDIO bus,  must be set to 1. When used on SPI bus, 
> it is
> +  the chip select address of the device as defined in the SPI devices
> +  bindings.
> +maxItems: 1
> +  spi-max-frequency:
> +description: (SPI only) Maximum SPI clocking speed of device in Hz.

No need to redefine a common property.

> +maxItems: 1

Not an array. Just need:

spi-max-frequency: true

> +  interrupts:
> +description: The interrupt line. Triggers IRQ_TYPE_LEVEL_HIGH and
> +  IRQ_TYPE_EDGE_RISING are both supported by the chip and the driver. 
> When
> +  SPI is used, this property is required. When SDIO is used, the 
> "in-band"
> +  interrupt provided by the SDIO bus is used unless an interrupt is 
> defined
> +  in the Device Tree.
> +maxItems: 1
> +  reset-gpios:
> +description: (SPI only) Phandle of gpio that will be used to reset chip
> +  during probe. Without this property, you may encounter issues with warm
> +  boot. (For legacy purpose, the gpio in inverted when compatible ==
> +  "silabs,wfx-spi")
> +
> +  For SDIO, the reset gpio should declared using a mmc-pwrseq.
> +maxItems: 1
> +  wakeup-gpios:
> +description: Phandle of gpio that will be used to wake-up chip. Without 
> this
> +  property, driver will disable most of power saving features.
> +maxItems: 1
> +  config-file:
> +description: Use an alternative file as PDS. Default is `wf200.pds`. Only
> +  necessary for development/debug purpose.

'firmware-name' is typically what we'd use here. Though if just for 
debug/dev, perhaps do a debugfs interface for this instead. As DT should 
come from the firmware/bootloader, requiring changing the DT for 
dev/debug is not the easiest workflow compared to doing something from 
userspace.

> +maxItems: 1

Looks like a string, not an array.

> +
> +required:
> +  - compatible
> +  - reg

Will need additionalProperties or unevaluatedProperties depending on 
whether you list out properties from ethernet-controller.yaml or not.

Rob
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Re: [PATCH 1/2] MAINTAINERS: fix broken doc refs due to yaml conversion

2020-10-12 Thread Rob Herring
On Fri, Oct 09, 2020 at 02:15:30PM +0200, Mauro Carvalho Chehab wrote:
> Several *.txt files got converted to yaml. Update their
> references at MAINTAINERS file accordingly.
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  Documentation/devicetree/bindings/clock/hi6220-clock.txt | 2 +-
>  MAINTAINERS  | 9 -
>  .../devicetree/bindings/net/wireless/silabs,wfx.yaml | 2 +-
>  3 files changed, 6 insertions(+), 7 deletions(-)

Doesn't apply for me.
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Re: [PATCH v2 5/6] dt-bindings: media: cedrus: Add V3s compatible

2020-09-22 Thread Rob Herring
On Sat, 12 Sep 2020 16:30:51 +0200, Martin Cerveny wrote:
> Allwinner V3s SoC contains video engine. Add compatible for it.
> 
> Signed-off-by: Martin Cerveny 
> ---
>  .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring 
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Re: [PATCH v2 2/6] dt-bindings: sram: allwinner, sun4i-a10-system-control: Add V3s compatibles

2020-09-22 Thread Rob Herring
On Sat, 12 Sep 2020 16:30:48 +0200, Martin Cerveny wrote:
> Allwinner V3s has system control similar to that in H3.
> Add compatibles for system control with SRAM C1 region.
> 
> Signed-off-by: Martin Cerveny 
> ---
>  .../bindings/sram/allwinner,sun4i-a10-system-control.yaml   | 6 ++
>  1 file changed, 6 insertions(+)
> 

Acked-by: Rob Herring 
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Re: [PATCH v5 5/9] media: staging: rkisp1: remove unecessary clocks

2020-09-22 Thread Rob Herring
On Wed, Jul 22, 2020 at 9:56 AM Helen Koike  wrote:
>
> aclk_isp_wrap is a child of aclk_isp, and hclk_isp_wrap is a child of
> hclk_isp, thus we can remove parents from the list.
>
> Also, for the isp0, we only need the ISP clock, ACLK and HCLK.
> In the future we'll need a pixel clock for RK3288 and RK3399, and a JPEG
> clock for RK3288.
>
> So with the goal to cleanup the dt-bindings and remove it from staging,
> simplify clock names to isp, aclk and hclk.
>
> Assigned clocks are meant to refer to the full path in the clock tree,
> i.e. the leaf in the tree.
> For instance, in RK3399, the clock responsible for ACLK (ISP AXI CLOCK)
> is aclk_isp0_wrapper.
>
> For reference, this is the isp clock topology on RK3399:
>
>  xin24m
> pll_npll
>npll
>   clk_isp1
>   clk_isp0
> pll_cpll
>cpll
>   aclk_isp1
>  aclk_isp1_noc
>  hclk_isp1
> aclk_isp1_wrapper
> hclk_isp1_noc
>   aclk_isp0
>  hclk_isp1_wrapper
>  aclk_isp0_wrapper
>  aclk_isp0_noc
>  hclk_isp0
> hclk_isp0_wrapper
> hclk_isp0_noc
>  pclkin_isp1_wrapper
>
> Signed-off-by: Helen Koike 
>
> ---
> Changes in V5:
> - Use if/then schema as suggested by Rob Herring on
> https://patchwork.linuxtv.org/project/linux-media/patch/20200702191322.2639681-6-helen.ko...@collabora.com/#119729
>
> Changes in V4:
> - update binding according to suggestion by Robin Murphy
> on https://patchwork.kernel.org/patch/11475007/
>
> Changes in V3:
> - this is a new patch in the series
> ---
>  .../bindings/media/rockchip-isp1.yaml | 50 ---
>  drivers/staging/media/rkisp1/rkisp1-dev.c |  8 ++-
>  2 files changed, 36 insertions(+), 22 deletions(-)
>
> diff --git 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
>  
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> index 62a6b9c959498..23c677d15037a 100644
> --- 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> +++ 
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> @@ -24,20 +24,10 @@ properties:
>  maxItems: 1
>
>clocks:
> -items:
> -  - description: ISP clock
> -  - description: ISP AXI clock clock
> -  - description: ISP AXI clock  wrapper clock
> -  - description: ISP AHB clock clock
> -  - description: ISP AHB wrapper clock
> +minItems: 3

You need maxItems here too or it will always be 3.

>
>clock-names:
> -items:
> -  - const: clk_isp
> -  - const: aclk_isp
> -  - const: aclk_isp_wrap
> -  - const: hclk_isp
> -  - const: hclk_isp_wrap
> +minItems: 3
>
>iommus:
>  maxItems: 1
> @@ -116,6 +106,34 @@ required:
>- power-domains
>- ports
>
> +if:
> +  properties:
> +compatible:
> +  contains:
> +const: rockchip,rk3399-cif-isp
> +then:
> +  properties:
> +clocks:
> +  maxItems: 4
> +  minItems: 3

For a single compatible you shouldn't really have a variable number of clocks.

> +  items:
> +# isp0 and isp1
> +- description: ISP clock
> +- description: ISP AXI clock
> +- description: ISP AHB clock
> +# only for isp1
> +- description: ISP Pixel clock
> +clock-names:
> +  maxItems: 4
> +  minItems: 3
> +  items:
> +# isp0 and isp1
> +- const: isp
> +- const: aclk
> +- const: hclk
> +# only for isp1
> +- const: pclk_isp

Don't you need an 'else' clause. For not rockchip,rk3399-cif-isp,
there's no definition of what clocks there are.

Rob
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Re: [PATCH v5 2/9] media: staging: dt-bindings: rkisp1: drop i2c unit address

2020-09-18 Thread Rob Herring
On Wed, Jul 22, 2020 at 9:55 AM Helen Koike  wrote:
>
> Add missing required items in Rockchip ISP1 dt-bindings example for
> a complete i2c node.
> Drop unit address to Fix error:
> /example-0/parent/i2c@ff16: node has a unit name, but no reg or ranges 
> property
> Remove unecessary fields for the example.
>
> Signed-off-by: Helen Koike 
> ---
>
> Changes in v5:
> - Patch re-written to drop unity address instead of completing i2c node
>
> Changes in v2:
> - new patch in the series
>
> tmp: i2c drop fields
> ---
>  .../Documentation/devicetree/bindings/media/rockchip-isp1.yaml | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)

Acked-by: Rob Herring 
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Re: [PATCH v5 4/9] media: staging: dt-bindings: rkisp1: drop parent unit address

2020-09-18 Thread Rob Herring
On Wed, Jul 22, 2020 at 9:56 AM Helen Koike  wrote:
>
> Fix the following error found with make ARCH=arm64 dt_binding_check:
>
> Documentation/devicetree/bindings/media/rockchip-isp1.example.dts:24.27-101.11:
> Warning (unit_address_vs_reg): /example-0/parent@0: node has a unit name, but 
> no reg or ranges property
>
> Reported-by: Johan Jonker 
> Signed-off-by: Helen Koike 
> ---
> V5:
> - Patch re-written to drop the unit address instead of adding reg
>
> V3:
> - this is a new patch in the series
> ---
>  .../Documentation/devicetree/bindings/media/rockchip-isp1.yaml  | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Rob Herring 
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Re: [PATCH v5 1/9] media: staging: dt-bindings: rkisp1: add missing required nodes

2020-09-18 Thread Rob Herring
On Wed, Jul 22, 2020 at 9:55 AM Helen Koike  wrote:
>
> Add missing required nodes in json-schema yaml file for
> Rockchip ISP1 dt-bindings.
>
> Signed-off-by: Helen Koike 
> Acked-by: Rob Herring 
> ---
>
> Changes in v2:
> - New patch in the series
> ---
>  .../devicetree/bindings/media/rockchip-isp1.yaml  | 8 
>  1 file changed, 8 insertions(+)

Sorry, PW filters patches and this isn't under
Documentation/devicetree/bindings/.

Acked-by: Rob Herring 
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Re: [PATCH v6 1/8] dt-bindings: add documentation of xilinx clocking wizard

2020-08-28 Thread Rob Herring
On Fri, Aug 28, 2020 at 07:09:49PM +0530, Shubhrajyoti Datta wrote:
> Add the devicetree binding for the xilinx clocking wizard.
> 
> Signed-off-by: Shubhrajyoti Datta 
> ---
> v6:
> Fix a yaml warning
> 
>  .../bindings/clock/xlnx,clocking-wizard.yaml   | 71 
> ++
>  1 file changed, 71 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml 
> b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> new file mode 100644
> index 000..ca63593
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> @@ -0,0 +1,71 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx clocking wizard
> +
> +maintainers:
> +  - Shubhrajyoti Datta 
> +
> +description: |
> +  The clocking wizard is a soft ip clocking block of Xilinx versal. It
> +  reads required input clock frequencies from the devicetree and acts as 
> clock
> +  clock output.
> +
> +select: false
> +
> +properties:
> +  compatible:
> +items:
> +  - enum:

You can drop 'items' since there is only 1.

> +  - xlnx,clocking-wizard
> +  - xlnx,clocking-wizard-6.0
> +
> +  "#clock-cells":
> +const: 1
> +
> +  clocks:
> +description: List of clock specifiers which are external input
> +  clocks to the given clock controller.

Drop this. That's every 'clocks' property.

> +items:
> +  - description: clock input
> +  - description: axi clock
> +
> +  clock-names:
> +items:
> +  - const: clk_in1
> +  - const: s_axi_aclk
> +
> +  speed-grade:

Needs a vendor prefix.

> +allOf:

You can remove the 'allOf'.

> +  - $ref: /schemas/types.yaml#/definitions/uint32
> +  - enum: [1, 2, 3]
> +description:
> +  Speed grade of the device.
> +maxItems: 1

Drop this. A 'uint32' is always 1 item.

> +
> +required:
> +  - compatible
> +  - "#clock-cells"
> +  - clocks
> +  - clock-names
> +  - speed-grade
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +clock-generator@4004 {
> +#clock-cells = <1>;
> +reg = <0x4004 0x1000>;
> +compatible = "xlnx,clk-wizard-1.0";

Doesn't match the schema.

> +speed-grade = <1>;
> +clock-names = "clk_in1", "s_axi_aclk";
> +clocks = <&clkc 15>, <&clkc 15>;
> +clock-output-names = "clk_out1", "clk_out2",
> +"clk_out3", "clk_out4", "clk_out5",
> +"clk_out6", "clk_out7";
> +};
> +...
> -- 
> 2.1.1
> 
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Re: [PATCH v9 08/12] device core: Introduce DMA range map, supplanting dma_pfn_offset

2020-07-31 Thread Rob Herring
On Thu, Jul 30, 2020 at 10:44 AM Jim Quinlan  wrote:
>
> On Wed, Jul 29, 2020 at 10:28 AM Rob Herring  wrote:
> >
> > On Wed, Jul 29, 2020 at 12:19 AM Christoph Hellwig  wrote:
> > >
> > > On Tue, Jul 28, 2020 at 02:24:51PM -0400, Jim Quinlan wrote:
> > > > I started using devm_kcalloc() but at least two reviewers convinced me
> > > > to just use kcalloc().  In addition, when I was using devm_kcalloc()
> > > > it was awkward because 'dev' is not available to this function.
> > > >
> > > > It comes down to whether unbind/binding the device N times is actually
> > > > a reasonable usage.  As for my experience I've seen two cases: (1) my
> > > > overnight "bind/unbind the PCIe RC driver" script, and we have a
> > > > customer who does an unbind/bind as a hail mary to bring back life to
> > > > their dead EP device.  If the latter case happens repeatedly, there
> > > > are bigger problems.
> > >
> > > We can't just leak the allocations.  Do you have a pointer to the
> > > arguments against managed resources?  I'm generally not a huge fan
> > > of the managed resources, but for a case like this they actually seem
> > > useful.  If we don't use the managed resources we'll at leat need
> > > to explicitly free the resources when freeing the device.
> >
> > The lifetime for devm_kcalloc may not be what we want here. devm
> > allocs are freed on probe fail or remove, not on freeing the device
> > (there is a just in case free there too though).
>
> What do you suggest doing as an alternative?

I believe I gave it already. Put a kfree in the struct device release
function. But you can't be passing the pointer from device to device
if you go that route. You'd have to either copy the struct or check if
it's the same as the parent's and skip the kfree in that case.

Rob
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Re: [PATCH v9 08/12] device core: Introduce DMA range map, supplanting dma_pfn_offset

2020-07-29 Thread Rob Herring
On Wed, Jul 29, 2020 at 12:19 AM Christoph Hellwig  wrote:
>
> On Tue, Jul 28, 2020 at 02:24:51PM -0400, Jim Quinlan wrote:
> > I started using devm_kcalloc() but at least two reviewers convinced me
> > to just use kcalloc().  In addition, when I was using devm_kcalloc()
> > it was awkward because 'dev' is not available to this function.
> >
> > It comes down to whether unbind/binding the device N times is actually
> > a reasonable usage.  As for my experience I've seen two cases: (1) my
> > overnight "bind/unbind the PCIe RC driver" script, and we have a
> > customer who does an unbind/bind as a hail mary to bring back life to
> > their dead EP device.  If the latter case happens repeatedly, there
> > are bigger problems.
>
> We can't just leak the allocations.  Do you have a pointer to the
> arguments against managed resources?  I'm generally not a huge fan
> of the managed resources, but for a case like this they actually seem
> useful.  If we don't use the managed resources we'll at leat need
> to explicitly free the resources when freeing the device.

The lifetime for devm_kcalloc may not be what we want here. devm
allocs are freed on probe fail or remove, not on freeing the device
(there is a just in case free there too though).

Rob
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Re: [PATCH v9 08/12] device core: Introduce DMA range map, supplanting dma_pfn_offset

2020-07-28 Thread Rob Herring
On Fri, Jul 24, 2020 at 2:45 PM Jim Quinlan  wrote:
>
> The new field 'dma_range_map' in struct device is used to facilitate the
> use of single or multiple offsets between mapping regions of cpu addrs and
> dma addrs.  It subsumes the role of "dev->dma_pfn_offset" which was only
> capable of holding a single uniform offset and had no region bounds
> checking.
>
> The function of_dma_get_range() has been modified so that it takes a single
> argument -- the device node -- and returns a map, NULL, or an error code.
> The map is an array that holds the information regarding the DMA regions.
> Each range entry contains the address offset, the cpu_start address, the
> dma_start address, and the size of the region.
>
> of_dma_configure() is the typical manner to set range offsets but there are
> a number of ad hoc assignments to "dev->dma_pfn_offset" in the kernel
> driver code.  These cases now invoke the function
> dma_attach_offset_range(dev, cpu_addr, dma_addr, size).
>
> Signed-off-by: Jim Quinlan 
> ---

[...]

> diff --git a/drivers/of/address.c b/drivers/of/address.c
> index 8eea3f6e29a4..4b718d199efe 100644
> --- a/drivers/of/address.c
> +++ b/drivers/of/address.c
> @@ -918,33 +918,33 @@ void __iomem *of_io_request_and_map(struct device_node 
> *np, int index,
>  }
>  EXPORT_SYMBOL(of_io_request_and_map);
>
> +#ifdef CONFIG_HAS_DMA
>  /**
> - * of_dma_get_range - Get DMA range info
> + * of_dma_get_range - Get DMA range info and put it into a map array
>   * @np:device node to get DMA range info
> - * @dma_addr:  pointer to store initial DMA address of DMA range
> - * @paddr: pointer to store initial CPU address of DMA range
> - * @size:  pointer to store size of DMA range
> + * @map:   dma range structure to return
>   *
>   * Look in bottom up direction for the first "dma-ranges" property
> - * and parse it.
> - *  dma-ranges format:
> + * and parse it.  Put the information into a DMA offset map array.
> + *
> + * dma-ranges format:
>   * DMA addr (dma_addr) : naddr cells
>   * CPU addr (phys_addr_t)  : pna cells
>   * size: nsize cells
>   *
> - * It returns -ENODEV if "dma-ranges" property was not found
> - * for this device in DT.
> + * It returns -ENODEV if "dma-ranges" property was not found for this
> + * device in the DT.
>   */
> -int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 
> *size)
> +int of_dma_get_range(struct device_node *np, const struct bus_dma_region 
> **map)
>  {
> struct device_node *node = of_node_get(np);
> const __be32 *ranges = NULL;
> -   int len;
> -   int ret = 0;
> bool found_dma_ranges = false;
> struct of_range_parser parser;
> struct of_range range;
> -   u64 dma_start = U64_MAX, dma_end = 0, dma_offset = 0;
> +   struct bus_dma_region *r;
> +   int len, num_ranges = 0;
> +   int ret;
>
> while (node) {
> ranges = of_get_property(node, "dma-ranges", &len);
> @@ -970,44 +970,35 @@ int of_dma_get_range(struct device_node *np, u64 
> *dma_addr, u64 *paddr, u64 *siz
> }
>
> of_dma_range_parser_init(&parser, node);
> +   for_each_of_range(&parser, &range)
> +   num_ranges++;
> +
> +   of_dma_range_parser_init(&parser, node);
> +
> +   ret = -ENOMEM;
> +   r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL);
> +   if (!r)
> +   goto out;

AFAICT, you have the error cases covered, but you are leaking memory
if the device is removed.

[...]

> diff --git a/drivers/remoteproc/remoteproc_core.c 
> b/drivers/remoteproc/remoteproc_core.c
> index 9f04c30c4aaf..49242dd6176e 100644
> --- a/drivers/remoteproc/remoteproc_core.c
> +++ b/drivers/remoteproc/remoteproc_core.c
> @@ -519,7 +519,7 @@ static int rproc_handle_vdev(struct rproc *rproc, struct 
> fw_rsc_vdev *rsc,
> /* Initialise vdev subdevice */
> snprintf(name, sizeof(name), "vdev%dbuffer", rvdev->index);
> rvdev->dev.parent = &rproc->dev;
> -   rvdev->dev.dma_pfn_offset = rproc->dev.parent->dma_pfn_offset;
> +   rvdev->dev.dma_range_map = rproc->dev.parent->dma_range_map;

But doing this means you can't just free the dma_range_map. You need
to do a copy here or you'd have to refcount it. Or I suppose you could
check if it the child has a different dma_range_map ptr than the
parent.

Rob
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Re: [PATCH v4 5/9] media: staging: rkisp1: remove unecessary clocks

2020-07-17 Thread Rob Herring
On Fri, Jul 17, 2020 at 12:14 PM Helen Koike  wrote:
>
> Hi Rob,
>
> Thanks for your review.
>
> On 7/17/20 2:49 PM, Rob Herring wrote:
> > On Thu, Jul 2, 2020 at 1:13 PM Helen Koike  
> > wrote:
> >>
> >> aclk_isp_wrap is a child of aclk_isp, and hclk_isp_wrap is a child of
> >> hclk_isp, thus we can remove parents from the list.
> >
> > But it looks like it is the wrap clocks you are removing.
>
> From this binding yes, but the idea is to add in the dt wherever clock
> responsible for the full ACLK path for instance.
> In the example below, clock aclk_isp is ACLK_ISP0_WRAPPER.
> Does this make sense?

Just perhaps clarify the renaming.

>
> >
> >>
> >> Also, for the isp0, we only need the ISP clock, ACLK and HCLK.
> >> In the future we'll need a pixel clock for RK3288 and RK3399, and a JPEG
> >> clock for RK3288.
> >>
> >> So with the goal to cleanup the dt-bindings and remove it from staging,
> >> simplify clock names to isp, aclk and hclk.
> >>
> >> For reference, this is the isp clock topology on RK3399:
> >>
> >>  xin24m
> >> pll_npll
> >>npll
> >>   clk_isp1
> >>   clk_isp0
> >> pll_cpll
> >>cpll
> >>   aclk_isp1
> >>  aclk_isp1_noc
> >>  hclk_isp1
> >> aclk_isp1_wrapper
> >> hclk_isp1_noc
> >>   aclk_isp0
> >>  hclk_isp1_wrapper
> >>  aclk_isp0_wrapper
> >>  aclk_isp0_noc
> >>  hclk_isp0
> >> hclk_isp0_wrapper
> >> hclk_isp0_noc
> >>  pclkin_isp1_wrapper
> >>
> >> Signed-off-by: Helen Koike 
> >>
> >> ---
> >>
> >> Changes in V4:
> >> - update binding according to suggestion by Robin Murphy
> >> on https://patchwork.kernel.org/patch/11475007/
> >>
> >> Changes in V3:
> >> - this is a new patch in the series
> >> ---
> >>  .../bindings/media/rockchip-isp1.yaml | 30 +--
> >>  drivers/staging/media/rkisp1/rkisp1-dev.c |  8 ++---
> >>  2 files changed, 17 insertions(+), 21 deletions(-)
> >>
> >> diff --git 
> >> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >>  
> >> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >> index 4d111ef2e89c7..f10c53d008748 100644
> >> --- 
> >> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >> +++ 
> >> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> >> @@ -24,20 +24,20 @@ properties:
> >>  maxItems: 1
> >>
> >>clocks:
> >> -items:
> >> -  - description: ISP clock
> >> -  - description: ISP AXI clock clock
> >> -  - description: ISP AXI clock  wrapper clock
> >> -  - description: ISP AHB clock clock
> >> -  - description: ISP AHB wrapper clock
> >
> > This is the correct way to describe multiple clocks.
>
> The idea was to prepare for rk3288 and rk3399 isp1, as suggested here 
> https://patchwork.kernel.org/patch/11475007/#23462085
>
> Or should we do:
>
> clocks:
>   oneOf:
> # rk3288 clocks
> - items:
>   - description: ISP clock
>   - description: ISP AXI clock
>   - description: ISP AHB clock
>   - description: ISP Pixel clock
>   - description: ISP JPEG source clock

The main section should have this and 'minItems: 3'. IOW, it's a
superset of what's valid. Then you can restrict specific compatibles
further with an if/then schema. For rk3288, you need one with
'minItems: 5'.

> # rk3399 isp0 clocks
> - items:
>   - description: ISP clock
>   - description: ISP AXI clock
>   - description: ISP AHB clock

And this would be an if/then schema based on the compatible string and
defining 'maxItems: 3'.

> # rk3399 isp1 clocks
> - items:
>   - description: ISP clock
>   - description: ISP AXI clock
>   - description: ISP AHB clock
>   - description: ISP Pixel clock

And an if/then with { minItems: 4, maxItems: 4 }. Or really since
these are just different instances, just combine them into 1
conditional allowing 3 or 4 clocks.

There are lots of examples to follow in the tree.

Rob
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Re: [PATCH v4 5/9] media: staging: rkisp1: remove unecessary clocks

2020-07-17 Thread Rob Herring
On Thu, Jul 2, 2020 at 1:13 PM Helen Koike  wrote:
>
> aclk_isp_wrap is a child of aclk_isp, and hclk_isp_wrap is a child of
> hclk_isp, thus we can remove parents from the list.

But it looks like it is the wrap clocks you are removing.

>
> Also, for the isp0, we only need the ISP clock, ACLK and HCLK.
> In the future we'll need a pixel clock for RK3288 and RK3399, and a JPEG
> clock for RK3288.
>
> So with the goal to cleanup the dt-bindings and remove it from staging,
> simplify clock names to isp, aclk and hclk.
>
> For reference, this is the isp clock topology on RK3399:
>
>  xin24m
> pll_npll
>npll
>   clk_isp1
>   clk_isp0
> pll_cpll
>cpll
>   aclk_isp1
>  aclk_isp1_noc
>  hclk_isp1
> aclk_isp1_wrapper
> hclk_isp1_noc
>   aclk_isp0
>  hclk_isp1_wrapper
>  aclk_isp0_wrapper
>  aclk_isp0_noc
>  hclk_isp0
> hclk_isp0_wrapper
> hclk_isp0_noc
>  pclkin_isp1_wrapper
>
> Signed-off-by: Helen Koike 
>
> ---
>
> Changes in V4:
> - update binding according to suggestion by Robin Murphy
> on https://patchwork.kernel.org/patch/11475007/
>
> Changes in V3:
> - this is a new patch in the series
> ---
>  .../bindings/media/rockchip-isp1.yaml | 30 +--
>  drivers/staging/media/rkisp1/rkisp1-dev.c |  8 ++---
>  2 files changed, 17 insertions(+), 21 deletions(-)
>
> diff --git 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
>  
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> index 4d111ef2e89c7..f10c53d008748 100644
> --- 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> +++ 
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> @@ -24,20 +24,20 @@ properties:
>  maxItems: 1
>
>clocks:
> -items:
> -  - description: ISP clock
> -  - description: ISP AXI clock clock
> -  - description: ISP AXI clock  wrapper clock
> -  - description: ISP AHB clock clock
> -  - description: ISP AHB wrapper clock

This is the correct way to describe multiple clocks.

> +maxItems: 5

Now the 4th and 5th clock are undefined.

> +minItems: 3
> +description:
> +  ISP clock
> +  ISP AXI clock
> +  ISP AHB clock
>
>clock-names:
> +maxItems: 5

This should not be more than the number of entries in 'items'.

> +minItems: 3
>  items:
> -  - const: clk_isp
> -  - const: aclk_isp
> -  - const: aclk_isp_wrap
> -  - const: hclk_isp
> -  - const: hclk_isp_wrap
> +  - const: isp
> +  - const: aclk
> +  - const: hclk
>
>iommus:
>  maxItems: 1
> @@ -135,11 +135,9 @@ examples:
>  reg = <0x0 0xff91 0x0 0x4000>;
>  interrupts = ;
>  clocks = <&cru SCLK_ISP0>,
> - <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
> - <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
> -clock-names = "clk_isp",
> -  "aclk_isp", "aclk_isp_wrap",
> -  "hclk_isp", "hclk_isp_wrap";
> + <&cru ACLK_ISP0_WRAPPER>,
> + <&cru HCLK_ISP0_WRAPPER>;
> +clock-names = "isp", "aclk", "hclk";
>  iommus = <&isp0_mmu>;
>  phys = <&dphy>;
>  phy-names = "dphy";
> diff --git a/drivers/staging/media/rkisp1/rkisp1-dev.c 
> b/drivers/staging/media/rkisp1/rkisp1-dev.c
> index f38801fea10d9..175ac25fe99fa 100644
> --- a/drivers/staging/media/rkisp1/rkisp1-dev.c
> +++ b/drivers/staging/media/rkisp1/rkisp1-dev.c
> @@ -406,11 +406,9 @@ static irqreturn_t rkisp1_isr(int irq, void *ctx)
>  }
>
>  static const char * const rk3399_isp_clks[] = {
> -   "clk_isp",
> -   "aclk_isp",
> -   "hclk_isp",
> -   "aclk_isp_wrap",
> -   "hclk_isp_wrap",
> +   "isp",
> +   "aclk",
> +   "hclk",
>  };
>
>  static const struct rkisp1_match_data rk3399_isp_clk_data = {
> --
> 2.26.0
>
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Re: [PATCH v4 4/9] media: staging: dt-bindings: rkisp1: fix "no reg" error in parent node

2020-07-17 Thread Rob Herring
On Thu, Jul 2, 2020 at 1:13 PM Helen Koike  wrote:
>
> Fix the following error found with make ARCH=arm64 dt_binding_check:
>
> Documentation/devicetree/bindings/media/rockchip-isp1.example.dts:24.27-101.11:
> Warning (unit_address_vs_reg): /example-0/parent@0: node has a unit name, but 
> no reg or ranges property
>
> Reported-by: Johan Jonker 
> Signed-off-by: Helen Koike 
> ---
>
> V3:
> - this is a new patch in the series
> ---
>  .../Documentation/devicetree/bindings/media/rockchip-isp1.yaml   | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
>  
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> index e5b9c0574e352..4d111ef2e89c7 100644
> --- 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> +++ 
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> @@ -126,6 +126,7 @@ examples:
>  #include 
>
>  parent0: parent@0 {
> +reg = <0 0>;

Just drop the unit-address.

>  #address-cells = <2>;
>  #size-cells = <2>;
>
> --
> 2.26.0
>
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Re: [PATCH v4 3/9] media: staging: dt-bindings: rkisp1: re-order properties

2020-07-17 Thread Rob Herring
On Thu, Jul 2, 2020 at 1:13 PM Helen Koike  wrote:
>
> Organize properties order in dt-binbings to move it out of staging.

typo

>
> On top: compatible, reg and interrupts.
> Then alphabetical order, then properties starting with '#'.
>
> Signed-off-by: Helen Koike 
>
> ---
>
> V2:
> - this is a new patch in the series
> ---
>  .../bindings/media/rockchip-isp1.yaml | 32 +--
>  1 file changed, 16 insertions(+), 16 deletions(-)

Acked-by: Rob Herring 
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Re: [PATCH v4 1/9] media: staging: dt-bindings: rkisp1: add missing required nodes

2020-07-17 Thread Rob Herring
On Thu, Jul 2, 2020 at 1:13 PM Helen Koike  wrote:
>
> Add missing required nodes in json-schema yaml file for
> Rockchip ISP1 dt-bindings.
>
> Signed-off-by: Helen Koike 
> ---
>
> Changes in v2:
> - New patch in the series
> ---
>  .../devicetree/bindings/media/rockchip-isp1.yaml  | 8 
>  1 file changed, 8 insertions(+)

Acked-by: Rob Herring 
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Re: [PATCH v4 2/9] media: staging: dt-bindings: rkisp1: add required items in i2c example

2020-07-17 Thread Rob Herring
On Thu, Jul 2, 2020 at 1:13 PM Helen Koike  wrote:
>
> Add missing required items in Rockchip ISP1 dt-bindings example for
> a complete i2c node.
>
> Signed-off-by: Helen Koike 
> ---
>
> Changes in v2:
> - new patch in the series
> ---
>  .../devicetree/bindings/media/rockchip-isp1.yaml | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
>  
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> index a77b6ec500c95..8c7904845788d 100644
> --- 
> a/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> +++ 
> b/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> @@ -169,6 +169,11 @@ examples:
>  };
>
>  i2c7: i2c@ff16 {
> +compatible = "rockchip,rk3399-i2c";
> +reg = <0x0 0xff16 0x0 0x1000>;

This will give a warning now as the default cell sizes are 1.

> +interrupts = ;
> +clocks = <&cru SCLK_I2C7>, <&cru PCLK_I2C7>;
> +clock-names = "i2c", "pclk";

Just drop the unit address rather than adding all this.

>  clock-frequency = <40>;
>  #address-cells = <1>;
>  #size-cells = <0>;
> --
> 2.26.0
>
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Re: [PATCH v12 1/2] dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter DT schema

2020-06-04 Thread Rob Herring
On Thu, 04 Jun 2020 15:56:36 +0800, Xin Ji wrote:
> anx7625: MIPI to DP transmitter DT schema
> 
> Signed-off-by: Xin Ji 
> ---
>  .../bindings/display/bridge/analogix,anx7625.yaml  | 95 
> ++
>  1 file changed, 95 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> 


Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.

If a tag was not added on purpose, please state why and what changed.

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Re: [PATCH v11 1/2] dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter DT schema

2020-05-26 Thread Rob Herring
On Fri, 15 May 2020 13:49:20 +0800, Xin Ji wrote:
> anx7625: MIPI to DP transmitter DT schema
> 
> Signed-off-by: Xin Ji 
> ---
>  .../bindings/display/bridge/analogix,anx7625.yaml  | 95 
> ++
>  1 file changed, 95 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v10 1/2] dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter binding

2020-05-14 Thread Rob Herring
On Wed, May 06, 2020 at 03:04:20PM +0800, Xin Ji wrote:
> The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
> for portable device. It converts MIPI to DisplayPort 1.3 4K.
> 
> You can add support to your board with binding.

We have an example in the binding, no reason to also put in the commit 
msg.

> 
> Example:
>   anx7625_bridge: encoder@58 {
>   compatible = "analogix,anx7625";
>   reg = <0x58>;
>   status = "okay";
>   enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
>   reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
> 
>   ports {
>   #address-cells = <1>;
>   #size-cells = <0>;
> 
>   mipi2dp_bridge_in: port@0 {
>   reg = <0>;
>   anx7625_in: endpoint {
>   remote-endpoint = <&mipi_dsi>;
>   };
>   };
> 
>   mipi2dp_bridge_out: port@1 {
>   reg = <1>;
>   anx7625_out: endpoint {
>   remote-endpoint = <&panel_in>;
>   };
>   };
>   };
>   };
> 
> Signed-off-by: Xin Ji 
> ---
>  .../bindings/display/bridge/analogix,anx7625.yaml  | 98 
> ++
>  1 file changed, 98 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml 
> b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> new file mode 100644
> index 000..6e54176
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2019 Analogix Semiconductor, Inc.
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#";
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#";
> +
> +title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)
> +
> +maintainers:
> +  - Xin Ji 
> +
> +description: |
> +  The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
> +  designed for portable devices.
> +
> +properties:
> +  "#address-cells": true
> +  "#size-cells": true

These don't belong here.

> +
> +  compatible:
> +items:
> +  - const: analogix,anx7625
> +
> +  reg:
> +maxItems: 1
> +
> +  interrupts:
> +description: used for interrupt pin B8.
> +maxItems: 1
> +
> +  enable-gpios:
> +description: used for power on chip control, POWER_EN pin D2.
> +maxItems: 1
> +
> +  reset-gpios:
> +description: used for reset chip control, RESET_N pin B7.
> +maxItems: 1
> +
> +  ports:
> +type: object
> +
> +properties:
> +  port@0:
> +type: object
> +description:
> +  Video port for MIPI DSI input.
> +
> +  port@1:
> +type: object
> +description:
> +  Video port for panel or connector.
> +
> +required:
> +- port@0
> +- port@1
> +
> +required:
> +  - compatible
> +  - reg
> +  - ports
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +#include 
> +
> +i2c0 {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +anx7625_bridge: encoder@58 {

Drop any unused labels.

> +compatible = "analogix,anx7625";
> +reg = <0x58>;
> +enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
> +reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
> +
> +ports {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +mipi2dp_bridge_in: port@0 {
> +reg = <0>;
> +anx7625_in: endpoint {
> +remote-endpoint = <&mipi_dsi>;
> +};
> +};
> +
> +mipi2dp_bridge_out: port@1 {
> +reg = <1>;
> +anx7625_out: endpoint {
> +remote-endpoint = <&panel_in>;
> +};
> +};
> +};
> +};
> +};
> -- 
> 2.7.4
> 
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Re: [PATCH v9 1/2] dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter binding

2020-05-01 Thread Rob Herring
On Thu, 30 Apr 2020 17:34:11 +0800, Xin Ji wrote:
> The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
> for portable device. It converts MIPI to DisplayPort 1.3 4K.
> 
> You can add support to your board with binding.
> 
> Example:
>   anx7625_bridge: encoder@58 {
>   compatible = "analogix,anx7625";
>   reg = <0x58>;
>   status = "okay";
>   enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
>   reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
>   #address-cells = <1>;
>   #size-cells = <0>;
> 
>   ports {
>   #address-cells = <1>;
>   #size-cells = <0>;
> 
>   mipi2dp_bridge_in: port@0 {
>   reg = <0>;
>   anx7625_in: endpoint {
>   remote-endpoint = <&mipi_dsi>;
>   };
>   };
> 
>   mipi2dp_bridge_out: port@1 {
>   reg = <1>;
>   anx7625_out: endpoint {
>   remote-endpoint = <&panel_in>;
>   };
>   };
>   };
>   };
> 
> Signed-off-by: Xin Ji 
> ---
>  .../bindings/display/bridge/analogix,anx7625.yaml  | 97 
> ++
>  1 file changed, 97 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dts:21.13-26:
 Warning (reg_format): /example-0/encoder@58:reg: property has invalid length 
(4 bytes) (#address-cells == 1, #size-cells == 1)
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
 Warning (pci_device_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
 Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
 Warning (simple_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
 Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml:
 Warning (spi_bus_reg): Failed prerequisite 'reg_format'

See https://patchwork.ozlabs.org/patch/1280084

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master 
--upgrade

Please check and re-submit.
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Re: [PATCH v2 6/9] dt-bindings: media: rkisp1: move rockchip-isp1 bindings out of staging

2020-04-14 Thread Rob Herring
On Fri,  3 Apr 2020 13:15:35 -0300, Helen Koike wrote:
> Move rkisp1 bindings to Documentation/devicetree/bindings/media
> 
> Verified with:
> make ARCH=arm64 dt_binding_check 
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml
> 
> Signed-off-by: Helen Koike 
> ---
> 
> V2:
> - no changes
> 
>  .../devicetree/bindings/media/rockchip-isp1.yaml  | 0
>  1 file changed, 0 insertions(+), 0 deletions(-)
>  rename {drivers/staging/media/rkisp1/Documentation => 
> Documentation}/devicetree/bindings/media/rockchip-isp1.yaml (100%)
> 

Acked-by: Rob Herring 
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Re: [PATCH v2 5/9] dt-bindings: phy: phy-rockchip-dphy-rx0: move rockchip dphy rx0 bindings out of staging

2020-04-14 Thread Rob Herring
On Fri,  3 Apr 2020 13:15:34 -0300, Helen Koike wrote:
> Move phy-rockchip-dphy-rx0 bindings to Documentation/devicetree/bindings/phy
> 
> Verified with:
> make ARCH=arm64 dt_binding_check 
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
> 
> Signed-off-by: Helen Koike 
> ---
> 
> V2:
> - no changes
> 
>  .../devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml   | 0
>  1 file changed, 0 insertions(+), 0 deletions(-)
>  rename {drivers/staging/media/phy-rockchip-dphy-rx0/Documentation => 
> Documentation}/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml (100%)
> 

Acked-by: Rob Herring 
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Re: [PATCH v6 16/17] dt: bindings: net: add microchip,wilc1000.yaml

2020-04-04 Thread Rob Herring
On Fri, 27 Mar 2020 06:33:20 +,  wrote:
> 
> From: Ajay Singh 
> 
> This file describes the binding details to connect wilc1000 device. It's
> moved from staging to 'Documentation/devicetree/bindings/net/wireless'
> path.
> 
> Signed-off-by: Ajay Singh 
> ---
>  .../net/wireless/microchip,wilc1000.yaml  | 71 +++
>  1 file changed, 71 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH v5 16/17] dt: bindings: net: add microchip,wilc1000.yaml

2020-03-20 Thread Rob Herring
On Wed, Mar 11, 2020 at 12:18:50PM +, ajay.kat...@microchip.com wrote:
> From: Ajay Singh 
> 
> This file describes the binding details to connect wilc1000 device. It's
> moved from staging to 'Documentation/devicetree/bindings/net/wireless'
> path.
> 
> Signed-off-by: Ajay Singh 
> ---
>  .../net/wireless/microchip,wilc1000.yaml  | 72 +++
>  1 file changed, 72 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml 
> b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
> new file mode 100644
> index ..bc6cc5d3f347
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip WILC wireless devicetree bindings
> +
> +maintainers:
> +  - Adham Abozaeid 
> +  - Ajay Singh 
> +
> +description:
> +  The wilc1000 chips can be connected via SPI or SDIO. This document
> +  describes the binding to connect wilc devices.
> +
> +properties:
> +  compatible:
> +const: microchip,wilc1000
> +
> +  spi-max-frequency: true
> +
> +  interrupts:
> +maxItems: 1
> +
> +  clocks:
> +description: phandle to the clock connected on rtc clock line.
> +maxItems: 1
> +
> +  clock-names:
> +const: rtc
> +
> +required:
> +  - compatible
> +  - interrupts
> +
> +examples:
> +  - |
> +spi1: spi@fc018000 {

spi {

> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  cs-gpios = <&pioB 21 0>;

Drop this. Not relevant to the example.

> +  wifi@0 {
> +compatible = "microchip,wilc1000";
> +spi-max-frequency = <4800>;
> +reg = <0>;
> +interrupt-parent = <&pioC>;
> +interrupts = <27 0>;
> +clocks = <&pck1>;
> +clock-names = "rtc";
> +  };
> +};
> +
> +  - |
> +mmc1: mmc@fc00 {

Drop the label. Either drop the unit address or add a 'reg' property to 
match.

> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  pinctrl-names = "default";
> +  pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
> +  non-removable;
> +  vmmc-supply = <&vcc_mmc1_reg>;
> +  vqmmc-supply = <&vcc_3v3_reg>;
> +  bus-width = <4>;
> +  wifi@0 {
> +compatible = "microchip,wilc1000";
> +reg = <0>;
> +interrupt-parent = <&pioC>;
> +interrupts = <27 0>;
> +clocks = <&pck1>;
> +clock-names = "rtc";
> +  };
> +};
> -- 
> 2.24.0
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Re: [PATCH 1/2] staging: wilc1000: use 'interrupts' property instead of 'irq-gpio'

2020-03-06 Thread Rob Herring
On Fri, Mar 6, 2020 at 8:44 AM  wrote:
>
> From: Ajay Singh 
>
> Make use of 'interrupts' property instead of using gpio for handling
> the interrupt as suggested in [1].
>
> [1]. https://lore.kernel.org/linux-wireless/20200303015558.GA6876@bogus/
>
> Signed-off-by: Ajay Singh 
> ---
>  .../net/wireless/microchip,wilc1000.yaml  | 79 +++
>  .../wilc1000/microchip,wilc1000,sdio.yaml |  8 +-
>  .../wilc1000/microchip,wilc1000,spi.yaml  |  8 +-

Bindings should be a separate patch.

>  drivers/staging/wilc1000/netdev.c | 24 ++
>  drivers/staging/wilc1000/netdev.h |  1 -
>  drivers/staging/wilc1000/sdio.c   | 31 +++-
>  drivers/staging/wilc1000/spi.c| 15 +---
>  drivers/staging/wilc1000/wlan.h   |  1 -
>  8 files changed, 108 insertions(+), 59 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
>
> diff --git 
> a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml 
> b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
> new file mode 100644
> index ..a1914449ad07
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip WILC wireless devicetree bindings
> +
> +maintainers:
> +  - Adham Abozaeid 
> +  - Ajay Singh 
> +
> +description:
> +  The wilc1000 chips can be connected via SPI or SDIO. This document
> +  describes the binding to connect wilc devices.
> +
> +properties:
> +  compatible:
> +const: microchip,wilc1000
> +
> +  spi-max-frequency:
> +description: Maximum SPI clocking speed of device in Hz.
> +maxItems: 1

No need to redefine a common property. Just:

spi-max-frequency: true

> +
> +  reg:
> +description: Chip select address of device.

Drop this.

> +maxItems: 1
> +
> +  interrupts:
> +maxItems: 1
> +
> +  clocks:
> +description: phandle to the clock connected on rtc clock line.
> +maxItems: 1
> +
> +  clock-names:
> +const: rtc
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +examples:
> +  - |
> +spi1: spi@fc018000 {
> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  cs-gpios = <&pioB 21 0>;
> +  wifi@0 {
> +compatible = "microchip,wilc1000";
> +spi-max-frequency = <4800>;
> +reg = <0>;
> +interrupt-parent = <&pioC>;
> +interrupts = <27 0>;
> +clocks = <&pck1>;
> +clock-names = "rtc";
> +  };
> +};
> +
> +  - |
> +mmc1: mmc@fc00 {
> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  pinctrl-names = "default";
> +  pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
> +  non-removable;
> +  vmmc-supply = <&vcc_mmc1_reg>;
> +  vqmmc-supply = <&vcc_3v3_reg>;
> +  bus-width = <4>;
> +  wifi@0 {
> +compatible = "microchip,wilc1000";
> +reg = <0>;
> +interrupt-parent = <&pioC>;
> +interrupts = <27 0>;
> +clocks = <&pck1>;
> +clock-names = "rtc";
> +  };
> +};
> diff --git a/drivers/staging/wilc1000/microchip,wilc1000,sdio.yaml 
> b/drivers/staging/wilc1000/microchip,wilc1000,sdio.yaml
> index b338f569f7e2..9df7327bc668 100644
> --- a/drivers/staging/wilc1000/microchip,wilc1000,sdio.yaml
> +++ b/drivers/staging/wilc1000/microchip,wilc1000,sdio.yaml

Why aren't you just removing this file and the spi one?

Rob
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Re: [PATCH v4 17/18] dt: bindings: net: add microchip,wilc1000,spi.yaml

2020-03-02 Thread Rob Herring
On Mon, Mar 02, 2020 at 04:34:40PM +, ajay.kat...@microchip.com wrote:
> From: Ajay Singh 
> 
> Moved '/drivers/staging/wilc1000//microchip,wilc1000,spi.yaml' to
> 'Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,spi.yaml'.

Not a useful changelog.

I think this should be combined with the SDIO version. Details below.

> 
> Signed-off-by: Ajay Singh 
> ---
>  .../net/wireless/microchip,wilc1000,spi.yaml  | 61 +++
>  1 file changed, 61 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,spi.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,spi.yaml 
> b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,spi.yaml
> new file mode 100644
> index ..cc8ed64ce627
> --- /dev/null
> +++ 
> b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,spi.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000,spi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip WILC wireless SPI devicetree bindings
> +
> +maintainers:
> +  - Adham Abozaeid 
> +  - Ajay Singh 
> +
> +description:
> +  The wilc1000 chips can be connected via SPI. This document describes
> +  the binding for the SPI connected module.
> +
> +properties:
> +  compatible:
> +const: microchip,wilc1000-spi

You can drop '-spi' (and '-sdio'). They don't need to be different 
because they already sit on different buses.

> +
> +  spi-max-frequency:
> +description: Maximum SPI clocking speed of device in Hz.
> +maxItems: 1
> +
> +  reg:
> +description: Chip select address of device.
> +maxItems: 1
> +
> +  irq-gpios:
> +description: The GPIO phandle connect to a host IRQ.
> +maxItems: 1
> +
> +  clocks:
> +description: phandle to the clock connected on rtc clock line.
> +maxItems: 1
> +
> +required:
> +  - compatible
> +  - spi-max-frequency

This should not be required.

> +  - reg
> +  - irq-gpios
> +
> +examples:
> +  - |
> +spi1: spi@fc018000 {
> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  cs-gpios = <&pioB 21 0>;
> +  status = "okay";
> +  wilc_spi@0 {
> +compatible = "microchip,wilc1000-spi";
> +spi-max-frequency = <4800>;
> +reg = <0>;
> +irq-gpios = <&pioC 27 0>;
> +clocks = <&pck1>;
> +clock-names = "rtc_clk";

Not documented. '_clk' is redundant.

> +assigned-clocks = <&pck1>;
> +assigned-clock-rates = <32768>;

Not documented.

> +status = "okay";
> +  };
> +};
> -- 
> 2.24.0
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Re: [PATCH v4 16/18] dt: bindings: net: add microchip,wilc1000,sdio.yaml

2020-03-02 Thread Rob Herring
On Mon, Mar 02, 2020 at 04:34:40PM +, ajay.kat...@microchip.com wrote:
> From: Ajay Singh 
> 
> Moved '/drivers/staging/wilc1000/microchip,wilc1000,sdio.yaml' to
> 'Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,sdio.yaml'.
> 
> Signed-off-by: Ajay Singh 
> ---
>  .../net/wireless/microchip,wilc1000,sdio.yaml | 68 +++
>  1 file changed, 68 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,sdio.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,sdio.yaml 
> b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,sdio.yaml
> new file mode 100644
> index ..b338f569f7e2
> --- /dev/null
> +++ 
> b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000,sdio.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000,sdio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip WILC wireless SDIO devicetree bindings
> +
> +maintainers:
> +  - Adham Abozaeid 
> +  - Ajay Singh 
> +
> +description:
> +  The wilc1000 chips can be connected via SDIO. The node is used to
> +  specify child node to the SDIO controller that connects the device
> +  to the system.
> +
> +properties:
> +  compatible:
> +const: microchip,wilc1000-sdio
> +
> +  irq-gpios:

Unless you need GPIO control of the line, use 'interrupts' instead.

> +description: The GPIO phandle connect to a host IRQ.
> +maxItems: 1
> +
> +  reg:
> +description: Slot ID used in the controller.

No, it's the function number. But you can just drop this.

> +maxItems: 1
> +
> +  clocks:
> +description: phandle to the clock connected on rtc clock line.
> +maxItems: 1
> +
> +  bus-width:

I believe this is defined to go in the parent node.

> +description: The number of data lines wired up the slot.
> +allOf:
> +  - $ref: /schemas/types.yaml#/definitions/uint32
> +  - enum: [1, 4, 8]
> +  - default: 1
> +
> +required:
> +  - compatible
> +  - irq-gpios
> +  - reg
> +
> +examples:
> +  - |
> +mmc1: mmc@fc00 {
> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  pinctrl-names = "default";
> +  pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
> +  non-removable;
> +  vmmc-supply = <&vcc_mmc1_reg>;
> +  vqmmc-supply = <&vcc_3v3_reg>;
> +  status = "okay";

Don't show 'status' in examples.

> +  wilc_sdio@0 {

wifi@0

> +compatible = "microchip,wilc1000-sdio";
> +  irq-gpios = <&pioC 27 0>;
> +  reg = <0>;
> +  clocks = <&pck1>;
> +  clock-names = "rtc_clk";
> +  assigned-clocks = <&pck1>;
> +  assigned-clock-rates = <32768>;
> +  status = "okay";
> +  bus-width = <4>;
> +};
> +};
> -- 
> 2.24.0
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Re: [PATCH] docs: dt: fix several broken doc references

2020-02-24 Thread Rob Herring
On Sun, Feb 23, 2020 at 09:59:53AM +0100, Mauro Carvalho Chehab wrote:
> There are several DT doc references that require manual fixes.
> I found 3 cases fixed on this patch:
> 
>   - directory named "binding/" instead of "bindings/";
>   - .txt to .yaml renames;
>   - file renames (still on txt format);
> 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../devicetree/bindings/mtd/cadence-nand-controller.txt   | 2 +-
>  .../devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt  | 2 +-
>  Documentation/devicetree/bindings/sound/st,stm32-sai.txt  | 2 +-
>  Documentation/devicetree/bindings/sound/st,stm32-spdifrx.txt  | 2 +-
>  Documentation/devicetree/bindings/spi/st,stm32-spi.yaml   | 2 +-
>  MAINTAINERS   | 4 ++--
>  .../devicetree/bindings/net/wireless/siliabs,wfx.txt  | 2 +-
>  7 files changed, 8 insertions(+), 8 deletions(-)

Applied.

Rob
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Re: [PATCH 3/3] staging: pi433: overlay: Convert to sugar syntax

2020-02-21 Thread Rob Herring
On Fri, Feb 21, 2020 at 6:21 AM Geert Uytterhoeven
 wrote:
>
> Using overlay sugar syntax makes the DTS overlay files easier to read
> (and write).
>
> Signed-off-by: Geert Uytterhoeven 
> ---
> Why are there two separate fragments for spi0? Can't they be combined?
> Why do you need the spidev@1 entry?
> ---
>  .../devicetree/pi433-overlay.dts  | 79 ---
>  1 file changed, 35 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/staging/pi433/Documentation/devicetree/pi433-overlay.dts 
> b/drivers/staging/pi433/Documentation/devicetree/pi433-overlay.dts

We have overlays in staging? Who sneaked this in?

Maybe the path should be fixed at least as this isn't documentation.

Rob
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Re: [PATCH 7/8] dt-bindings: adv748x: add information about serial audio interface (I2S/TDM)

2020-01-13 Thread Rob Herring
On Mon, 13 Jan 2020 15:15:50 +0100, Alex Riesen wrote:
> As the driver has some support for the audio interface of the device,
> the bindings file should mention it.
> 
> Signed-off-by: Alexander Riesen 
> ---
>  .../devicetree/bindings/media/i2c/adv748x.txt   | 13 -
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring 
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